mirror of
https://github.com/openstenoproject/qmk
synced 2024-11-15 04:54:43 +00:00
270 lines
7.5 KiB
C
270 lines
7.5 KiB
C
#include <avr/io.h>
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#include <avr/interrupt.h>
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#include "quantum.h"
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#include "pointing_device.h"
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#include "adns9800_srom_A4.h"
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#include <LUFA/Drivers/Peripheral/SPI.h>
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// registers
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#define REG_Product_ID 0x00
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#define REG_Revision_ID 0x01
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#define REG_Motion 0x02
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#define REG_Delta_X_L 0x03
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#define REG_Delta_X_H 0x04
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#define REG_Delta_Y_L 0x05
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#define REG_Delta_Y_H 0x06
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#define REG_SQUAL 0x07
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#define REG_Pixel_Sum 0x08
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#define REG_Maximum_Pixel 0x09
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#define REG_Minimum_Pixel 0x0a
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#define REG_Shutter_Lower 0x0b
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#define REG_Shutter_Upper 0x0c
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#define REG_Frame_Period_Lower 0x0d
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#define REG_Frame_Period_Upper 0x0e
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#define REG_Configuration_I 0x0f
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#define REG_Configuration_II 0x10
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#define REG_Frame_Capture 0x12
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#define REG_SROM_Enable 0x13
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#define REG_Run_Downshift 0x14
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#define REG_Rest1_Rate 0x15
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#define REG_Rest1_Downshift 0x16
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#define REG_Rest2_Rate 0x17
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#define REG_Rest2_Downshift 0x18
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#define REG_Rest3_Rate 0x19
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#define REG_Frame_Period_Max_Bound_Lower 0x1a
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#define REG_Frame_Period_Max_Bound_Upper 0x1b
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#define REG_Frame_Period_Min_Bound_Lower 0x1c
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#define REG_Frame_Period_Min_Bound_Upper 0x1d
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#define REG_Shutter_Max_Bound_Lower 0x1e
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#define REG_Shutter_Max_Bound_Upper 0x1f
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#define REG_LASER_CTRL0 0x20
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#define REG_Observation 0x24
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#define REG_Data_Out_Lower 0x25
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#define REG_Data_Out_Upper 0x26
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#define REG_SROM_ID 0x2a
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#define REG_Lift_Detection_Thr 0x2e
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#define REG_Configuration_V 0x2f
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#define REG_Configuration_IV 0x39
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#define REG_Power_Up_Reset 0x3a
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#define REG_Shutdown 0x3b
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#define REG_Inverse_Product_ID 0x3f
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#define REG_Motion_Burst 0x50
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#define REG_SROM_Load_Burst 0x62
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#define REG_Pixel_Burst 0x64
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// pins
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#define NCS 0
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extern const uint16_t firmware_length;
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extern const uint8_t firmware_data[];
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enum motion_burst_property{
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motion = 0,
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observation,
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delta_x_l,
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delta_x_h,
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delta_y_l,
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delta_y_h,
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squal,
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pixel_sum,
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maximum_pixel,
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minimum_pixel,
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shutter_upper,
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shutter_lower,
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frame_period_upper,
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frame_period_lower,
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end_data
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};
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// used to track the motion delta between updates
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volatile int32_t delta_x;
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volatile int32_t delta_y;
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void adns_begin(void){
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PORTB &= ~ (1 << NCS);
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}
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void adns_end(void){
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PORTB |= (1 << NCS);
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}
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void adns_write(uint8_t reg_addr, uint8_t data){
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adns_begin();
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//send address of the register, with MSBit = 1 to indicate it's a write
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SPI_TransferByte(reg_addr | 0x80 );
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SPI_TransferByte(data);
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// tSCLK-NCS for write operation
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wait_us(20);
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adns_end();
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// tSWW/tSWR (=120us) minus tSCLK-NCS. Could be shortened, but is looks like a safe lower bound
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wait_us(100);
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}
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uint8_t adns_read(uint8_t reg_addr){
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adns_begin();
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// send adress of the register, with MSBit = 0 to indicate it's a read
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SPI_TransferByte(reg_addr & 0x7f );
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uint8_t data = SPI_TransferByte(0);
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// tSCLK-NCS for read operation is 120ns
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wait_us(1);
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adns_end();
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// tSRW/tSRR (=20us) minus tSCLK-NCS
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wait_us(19);
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return data;
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}
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void pointing_device_init(void) {
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if(!is_keyboard_master())
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return;
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// interrupt 2
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EICRA &= ~(1 << 4);
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EICRA |= (1 << 5);
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EIMSK |= (1<<INT2);
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// mode 3
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SPI_Init(
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SPI_SPEED_FCPU_DIV_8 |
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SPI_ORDER_MSB_FIRST |
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SPI_SCK_LEAD_FALLING |
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SPI_SAMPLE_TRAILING |
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SPI_MODE_MASTER);
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// set B0 output
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DDRB |= (1 << 0);
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// reset serial port
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adns_end();
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adns_begin();
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adns_end();
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// reboot
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adns_write(REG_Power_Up_Reset, 0x5a);
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wait_ms(50);
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// read registers and discard
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adns_read(REG_Motion);
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adns_read(REG_Delta_X_L);
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adns_read(REG_Delta_X_H);
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adns_read(REG_Delta_Y_L);
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adns_read(REG_Delta_Y_H);
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// upload firmware
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// set the configuration_IV register in 3k firmware mode
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// bit 1 = 1 for 3k mode, other bits are reserved
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adns_write(REG_Configuration_IV, 0x02);
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// write 0x1d in SROM_enable reg for initializing
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adns_write(REG_SROM_Enable, 0x1d);
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// wait for more than one frame period
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// assume that the frame rate is as low as 100fps... even if it should never be that low
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wait_ms(10);
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// write 0x18 to SROM_enable to start SROM download
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adns_write(REG_SROM_Enable, 0x18);
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// write the SROM file (=firmware data)
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adns_begin();
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// write burst destination adress
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SPI_TransferByte(REG_SROM_Load_Burst | 0x80);
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wait_us(15);
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// send all bytes of the firmware
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unsigned char c;
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for(int i = 0; i < firmware_length; i++){
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c = (unsigned char)pgm_read_byte(firmware_data + i);
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SPI_TransferByte(c);
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wait_us(15);
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}
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adns_end();
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wait_ms(10);
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// enable laser(bit 0 = 0b), in normal mode (bits 3,2,1 = 000b)
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// reading the actual value of the register is important because the real
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// default value is different from what is said in the datasheet, and if you
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// change the reserved bytes (like by writing 0x00...) it would not work.
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uint8_t laser_ctrl0 = adns_read(REG_LASER_CTRL0);
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adns_write(REG_LASER_CTRL0, laser_ctrl0 & 0xf0);
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wait_ms(1);
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// set the configuration_I register to set the CPI
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// 0x01 = 50, minimum
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// 0x44 = 3400, default
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// 0x8e = 7100
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// 0xA4 = 8200, maximum
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adns_write(REG_Configuration_I, 0x04);
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wait_ms(100);
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}
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void pointing_device_task(void) {
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if(!is_keyboard_master())
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return;
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report_mouse_t report = pointing_device_get_report();
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// clamp deltas from -127 to 127
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report.x = delta_x < -127 ? 127 : delta_x > 127 ? 127 : delta_x;
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report.x = -report.x;
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report.y = delta_y < -127 ? 127 : delta_y > 127 ? 127 : delta_y;
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// reset deltas
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delta_x = 0;
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delta_y = 0;
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pointing_device_set_report(report);
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pointing_device_send();
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}
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int16_t convertDeltaToInt(uint8_t high, uint8_t low){
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// join bytes into twos compliment
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uint16_t twos_comp = (high << 8) | low;
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// convert twos comp to int
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if (twos_comp & 0x8000)
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return -1 * ((twos_comp ^ 0xffff) + 1);
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return twos_comp;
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}
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ISR(INT2_vect) {
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// called on interrupt 2 when sensed motion
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// copy burst data from the respective registers
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adns_begin();
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// send adress of the register, with MSBit = 1 to indicate it's a write
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SPI_TransferByte(REG_Motion_Burst & 0x7f);
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uint8_t burst_data[pixel_sum];
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for (int i = 0; i < pixel_sum; ++i) {
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burst_data[i] = SPI_TransferByte(0);
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}
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delta_x += convertDeltaToInt(burst_data[delta_x_h], burst_data[delta_x_l]);
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delta_y += convertDeltaToInt(burst_data[delta_y_h], burst_data[delta_y_l]);
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adns_end();
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}
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