mirror of
https://github.com/openstenoproject/qmk
synced 2024-11-22 16:34:38 +00:00
88a783a8a7
This is based on feedback talking with crop_octagon about the device. Future trackballs will ship with ATMEL DFU for simplicity. This also includes some fixes and optimizations based on code review and tinkering on my own devices.
225 lines
5.3 KiB
C
225 lines
5.3 KiB
C
/* Copyright 2020 Christopher Courtney, aka Drashna Jael're (@drashna) <drashna@live.com>
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* Copyright 2019 Sunjun Kim
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* Copyright 2020 Ploopy Corporation
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*
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* This program is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation, either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include "pmw3360.h"
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#include "pmw3360_firmware.h"
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#ifdef CONSOLE_ENABLE
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# include "print.h"
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#endif
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bool _inBurst = false;
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#ifndef PMW_CPI
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# define PMW_CPI 1600
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#endif
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#ifndef SPI_DIVISOR
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# define SPI_DIVISOR 2
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#endif
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#ifndef ROTATIONAL_TRANSFORM_ANGLE
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# define ROTATIONAL_TRANSFORM_ANGLE 0x00
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#endif
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#ifdef CONSOLE_ENABLE
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void print_byte(uint8_t byte) { dprintf("%c%c%c%c%c%c%c%c|", (byte & 0x80 ? '1' : '0'), (byte & 0x40 ? '1' : '0'), (byte & 0x20 ? '1' : '0'), (byte & 0x10 ? '1' : '0'), (byte & 0x08 ? '1' : '0'), (byte & 0x04 ? '1' : '0'), (byte & 0x02 ? '1' : '0'), (byte & 0x01 ? '1' : '0')); }
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#endif
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bool spi_start_adv(void) {
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bool status = spi_start(SPI_SS_PIN, false, 3, SPI_DIVISOR);
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wait_us(1);
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return status;
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}
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void spi_stop_adv(void) {
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wait_us(1);
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spi_stop();
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}
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spi_status_t spi_write_adv(uint8_t reg_addr, uint8_t data) {
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if (reg_addr != REG_Motion_Burst) {
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_inBurst = false;
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}
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spi_start_adv();
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// send address of the register, with MSBit = 1 to indicate it's a write
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spi_status_t status = spi_write(reg_addr | 0x80);
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status = spi_write(data);
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// tSCLK-NCS for write operation
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wait_us(20);
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// tSWW/tSWR (=120us) minus tSCLK-NCS. Could be shortened, but is looks like a safe lower bound
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wait_us(100);
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spi_stop();
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return status;
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}
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uint8_t spi_read_adv(uint8_t reg_addr) {
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spi_start_adv();
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// send adress of the register, with MSBit = 0 to indicate it's a read
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spi_write(reg_addr & 0x7f);
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uint8_t data = spi_read();
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// tSCLK-NCS for read operation is 120ns
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wait_us(1);
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// tSRW/tSRR (=20us) minus tSCLK-NCS
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wait_us(19);
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spi_stop();
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return data;
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}
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void pmw_set_cpi(uint16_t cpi) {
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int cpival = constrain((cpi / 100) - 1, 0, 0x77); // limits to 0--119
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spi_start_adv();
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spi_write_adv(REG_Config1, cpival);
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spi_stop();
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}
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bool pmw_spi_init(void) {
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spi_init();
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_inBurst = false;
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spi_stop();
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spi_start_adv();
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spi_stop();
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spi_write_adv(REG_Shutdown, 0xb6); // Shutdown first
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wait_ms(300);
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spi_start_adv();
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wait_us(40);
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spi_stop_adv();
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wait_us(40);
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spi_write_adv(REG_Power_Up_Reset, 0x5a);
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wait_ms(50);
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spi_read_adv(REG_Motion);
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spi_read_adv(REG_Delta_X_L);
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spi_read_adv(REG_Delta_X_H);
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spi_read_adv(REG_Delta_Y_L);
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spi_read_adv(REG_Delta_Y_H);
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pmw_upload_firmware();
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spi_stop_adv();
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wait_ms(10);
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pmw_set_cpi(PMW_CPI);
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wait_ms(1);
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return pmw_check_signature();
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}
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void pmw_upload_firmware(void) {
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spi_write_adv(REG_Config2, 0x00);
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spi_write_adv(REG_Angle_Tune, constrain(ROTATIONAL_TRANSFORM_ANGLE, -30, 30));
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spi_write_adv(REG_SROM_Enable, 0x1d);
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wait_ms(10);
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spi_write_adv(REG_SROM_Enable, 0x18);
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spi_start_adv();
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spi_write(REG_SROM_Load_Burst | 0x80);
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wait_us(15);
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unsigned char c;
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for (int i = 0; i < firmware_length; i++) {
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c = (unsigned char)pgm_read_byte(firmware_data + i);
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spi_write(c);
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wait_us(15);
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}
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wait_us(200);
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spi_read_adv(REG_SROM_ID);
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spi_write_adv(REG_Config2, 0x00);
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spi_stop();
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wait_ms(10);
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}
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bool pmw_check_signature(void) {
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uint8_t pid = spi_read_adv(REG_Product_ID);
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uint8_t iv_pid = spi_read_adv(REG_Inverse_Product_ID);
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uint8_t SROM_ver = spi_read_adv(REG_SROM_ID);
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return (pid == 0x42 && iv_pid == 0xBD && SROM_ver == 0x04); // signature for SROM 0x04
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}
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report_pmw_t pmw_read_burst(void) {
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if (!_inBurst) {
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#ifdef CONSOLE_ENABLE
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dprintf("burst on");
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#endif
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spi_write_adv(REG_Motion_Burst, 0x00);
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_inBurst = true;
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}
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spi_start_adv();
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spi_write(REG_Motion_Burst);
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wait_us(35); // waits for tSRAD
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report_pmw_t data;
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data.motion = 0;
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data.dx = 0;
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data.mdx = 0;
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data.dy = 0;
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data.mdx = 0;
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data.motion = spi_read();
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spi_write(0x00); // skip Observation
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data.dx = spi_read();
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data.mdx = spi_read();
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data.dy = spi_read();
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data.mdy = spi_read();
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spi_stop();
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#ifdef CONSOLE_ENABLE
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print_byte(data.motion);
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print_byte(data.dx);
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print_byte(data.mdx);
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print_byte(data.dy);
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print_byte(data.mdy);
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dprintf("\n");
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#endif
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data.isMotion = (data.motion & 0x80) != 0;
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data.isOnSurface = (data.motion & 0x08) == 0;
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data.dx |= (data.mdx << 8);
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data.dx = data.dx * -1;
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data.dy |= (data.mdy << 8);
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data.dy = data.dy * -1;
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spi_stop();
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if (data.motion & 0b111) { // panic recovery, sometimes burst mode works weird.
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_inBurst = false;
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}
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return data;
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}
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