mirror of
https://github.com/openstenoproject/qmk
synced 2024-11-16 05:24:50 +00:00
6779d5b990
Co-authored-by: Drashna Jaelre <drashna@live.com> Co-authored-by: Ryan <fauxpark@gmail.com> Co-authored-by: Nachiket Kulkarni <nachiket_kulkarni@apple.com>
133 lines
4.2 KiB
C
Executable file
133 lines
4.2 KiB
C
Executable file
/*
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Copyright 2021 KapCave
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This program is free software: you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation, either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#pragma once
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#include "config_common.h"
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/* USB Device descriptor parameter */
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#define VENDOR_ID 0x4B43
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#define PRODUCT_ID 0x5036
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#define DEVICE_VER 0x0001
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#define MANUFACTURER KapCave
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#define PRODUCT paladin64
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/* key matrix size */
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#define MATRIX_ROWS 8
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#define MATRIX_COLS 8
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#define BOOTMAGIC_LITE_ROW 3
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#define BOOTMAGIC_LITE_COLUMN 6
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/* Only required if you add in a trackpoint hardware to the pcb */
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#ifdef PS2_USE_USART
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#define PS2_CLOCK_PORT PORTD
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#define PS2_CLOCK_PIN PIND
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#define PS2_CLOCK_DDR DDRD
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#define PS2_CLOCK_BIT 5
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#define PS2_DATA_PORT PORTD
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#define PS2_DATA_PIN PIND
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#define PS2_DATA_DDR DDRD
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#define PS2_DATA_BIT 2
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/* synchronous, odd parity, 1-bit stop, 8-bit data, sample at falling
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* edge */
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/* set DDR of CLOCK as input to be slave */
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#define PS2_USART_INIT() do { \
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PS2_CLOCK_DDR &= ~(1<<PS2_CLOCK_BIT); \
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PS2_DATA_DDR &= ~(1<<PS2_DATA_BIT); \
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UCSR1C = ((1 << UMSEL10) | \
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(3 << UPM10) | \
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(0 << USBS1) | \
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(3 << UCSZ10) | \
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(0 << UCPOL1)); \
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UCSR1A = 0; \
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UBRR1H = 0; \
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UBRR1L = 0; \
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} while (0)
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#define PS2_USART_RX_INT_ON() do { \
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UCSR1B = ((1 << RXCIE1) | \
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(1 << RXEN1)); \
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} while (0)
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#define PS2_USART_RX_POLL_ON() do { \
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UCSR1B = (1 << RXEN1); \
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} while (0)
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#define PS2_USART_OFF() do { \
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UCSR1C = 0; \
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UCSR1B &= ~((1 << RXEN1) | \
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(1 << TXEN1)); \
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} while (0)
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#define PS2_USART_RX_READY (UCSR1A & (1<<RXC1))
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#define PS2_USART_RX_DATA UDR1
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#define PS2_USART_ERROR (UCSR1A & ((1<<FE1) | (1<<DOR1) | (1<<UPE1)))
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#define PS2_USART_RX_VECT USART1_RX_vect
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#endif
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#ifdef PS2_USE_INT
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#define PS2_CLOCK_PORT PORTD
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#define PS2_CLOCK_PIN PIND
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#define PS2_CLOCK_DDR DDRD
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#define PS2_CLOCK_BIT 2
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#define PS2_DATA_PORT PORTD
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#define PS2_DATA_PIN PIND
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#define PS2_DATA_DDR DDRD
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#define PS2_DATA_BIT 5
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#define PS2_INT_INIT() do { \
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EICRA |= ((1<<ISC21) | \
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(0<<ISC20)); \
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} while (0)
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#define PS2_INT_ON() do { \
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EIMSK |= (1<<INT2); \
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} while (0)
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#define PS2_INT_OFF() do { \
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EIMSK &= ~(1<<INT2); \
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} while (0)
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#define PS2_INT_VECT INT2_vect
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#endif
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/* key matrix pins */
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#define MATRIX_ROW_PINS { C6, B6, B5, B4, D7, D6, B0, D3 }
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#define MATRIX_COL_PINS { C7, F7, F6, F5, F4, F1, F0, D1 }
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#define UNUSED_PINS
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/* COL2ROW or ROW2COL */
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#define DIODE_DIRECTION COL2ROW
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/* number of backlight levels */
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#ifdef BACKLIGHT_PIN
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#define BACKLIGHT_LEVELS 3
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#endif
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/* Set 0 if debouncing isn't needed */
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#define DEBOUNCE 5
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/* Mechanical locking support. Use KC_LCAP, KC_LNUM or KC_LSCR instead in keymap */
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#define LOCKING_SUPPORT_ENABLE
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/* Locking resynchronize hack */
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#define LOCKING_RESYNC_ENABLE
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#define RGB_DI_PIN D0
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#ifdef RGB_DI_PIN
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#define RGBLIGHT_ANIMATIONS
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#define RGBLED_NUM 14
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#define RGBLIGHT_HUE_STEP 10
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#define RGBLIGHT_SAT_STEP 17
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#define RGBLIGHT_VAL_STEP 12
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#endif
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