mirror of
https://github.com/openstenoproject/qmk
synced 2024-11-14 12:34:39 +00:00
4d9b11af14
* Remove unnecessary IS_COMMAND definition in clueboard/66/rev4 * Replace keyboard_report->mods with get_mods() in IS_COMMAND definitions * Update docs to use get_mods() instead of keyboard_report->mods * Replace keyboard_report->mods with get_mods() in tmk_core/protocol/usb_hid/test For some reason, this occurrence used KB_LSHIFT and KB_RSHIFT, which don't exist * Replace keyboard_report->mods with get_mods() in Massdrop keyboards (as per @patrickmt)
78 lines
2.2 KiB
C
78 lines
2.2 KiB
C
/*
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Copyright 2012 Jun Wako <wakojun@gmail.com>
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This program is free software: you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation, either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#pragma once
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#define VENDOR_ID 0xFEED
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#define PRODUCT_ID 0x6512
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#define DEVICE_VER 0x0001
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#define MANUFACTURER QMK
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#define PRODUCT XT keyboard converter
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#define DESCRIPTION convert XT keyboard to USB
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/* matrix size */
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#define MATRIX_ROWS 16 // keycode bit: 3-0
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#define MATRIX_COLS 8 // keycode bit: 6-4
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/* key combination for command */
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#define IS_COMMAND() ( \
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get_mods() == (MOD_BIT(KC_LSHIFT) | MOD_BIT(KC_RSHIFT)) || \
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get_mods() == (MOD_BIT(KC_LCTRL) | MOD_BIT(KC_RSHIFT)) \
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)
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//#define NO_SUSPEND_POWER_DOWN
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/*
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* XT Pin interrupt
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*/
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#define XT_CLOCK_PORT PORTD
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#define XT_CLOCK_PIN PIND
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#define XT_CLOCK_DDR DDRD
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#define XT_CLOCK_BIT 1
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#define XT_DATA_PORT PORTD
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#define XT_DATA_PIN PIND
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#define XT_DATA_DDR DDRD
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#define XT_DATA_BIT 0
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#define XT_RST_PORT PORTB
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#define XT_RST_PIN PINB
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#define XT_RST_DDR DDRB
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#define XT_RST_BIT 7
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/* hard reset: low pulse for 500ms and after that HiZ for safety */
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#define XT_RESET() do { \
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XT_RST_PORT &= ~(1<<XT_RST_BIT); \
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XT_RST_DDR |= (1<<XT_RST_BIT); \
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_delay_ms(500); \
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XT_RST_DDR &= ~(1<<XT_RST_BIT); \
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} while (0)
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/* INT1 for falling edge of clock line */
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#define XT_INT_INIT() do { \
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EICRA |= ((1<<ISC11) | \
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(0<<ISC10)); \
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} while (0)
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/* clears flag and enables interrupt */
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#define XT_INT_ON() do { \
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EIFR |= (1<<INTF1); \
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EIMSK |= (1<<INT1); \
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} while (0)
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#define XT_INT_OFF() do { \
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EIMSK &= ~(1<<INT1); \
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} while (0)
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#define XT_INT_VECT INT1_vect
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