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https://github.com/openstenoproject/qmk
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ARM split - Add uart half duplex transport support (#7987)
* ARM split - Add uart half duplex transport support * Fix for f103 * initial full duplex pass * partially remove full duplex * Correct speeds within driver docs Co-authored-by: Nick Brassel <nick@tzarc.org> Co-authored-by: Nick Brassel <nick@tzarc.org>
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Joel Challis
GitHub
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4 changed files with 356 additions and 0 deletions
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* [SPI Driver](spi_driver.md)
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* [WS2812 Driver](ws2812_driver.md)
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* [EEPROM Driver](eeprom_driver.md)
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* ['serial' Driver](serial_driver.md)
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* [GPIO Controls](internals_gpio_control.md)
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* [Keyboard Guidelines](hardware_keyboard_guidelines.md)
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59
docs/serial_driver.md
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59
docs/serial_driver.md
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# 'serial' Driver
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This driver powers the [Split Keyboard](feature_split_keyboard.md) feature.
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!> Serial in this context should be read as **sending information one bit at a time**, rather than implementing UART/USART/RS485/RS232 standards.
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All drivers in this category have the following characteristics:
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* Provides data and signaling over a single conductor
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* Limited to single master, single slave
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## Supported Driver Types
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| | AVR | ARM |
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|-------------------|--------------------|--------------------|
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| bit bang | :heavy_check_mark: | Soon™ |
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| USART Half-duplex | | :heavy_check_mark: |
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## Driver configuration
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### Bitbang
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Default driver, the absence of configuration assumes this driver. To configure it, add this to your rules.mk:
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```make
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SERIAL_DRIVER = bitbang
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```
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Configure the driver via your config.h:
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```c
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#define SOFT_SERIAL_PIN D0 // or D1, D2, D3, E6
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#define SELECT_SOFT_SERIAL_SPEED 1 // or 0, 2, 3, 4, 5
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// 0: about 189kbps (Experimental only)
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// 1: about 137kbps (default)
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// 2: about 75kbps
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// 3: about 39kbps
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// 4: about 26kbps
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// 5: about 20kbps
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```
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### USART Half-duplex
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Targeting STM32 boards where communication is offloaded to a USART hardware device. The advantage is that this provides fast and accurate timings. `SOFT_SERIAL_PIN` for this driver is the configured USART TX pin. **The TX pin must have appropriate pull-up resistors**. To configure it, add this to your rules.mk:
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```make
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SERIAL_DRIVER = usart
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```
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Configure the hardware via your config.h:
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```c
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#define SOFT_SERIAL_PIN B6 // USART TX pin
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#define SELECT_SOFT_SERIAL_SPEED 1 // or 0, 2, 3, 4, 5
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// 0: about 460800 baud
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// 1: about 230400 baud (default)
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// 2: about 115200 baud
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// 3: about 57600 baud
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// 4: about 38400 baud
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// 5: about 19200 baud
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#define SERIAL_USART_DRIVER SD1 // USART driver of TX pin. default: SD1
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#define SERIAL_USART_TX_PAL_MODE 7 // Pin "alternate function", see the respective datasheet for the appropriate values for your MCU. default: 7
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```
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You must also turn on the SERIAL feature in your halconf.h and mcuconf.h
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62
drivers/chibios/serial.h
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62
drivers/chibios/serial.h
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#pragma once
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#include <stdbool.h>
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// /////////////////////////////////////////////////////////////////
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// Need Soft Serial defines in config.h
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// /////////////////////////////////////////////////////////////////
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// ex.
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// #define SOFT_SERIAL_PIN ?? // ?? = D0,D1,D2,D3,E6
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// OPTIONAL: #define SELECT_SOFT_SERIAL_SPEED ? // ? = 1,2,3,4,5
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// // 1: about 137kbps (default)
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// // 2: about 75kbps
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// // 3: about 39kbps
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// // 4: about 26kbps
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// // 5: about 20kbps
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//
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// //// USE simple API (using signle-type transaction function)
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// /* nothing */
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// //// USE flexible API (using multi-type transaction function)
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// #define SERIAL_USE_MULTI_TRANSACTION
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//
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// /////////////////////////////////////////////////////////////////
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// Soft Serial Transaction Descriptor
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typedef struct _SSTD_t {
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uint8_t *status;
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uint8_t initiator2target_buffer_size;
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uint8_t *initiator2target_buffer;
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uint8_t target2initiator_buffer_size;
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uint8_t *target2initiator_buffer;
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} SSTD_t;
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#define TID_LIMIT(table) (sizeof(table) / sizeof(SSTD_t))
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// initiator is transaction start side
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void soft_serial_initiator_init(SSTD_t *sstd_table, int sstd_table_size);
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// target is interrupt accept side
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void soft_serial_target_init(SSTD_t *sstd_table, int sstd_table_size);
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// initiator result
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#define TRANSACTION_END 0
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#define TRANSACTION_NO_RESPONSE 0x1
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#define TRANSACTION_DATA_ERROR 0x2
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#define TRANSACTION_TYPE_ERROR 0x4
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#ifndef SERIAL_USE_MULTI_TRANSACTION
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int soft_serial_transaction(void);
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#else
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int soft_serial_transaction(int sstd_index);
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#endif
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// target status
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// *SSTD_t.status has
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// initiator:
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// TRANSACTION_END
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// or TRANSACTION_NO_RESPONSE
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// or TRANSACTION_DATA_ERROR
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// target:
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// TRANSACTION_DATA_ERROR
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// or TRANSACTION_ACCEPTED
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#define TRANSACTION_ACCEPTED 0x8
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#ifdef SERIAL_USE_MULTI_TRANSACTION
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int soft_serial_get_and_clean_status(int sstd_index);
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#endif
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234
drivers/chibios/serial_usart.c
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234
drivers/chibios/serial_usart.c
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#include "quantum.h"
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#include "serial.h"
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#include "printf.h"
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#include "ch.h"
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#include "hal.h"
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#ifndef USART_CR1_M0
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# define USART_CR1_M0 USART_CR1_M // some platforms (f1xx) dont have this so
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#endif
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#ifndef USE_GPIOV1
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// The default PAL alternate modes are used to signal that the pins are used for USART
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# ifndef SERIAL_USART_TX_PAL_MODE
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# define SERIAL_USART_TX_PAL_MODE 7
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# endif
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#endif
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#ifndef SERIAL_USART_DRIVER
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# define SERIAL_USART_DRIVER SD1
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#endif
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#ifndef SERIAL_USART_CR1
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# define SERIAL_USART_CR1 (USART_CR1_PCE | USART_CR1_PS | USART_CR1_M0) // parity enable, odd parity, 9 bit length
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#endif
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#ifndef SERIAL_USART_CR2
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# define SERIAL_USART_CR2 (USART_CR2_STOP_1) // 2 stop bits
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#endif
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#ifndef SERIAL_USART_CR3
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# define SERIAL_USART_CR3 0
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#endif
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#ifdef SOFT_SERIAL_PIN
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# define SERIAL_USART_TX_PIN SOFT_SERIAL_PIN
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#endif
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#ifndef SELECT_SOFT_SERIAL_SPEED
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# define SELECT_SOFT_SERIAL_SPEED 1
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#endif
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#ifdef SERIAL_USART_SPEED
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// Allow advanced users to directly set SERIAL_USART_SPEED
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#elif SELECT_SOFT_SERIAL_SPEED == 0
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# define SERIAL_USART_SPEED 460800
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#elif SELECT_SOFT_SERIAL_SPEED == 1
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# define SERIAL_USART_SPEED 230400
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#elif SELECT_SOFT_SERIAL_SPEED == 2
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# define SERIAL_USART_SPEED 115200
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#elif SELECT_SOFT_SERIAL_SPEED == 3
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# define SERIAL_USART_SPEED 57600
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#elif SELECT_SOFT_SERIAL_SPEED == 4
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# define SERIAL_USART_SPEED 38400
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#elif SELECT_SOFT_SERIAL_SPEED == 5
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# define SERIAL_USART_SPEED 19200
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#else
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# error invalid SELECT_SOFT_SERIAL_SPEED value
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#endif
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#define TIMEOUT 100
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#define HANDSHAKE_MAGIC 7
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static inline msg_t sdWriteHalfDuplex(SerialDriver* driver, uint8_t* data, uint8_t size) {
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msg_t ret = sdWrite(driver, data, size);
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// Half duplex requires us to read back the data we just wrote - just throw it away
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uint8_t dump[size];
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sdRead(driver, dump, size);
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return ret;
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}
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#undef sdWrite
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#define sdWrite sdWriteHalfDuplex
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static inline msg_t sdWriteTimeoutHalfDuplex(SerialDriver* driver, uint8_t* data, uint8_t size, uint32_t timeout) {
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msg_t ret = sdWriteTimeout(driver, data, size, timeout);
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// Half duplex requires us to read back the data we just wrote - just throw it away
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uint8_t dump[size];
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sdReadTimeout(driver, dump, size, timeout);
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return ret;
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}
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#undef sdWriteTimeout
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#define sdWriteTimeout sdWriteTimeoutHalfDuplex
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static inline void sdClear(SerialDriver* driver) {
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while (sdGetTimeout(driver, TIME_IMMEDIATE) != MSG_TIMEOUT) {
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// Do nothing with the data
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}
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}
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static SerialConfig sdcfg = {
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(SERIAL_USART_SPEED), // speed - mandatory
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(SERIAL_USART_CR1), // CR1
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(SERIAL_USART_CR2), // CR2
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(SERIAL_USART_CR3) // CR3
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};
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void handle_soft_serial_slave(void);
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/*
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* This thread runs on the slave and responds to transactions initiated
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* by the master
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*/
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static THD_WORKING_AREA(waSlaveThread, 2048);
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static THD_FUNCTION(SlaveThread, arg) {
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(void)arg;
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chRegSetThreadName("slave_transport");
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while (true) {
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handle_soft_serial_slave();
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}
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}
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__attribute__((weak)) void usart_init(void) {
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#if defined(USE_GPIOV1)
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palSetLineMode(SERIAL_USART_TX_PIN, PAL_MODE_STM32_ALTERNATE_OPENDRAIN);
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#else
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palSetLineMode(SERIAL_USART_TX_PIN, PAL_MODE_ALTERNATE(SERIAL_USART_TX_PAL_MODE) | PAL_STM32_OTYPE_OPENDRAIN);
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#endif
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}
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void usart_master_init(void) {
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usart_init();
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sdcfg.cr3 |= USART_CR3_HDSEL;
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sdStart(&SERIAL_USART_DRIVER, &sdcfg);
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}
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void usart_slave_init(void) {
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usart_init();
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sdcfg.cr3 |= USART_CR3_HDSEL;
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sdStart(&SERIAL_USART_DRIVER, &sdcfg);
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// Start transport thread
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chThdCreateStatic(waSlaveThread, sizeof(waSlaveThread), HIGHPRIO, SlaveThread, NULL);
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}
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static SSTD_t* Transaction_table = NULL;
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static uint8_t Transaction_table_size = 0;
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void soft_serial_initiator_init(SSTD_t* sstd_table, int sstd_table_size) {
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Transaction_table = sstd_table;
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Transaction_table_size = (uint8_t)sstd_table_size;
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usart_master_init();
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}
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void soft_serial_target_init(SSTD_t* sstd_table, int sstd_table_size) {
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Transaction_table = sstd_table;
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Transaction_table_size = (uint8_t)sstd_table_size;
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usart_slave_init();
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}
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void handle_soft_serial_slave(void) {
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uint8_t sstd_index = sdGet(&SERIAL_USART_DRIVER); // first chunk is always transaction id
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SSTD_t* trans = &Transaction_table[sstd_index];
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// Always write back the sstd_index as part of a basic handshake
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sstd_index ^= HANDSHAKE_MAGIC;
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sdWrite(&SERIAL_USART_DRIVER, &sstd_index, sizeof(sstd_index));
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if (trans->initiator2target_buffer_size) {
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sdRead(&SERIAL_USART_DRIVER, trans->initiator2target_buffer, trans->initiator2target_buffer_size);
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}
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if (trans->target2initiator_buffer_size) {
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sdWrite(&SERIAL_USART_DRIVER, trans->target2initiator_buffer, trans->target2initiator_buffer_size);
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}
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if (trans->status) {
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*trans->status = TRANSACTION_ACCEPTED;
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}
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}
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/////////
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// start transaction by initiator
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//
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// int soft_serial_transaction(int sstd_index)
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//
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// Returns:
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// TRANSACTION_END
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// TRANSACTION_NO_RESPONSE
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// TRANSACTION_DATA_ERROR
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#ifndef SERIAL_USE_MULTI_TRANSACTION
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int soft_serial_transaction(void) {
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uint8_t sstd_index = 0;
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#else
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int soft_serial_transaction(int index) {
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uint8_t sstd_index = index;
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#endif
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if (sstd_index > Transaction_table_size) return TRANSACTION_TYPE_ERROR;
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SSTD_t* trans = &Transaction_table[sstd_index];
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msg_t res = 0;
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sdClear(&SERIAL_USART_DRIVER);
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// First chunk is always transaction id
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sdWriteTimeout(&SERIAL_USART_DRIVER, &sstd_index, sizeof(sstd_index), TIME_MS2I(TIMEOUT));
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uint8_t sstd_index_shake = 0xFF;
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// Which we always read back first so that we can error out correctly
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// - due to the half duplex limitations on return codes, we always have to read *something*
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// - without the read, write only transactions *always* succeed, even during the boot process where the slave is not ready
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res = sdReadTimeout(&SERIAL_USART_DRIVER, &sstd_index_shake, sizeof(sstd_index_shake), TIME_MS2I(TIMEOUT));
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if (res < 0 || (sstd_index_shake != (sstd_index ^ HANDSHAKE_MAGIC))) {
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dprintf("serial::usart_shake NO_RESPONSE\n");
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return TRANSACTION_NO_RESPONSE;
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}
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if (trans->initiator2target_buffer_size) {
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res = sdWriteTimeout(&SERIAL_USART_DRIVER, trans->initiator2target_buffer, trans->initiator2target_buffer_size, TIME_MS2I(TIMEOUT));
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if (res < 0) {
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dprintf("serial::usart_transmit NO_RESPONSE\n");
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return TRANSACTION_NO_RESPONSE;
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}
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}
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if (trans->target2initiator_buffer_size) {
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res = sdReadTimeout(&SERIAL_USART_DRIVER, trans->target2initiator_buffer, trans->target2initiator_buffer_size, TIME_MS2I(TIMEOUT));
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if (res < 0) {
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dprintf("serial::usart_receive NO_RESPONSE\n");
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return TRANSACTION_NO_RESPONSE;
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}
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}
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return TRANSACTION_END;
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}
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