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https://github.com/openstenoproject/qmk
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Add template board files
This commit is contained in:
Fred Sundvik
Jack Humbert
parent
190b90892b
commit
551924f8a0
2 changed files with 223 additions and 0 deletions
110
drivers/ugfx/gdisp/is31fl3731c/board_is31fl3731c_template.h
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110
drivers/ugfx/gdisp/is31fl3731c/board_is31fl3731c_template.h
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/*
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Copyright 2016 Fred Sundvik <fsundvik@gmail.com>
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This program is free software: you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation, either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef _GDISP_LLD_BOARD_H
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#define _GDISP_LLD_BOARD_H
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static const I2CConfig i2ccfg = {
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400000 // clock speed (Hz); 400kHz max for IS31
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};
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static const uint8_t led_mask[] = {
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0xFF, 0x00, /* C1-1 -> C1-16 */
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0xFF, 0x00, /* C2-1 -> C2-16 */
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0xFF, 0x00, /* C3-1 -> C3-16 */
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0xFF, 0x00, /* C4-1 -> C4-16 */
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0x3F, 0x00, /* C5-1 -> C5-16 */
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0x00, 0x00, /* C6-1 -> C6-16 */
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0x00, 0x00, /* C7-1 -> C7-16 */
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0x00, 0x00, /* C8-1 -> C8-16 */
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0x00, 0x00, /* C9-1 -> C9-16 */
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};
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// The address of the LED
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#define LA(c, r) (c + r * 16 )
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// Need to be an address that is not mapped, but inside the range of the controller matrix
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#define NA LA(8, 8)
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// The numbers in the comments are the led numbers DXX on the PCB
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// The mapping is taken from the schematic of left hand side
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static const uint8_t led_mapping[GDISP_SCREEN_HEIGHT][GDISP_SCREEN_WIDTH] = {
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// 45 44 43 42 41 40 39
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{ LA(1, 1), LA(1, 0), LA(0, 4), LA(0, 3), LA(0, 2), LA(0, 1), LA(0, 0)},
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// 52 51 50 49 48 47 46
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{ LA(2, 3), LA(2, 2), LA(2, 1), LA(2, 0), LA(1, 4), LA(1, 3), LA(1, 2) },
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// 58 57 56 55 54 53 N/A
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{ LA(3, 4), LA(3, 3), LA(3, 2), LA(3, 1), LA(3, 0), LA(2, 4), NA },
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// 67 66 65 64 63 62 61
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{ LA(5, 3), LA(5, 2), LA(5, 1), LA(5, 0), LA(4, 4), LA(4, 3), LA(4, 2) },
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// 76 75 74 73 72 60 59
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{ LA(7, 3), LA(7, 2), LA(7, 1), LA(7, 0), LA(6, 3), LA(4, 1), LA(4, 0) },
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// N/A N/A N/A N/A N/A N/A 68
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{ NA, NA, NA, NA, NA, NA, LA(5, 4) },
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// N/A N/A N/A N/A 71 70 69
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{ NA, NA, NA, NA, LA(6, 2), LA(6, 1), LA(6, 0) },
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};
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#define IS31_ADDR_DEFAULT 0x74 // AD connected to GND
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#define IS31_TIMEOUT 5000
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static GFXINLINE void init_board(GDisplay *g) {
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(void) g;
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/* I2C pins */
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palSetPadMode(GPIOB, 0, PAL_MODE_ALTERNATIVE_2); // PTB0/I2C0/SCL
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palSetPadMode(GPIOB, 1, PAL_MODE_ALTERNATIVE_2); // PTB1/I2C0/SDA
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palSetPadMode(GPIOB, 16, PAL_MODE_OUTPUT_PUSHPULL);
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palClearPad(GPIOB, 16);
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/* start I2C */
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i2cStart(&I2CD1, &i2ccfg);
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// try high drive (from kiibohd)
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I2CD1.i2c->C2 |= I2Cx_C2_HDRS;
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// try glitch fixing (from kiibohd)
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I2CD1.i2c->FLT = 4;
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}
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static GFXINLINE void post_init_board(GDisplay *g) {
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(void) g;
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}
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static GFXINLINE const uint8_t* get_led_mask(GDisplay* g) {
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(void) g;
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return led_mask;
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}
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static GFXINLINE uint8_t get_led_address(GDisplay* g, uint16_t x, uint16_t y)
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{
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(void) g;
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return led_mapping[y][x];
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}
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static GFXINLINE void set_hardware_shutdown(GDisplay* g, bool shutdown) {
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(void) g;
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if(!shutdown) {
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palSetPad(GPIOB, 16);
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}
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else {
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palClearPad(GPIOB, 16);
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}
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}
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static GFXINLINE void write_data(GDisplay *g, uint8_t* data, uint16_t length) {
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(void) g;
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i2cMasterTransmitTimeout(&I2CD1, IS31_ADDR_DEFAULT, data, length, 0, 0, US2ST(IS31_TIMEOUT));
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}
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#endif /* _GDISP_LLD_BOARD_H */
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113
drivers/ugfx/gdisp/st7565/board_st7565_template.h
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113
drivers/ugfx/gdisp/st7565/board_st7565_template.h
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/*
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* This file is subject to the terms of the GFX License. If a copy of
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* the license was not distributed with this file, you can obtain one at:
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*
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* http://ugfx.org/license.html
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*/
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#ifndef _GDISP_LLD_BOARD_H
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#define _GDISP_LLD_BOARD_H
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#define ST7565_LCD_BIAS ST7565_LCD_BIAS_9 // actually 6
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#define ST7565_ADC ST7565_ADC_NORMAL
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#define ST7565_COM_SCAN ST7565_COM_SCAN_DEC
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#define ST7565_PAGE_ORDER 0,1,2,3
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/*
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* Custom page order for several LCD boards, e.g. HEM12864-99
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* #define ST7565_PAGE_ORDER 4,5,6,7,0,1,2,3
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*/
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#define ST7565_GPIOPORT GPIOC
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#define ST7565_PORT PORTC
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#define ST7565_A0_PIN 7
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#define ST7565_RST_PIN 8
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#define ST7565_MOSI_PIN 6
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#define ST7565_SLCK_PIN 5
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#define ST7565_SS_PIN 4
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#define palSetPadModeRaw(portname, bits) \
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ST7565_PORT->PCR[ST7565_##portname##_PIN] = bits
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#define palSetPadModeNamed(portname, portmode) \
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palSetPadMode(ST7565_GPIOPORT, ST7565_##portname##_PIN, portmode)
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#define ST7565_SPI_MODE PORTx_PCRn_DSE | PORTx_PCRn_MUX(2)
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// DSPI Clock and Transfer Attributes
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// Frame Size: 8 bits
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// MSB First
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// CLK Low by default
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static const SPIConfig spi1config = {
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// Operation complete callback or @p NULL.
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.end_cb = NULL,
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//The chip select line port - when not using pcs.
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.ssport = ST7565_GPIOPORT,
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// brief The chip select line pad number - when not using pcs.
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.sspad=ST7565_SS_PIN,
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// SPI initialization data.
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.tar0 =
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SPIx_CTARn_FMSZ(7) // Frame size = 8 bytes
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| SPIx_CTARn_ASC(1) // After SCK Delay Scaler (min 50 ns) = 55.56ns
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| SPIx_CTARn_DT(0) // Delay After Transfer Scaler (no minimum)= 27.78ns
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| SPIx_CTARn_CSSCK(0) // PCS to SCK Delay Scaler (min 20 ns) = 27.78ns
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| SPIx_CTARn_PBR(0) // Baud Rate Prescaler = 2
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| SPIx_CTARn_BR(0) // Baud rate (min 50ns) = 55.56ns
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};
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static GFXINLINE void acquire_bus(GDisplay *g) {
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(void) g;
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// Only the LCD is using the SPI bus, so no need to acquire
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// spiAcquireBus(&SPID1);
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spiSelect(&SPID1);
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}
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static GFXINLINE void release_bus(GDisplay *g) {
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(void) g;
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// Only the LCD is using the SPI bus, so no need to release
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//spiReleaseBus(&SPID1);
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spiUnselect(&SPID1);
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}
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static GFXINLINE void init_board(GDisplay *g) {
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(void) g;
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palSetPadModeNamed(A0, PAL_MODE_OUTPUT_PUSHPULL);
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palSetPad(ST7565_GPIOPORT, ST7565_A0_PIN);
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palSetPadModeNamed(RST, PAL_MODE_OUTPUT_PUSHPULL);
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palSetPad(ST7565_GPIOPORT, ST7565_RST_PIN);
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palSetPadModeRaw(MOSI, ST7565_SPI_MODE);
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palSetPadModeRaw(SLCK, ST7565_SPI_MODE);
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palSetPadModeNamed(SS, PAL_MODE_OUTPUT_PUSHPULL);
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spiInit();
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spiStart(&SPID1, &spi1config);
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release_bus(g);
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}
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static GFXINLINE void post_init_board(GDisplay *g) {
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(void) g;
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}
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static GFXINLINE void setpin_reset(GDisplay *g, bool_t state) {
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(void) g;
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if (state) {
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palClearPad(ST7565_GPIOPORT, ST7565_RST_PIN);
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}
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else {
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palSetPad(ST7565_GPIOPORT, ST7565_RST_PIN);
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}
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}
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static GFXINLINE void enter_data_mode(GDisplay *g) {
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palSetPad(ST7565_GPIOPORT, ST7565_A0_PIN);
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}
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static GFXINLINE void enter_cmd_mode(GDisplay *g) {
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palClearPad(ST7565_GPIOPORT, ST7565_A0_PIN);
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}
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static GFXINLINE void write_data(GDisplay *g, uint8_t* data, uint16_t length) {
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(void) g;
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spiSend(&SPID1, length, data);
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}
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#endif /* _GDISP_LLD_BOARD_H */
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