mirror of
https://github.com/openstenoproject/qmk
synced 2024-11-10 10:39:09 +00:00
Fix incorrect port direction setting in my previous pull request for pins B5, B6, B7 (#2739)
* Added support for audio using pins C4, C5, B6, B7 * Fixed bug where port direction wasn't set correctly for B5, B6, B7 audio ports
This commit is contained in:
parent
22215a0e92
commit
530dd446cb
1 changed files with 5 additions and 10 deletions
|
@ -76,7 +76,7 @@
|
||||||
|
|
||||||
#if defined(B5_AUDIO)
|
#if defined(B5_AUDIO)
|
||||||
#define BPIN_AUDIO
|
#define BPIN_AUDIO
|
||||||
#define BPIN_SET_DIRECTION DDRC |= _BV(PORTB5);
|
#define BPIN_SET_DIRECTION DDRB |= _BV(PORTB5);
|
||||||
#define INIT_AUDIO_COUNTER_1 TCCR1A = (0 << COM1A1) | (0 << COM1A0) | (1 << WGM11) | (0 << WGM10);
|
#define INIT_AUDIO_COUNTER_1 TCCR1A = (0 << COM1A1) | (0 << COM1A0) | (1 << WGM11) | (0 << WGM10);
|
||||||
#define ENABLE_AUDIO_COUNTER_1_ISR TIMSK1 |= _BV(OCIE1A)
|
#define ENABLE_AUDIO_COUNTER_1_ISR TIMSK1 |= _BV(OCIE1A)
|
||||||
#define DISABLE_AUDIO_COUNTER_1_ISR TIMSK1 &= ~_BV(OCIE1A)
|
#define DISABLE_AUDIO_COUNTER_1_ISR TIMSK1 &= ~_BV(OCIE1A)
|
||||||
|
@ -88,7 +88,7 @@
|
||||||
#endif
|
#endif
|
||||||
#if defined(B6_AUDIO)
|
#if defined(B6_AUDIO)
|
||||||
#define BPIN_AUDIO
|
#define BPIN_AUDIO
|
||||||
#define BPIN_SET_DIRECTION DDRC |= _BV(PORTB6);
|
#define BPIN_SET_DIRECTION DDRB |= _BV(PORTB6);
|
||||||
#define INIT_AUDIO_COUNTER_1 TCCR1A = (0 << COM1B1) | (0 << COM1B0) | (1 << WGM11) | (0 << WGM10);
|
#define INIT_AUDIO_COUNTER_1 TCCR1A = (0 << COM1B1) | (0 << COM1B0) | (1 << WGM11) | (0 << WGM10);
|
||||||
#define ENABLE_AUDIO_COUNTER_1_ISR TIMSK1 |= _BV(OCIE1B)
|
#define ENABLE_AUDIO_COUNTER_1_ISR TIMSK1 |= _BV(OCIE1B)
|
||||||
#define DISABLE_AUDIO_COUNTER_1_ISR TIMSK1 &= ~_BV(OCIE1B)
|
#define DISABLE_AUDIO_COUNTER_1_ISR TIMSK1 &= ~_BV(OCIE1B)
|
||||||
|
@ -100,7 +100,7 @@
|
||||||
#endif
|
#endif
|
||||||
#if defined(B7_AUDIO)
|
#if defined(B7_AUDIO)
|
||||||
#define BPIN_AUDIO
|
#define BPIN_AUDIO
|
||||||
#define BPIN_SET_DIRECTION DDRC |= _BV(PORTB7);
|
#define BPIN_SET_DIRECTION DDRB |= _BV(PORTB7);
|
||||||
#define INIT_AUDIO_COUNTER_1 TCCR1A = (0 << COM1C1) | (0 << COM1C0) | (1 << WGM11) | (0 << WGM10);
|
#define INIT_AUDIO_COUNTER_1 TCCR1A = (0 << COM1C1) | (0 << COM1C0) | (1 << WGM11) | (0 << WGM10);
|
||||||
#define ENABLE_AUDIO_COUNTER_1_ISR TIMSK1 |= _BV(OCIE1C)
|
#define ENABLE_AUDIO_COUNTER_1_ISR TIMSK1 |= _BV(OCIE1C)
|
||||||
#define DISABLE_AUDIO_COUNTER_1_ISR TIMSK1 &= ~_BV(OCIE1C)
|
#define DISABLE_AUDIO_COUNTER_1_ISR TIMSK1 &= ~_BV(OCIE1C)
|
||||||
|
@ -187,16 +187,11 @@ void audio_init()
|
||||||
// Set audio ports as output
|
// Set audio ports as output
|
||||||
#ifdef CPIN_AUDIO
|
#ifdef CPIN_AUDIO
|
||||||
CPIN_SET_DIRECTION
|
CPIN_SET_DIRECTION
|
||||||
|
DISABLE_AUDIO_COUNTER_3_ISR;
|
||||||
#endif
|
#endif
|
||||||
#ifdef BPIN_AUDIO
|
#ifdef BPIN_AUDIO
|
||||||
BPIN_SET_DIRECTION
|
BPIN_SET_DIRECTION
|
||||||
#endif
|
DISABLE_AUDIO_COUNTER_1_ISR;
|
||||||
|
|
||||||
#ifdef CPIN_AUDIO
|
|
||||||
DISABLE_AUDIO_COUNTER_3_ISR;
|
|
||||||
#endif
|
|
||||||
#ifdef BPIN_AUDIO
|
|
||||||
DISABLE_AUDIO_COUNTER_1_ISR;
|
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
// TCCR3A / TCCR3B: Timer/Counter #3 Control Registers TCCR3A/TCCR3B, TCCR1A/TCCR1B
|
// TCCR3A / TCCR3B: Timer/Counter #3 Control Registers TCCR3A/TCCR3B, TCCR1A/TCCR1B
|
||||||
|
|
Loading…
Reference in a new issue