Added support for Wb32fq95 (#16871)

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Joy Lee 2022-05-23 13:57:24 +08:00 committed by GitHub
parent 1182f5b4be
commit 1c7e8b9a9d
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15 changed files with 411 additions and 8 deletions

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@ -683,6 +683,40 @@ ifneq ($(findstring WB32F3G71, $(MCU)),)
WB32_BOOTLOADER_ADDRESS ?= 0x1FFFE000
endif
ifneq ($(findstring WB32FQ95, $(MCU)),)
# Cortex version
MCU = cortex-m3
# ARM version, CORTEX-M0/M1 are 6, CORTEX-M3/M4/M7 are 7
ARMV = 7
## chip/board settings
# - the next two should match the directories in
# <chibios[-contrib]>/os/hal/ports/$(MCU_PORT_NAME)/$(MCU_SERIES)
# OR
# <chibios[-contrib]>/os/hal/ports/$(MCU_FAMILY)/$(MCU_SERIES)
MCU_FAMILY = WB32
MCU_SERIES = WB32FQ95xx
# Linker script to use
# - it should exist either in <chibios>/os/common/ports/ARMCMx/compilers/GCC/ld/
# or <keyboard_dir>/ld/
MCU_LDSCRIPT ?= WB32FQ95xB
# Startup code to use
# - it should exist in <chibios>/os/common/startup/ARMCMx/compilers/GCC/mk/
MCU_STARTUP ?= wb32fq95xx
# Board: it should exist either in <chibios>/os/hal/boards/,
# <keyboard_dir>/boards/, or drivers/boards/
BOARD ?= GENERIC_WB32_FQ95XX
USE_FPU ?= no
# Bootloader address for WB32 DFU
WB32_BOOTLOADER_ADDRESS ?= 0x1FFFE000
endif
ifneq ($(findstring GD32VF103, $(MCU)),)
# RISC-V
MCU = risc-v

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@ -22,7 +22,7 @@
},
"processor": {
"type": "string",
"enum": ["cortex-m0", "cortex-m0plus", "cortex-m3", "cortex-m4", "MKL26Z64", "MK20DX128", "MK20DX256", "MK66FX1M0", "STM32F042", "STM32F072", "STM32F103", "STM32F303", "STM32F401", "STM32F405", "STM32F407", "STM32F411", "STM32F446", "STM32G431", "STM32G474", "STM32L412", "STM32L422", "STM32L432", "STM32L433", "STM32L442", "STM32L443", "GD32VF103", "WB32F3G71", "atmega16u2", "atmega32u2", "atmega16u4", "atmega32u4", "at90usb162", "at90usb646", "at90usb647", "at90usb1286", "at90usb1287", "atmega32a", "atmega328p", "atmega328", "attiny85", "unknown"]
"enum": ["cortex-m0", "cortex-m0plus", "cortex-m3", "cortex-m4", "MKL26Z64", "MK20DX128", "MK20DX256", "MK66FX1M0", "STM32F042", "STM32F072", "STM32F103", "STM32F303", "STM32F401", "STM32F405", "STM32F407", "STM32F411", "STM32F446", "STM32G431", "STM32G474", "STM32L412", "STM32L422", "STM32L432", "STM32L433", "STM32L442", "STM32L443", "GD32VF103", "WB32F3G71", "WB32FQ95", "atmega16u2", "atmega32u2", "atmega16u4", "atmega32u4", "at90usb162", "at90usb646", "at90usb647", "at90usb1286", "at90usb1287", "atmega32a", "atmega328p", "atmega328", "attiny85", "unknown"]
},
"audio": {
"type": "object",

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@ -51,6 +51,7 @@ You can also use any ARM chip with USB that [ChibiOS](https://www.chibios.org) s
### WestBerryTech (WB32)
* [WB32F3G71xx](http://www.westberrytech.com)
* [WB32FQ95xx](http://www.westberrytech.com)
### NXP (Kinetis)

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@ -14,7 +14,7 @@ QMK_FIRMWARE_UPSTREAM = 'qmk/qmk_firmware'
MAX_KEYBOARD_SUBFOLDERS = 5
# Supported processor types
CHIBIOS_PROCESSORS = 'cortex-m0', 'cortex-m0plus', 'cortex-m3', 'cortex-m4', 'MKL26Z64', 'MK20DX128', 'MK20DX256', 'MK66FX1M0', 'STM32F042', 'STM32F072', 'STM32F103', 'STM32F303', 'STM32F401', 'STM32F405', 'STM32F407', 'STM32F411', 'STM32F446', 'STM32G431', 'STM32G474', 'STM32L412', 'STM32L422', 'STM32L432', 'STM32L433', 'STM32L442', 'STM32L443', 'GD32VF103', 'WB32F3G71'
CHIBIOS_PROCESSORS = 'cortex-m0', 'cortex-m0plus', 'cortex-m3', 'cortex-m4', 'MKL26Z64', 'MK20DX128', 'MK20DX256', 'MK66FX1M0', 'STM32F042', 'STM32F072', 'STM32F103', 'STM32F303', 'STM32F401', 'STM32F405', 'STM32F407', 'STM32F411', 'STM32F446', 'STM32G431', 'STM32G474', 'STM32L412', 'STM32L422', 'STM32L432', 'STM32L433', 'STM32L442', 'STM32L443', 'GD32VF103', 'WB32F3G71', 'WB32FQ95'
LUFA_PROCESSORS = 'at90usb162', 'atmega16u2', 'atmega32u2', 'atmega16u4', 'atmega32u4', 'at90usb646', 'at90usb647', 'at90usb1286', 'at90usb1287', None
VUSB_PROCESSORS = 'atmega32a', 'atmega328p', 'atmega328', 'attiny85'
@ -43,6 +43,7 @@ MCU2BOOTLOADER = {
"STM32L443": "stm32-dfu",
"GD32VF103": "gd32v-dfu",
"WB32F3G71": "wb32-dfu",
"WB32FQ95": "wb32-dfu",
"atmega16u2": "atmel-dfu",
"atmega32u2": "atmel-dfu",
"atmega16u4": "atmel-dfu",

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@ -34,7 +34,10 @@
/*
* Board identifier.
*/
#define WB32F3G71x9
#if !(defined(WB32F3G71x9) || defined(WB32F3G71xB) || defined(WB32F3G71xC))
#define WB32F3G71x9
#endif
#if !defined(WB32F3G71xx)
#define WB32F3G71xx
#endif

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@ -0,0 +1,82 @@
/*
Copyright (C) 2022 Westberry Technology (ChangZhou) Corp., Ltd
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
*/
/*
* This file has been automatically generated using ChibiStudio board
* generator plugin. Do not edit manually.
*/
#include "hal.h"
/*===========================================================================*/
/* Driver local definitions. */
/*===========================================================================*/
/*===========================================================================*/
/* Driver exported variables. */
/*===========================================================================*/
/*===========================================================================*/
/* Driver local variables and types. */
/*===========================================================================*/
/*===========================================================================*/
/* Driver local functions. */
/*===========================================================================*/
static void wb32_gpio_init(void) {
#if WB32_HAS_GPIOA
rccEnableAPB1(RCC_APB1ENR_GPIOAEN);
#endif
#if WB32_HAS_GPIOB
rccEnableAPB1(RCC_APB1ENR_GPIOBEN);
#endif
#if WB32_HAS_GPIOC
rccEnableAPB1(RCC_APB1ENR_GPIOCEN);
#endif
#if WB32_HAS_GPIOD
rccEnableAPB1(RCC_APB1ENR_GPIODEN);
#endif
}
/*===========================================================================*/
/* Driver interrupt handlers. */
/*===========================================================================*/
/*===========================================================================*/
/* Driver exported functions. */
/*===========================================================================*/
/*
* Early initialization code.
* This initialization must be performed just after stack setup and before
* any other initialization.
*/
void __early_init(void) {
wb32_clock_init();
wb32_gpio_init();
}
/**
* @brief Board-specific initialization code.
* @note You can add your board-specific code here.
*/
void boardInit(void) {
}

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@ -0,0 +1,59 @@
#pragma once
/*
Copyright (C) 2022 Westberry Technology (ChangZhou) Corp., Ltd
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
*/
/*
* This file has been automatically generated using ChibiStudio board
* generator plugin. Do not edit manually.
*/
#ifndef BOARD_H
#define BOARD_H
/*===========================================================================*/
/* Driver constants. */
/*===========================================================================*/
/*
* Setup board.
*/
/*
* Board identifier.
*/
#if !(defined(WB32FQ95x9) || defined(WB32FQ95xB) || defined(WB32FQ95xC))
#define WB32FQ95xB
#endif
#if !defined(WB32FQ95xx)
#define WB32FQ95xx
#endif
/*===========================================================================*/
/* External declarations. */
/*===========================================================================*/
#if !defined(_FROM_ASM_)
#ifdef __cplusplus
extern "C" {
#endif
void boardInit(void);
#ifdef __cplusplus
}
#endif
#endif /* _FROM_ASM_ */
#endif /* BOARD_H */

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@ -0,0 +1,9 @@
# List of all the board related files.
BOARDSRC = $(BOARD_PATH)/board/board.c
# Required include directories
BOARDINC = $(BOARD_PATH)/board
# Shared variables
ALLCSRC += $(BOARDSRC)
ALLINC += $(BOARDINC)

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@ -0,0 +1,26 @@
/* Copyright 2020 QMK
*
* This program is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
/*
* This file was auto-generated by:
* `qmk chibios-confmigrate -i platforms/chibios/boards/GENERIC_WB32_F3G71XX/configs/chconf.h -r platforms/chibios/boards/common/configs/chconf.h`
*/
#pragma once
#define CH_CFG_ST_TIMEDELTA 0
#include_next <chconf.h>

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@ -0,0 +1,20 @@
/* Copyright (C) 2022 Westberry Technology (ChangZhou) Corp., Ltd
*
* This program is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <https://www.gnu.org/licenses/>.
*/
#pragma once
#ifndef EARLY_INIT_PERFORM_BOOTLOADER_JUMP
# define EARLY_INIT_PERFORM_BOOTLOADER_JUMP TRUE
#endif

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@ -0,0 +1,168 @@
/*
Copyright (C) 2022 Westberry Technology (ChangZhou) Corp., Ltd
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
*/
#ifndef MCUCONF_H
#define MCUCONF_H
#define WB32FQ95xx_MCUCONF TRUE
/*
* WB32FQ95 drivers configuration.
* The following settings override the default settings present in
* the various device driver implementation headers.
* Note that the settings for each driver only have effect if the whole
* driver is enabled in halconf.h.
*
* IRQ priorities:
* 15...0 Lowest...Highest.
*
*/
/**
* @name Internal clock sources
* @{
*/
#define WB32_HSECLK 12000000
#define WB32_LSECLK 32768
/*
* HAL driver system settings.
*/
#define WB32_NO_INIT FALSE
#define WB32_MHSI_ENABLED TRUE
#define WB32_FHSI_ENABLED FALSE
#define WB32_LSI_ENABLED FALSE
#define WB32_HSE_ENABLED TRUE
#define WB32_LSE_ENABLED FALSE
#define WB32_PLL_ENABLED TRUE
#define WB32_MAINCLKSRC WB32_MAINCLKSRC_PLL
#define WB32_PLLSRC WB32_PLLSRC_HSE
#define WB32_PLLDIV_VALUE 2
#define WB32_PLLMUL_VALUE 12 //The allowed range is 12,16,20,24.
#define WB32_HPRE 1
#define WB32_PPRE1 1
#define WB32_PPRE2 1
#define WB32_USBPRE WB32_USBPRE_DIV1P5
/*
* EXTI driver system settings.
*/
#define WB32_IRQ_EXTI0_PRIORITY 6
#define WB32_IRQ_EXTI1_PRIORITY 6
#define WB32_IRQ_EXTI2_PRIORITY 6
#define WB32_IRQ_EXTI3_PRIORITY 6
#define WB32_IRQ_EXTI4_PRIORITY 6
#define WB32_IRQ_EXTI5_9_PRIORITY 6
#define WB32_IRQ_EXTI10_15_PRIORITY 6
#define WB32_IRQ_EXTI16_PRIORITY 6
#define WB32_IRQ_EXTI17_PRIORITY 6
#define WB32_IRQ_EXTI18_PRIORITY 6
#define WB32_IRQ_EXTI19_PRIORITY 6
/*
* GPT driver system settings.
*/
#define WB32_TIM_MAX_CHANNELS 4
#define WB32_GPT_USE_TIM1 FALSE
#define WB32_GPT_USE_TIM2 FALSE
#define WB32_GPT_USE_TIM3 FALSE
#define WB32_GPT_USE_TIM4 FALSE
#define WB32_GPT_TIM1_IRQ_PRIORITY 7
#define WB32_GPT_TIM2_IRQ_PRIORITY 7
#define WB32_GPT_TIM3_IRQ_PRIORITY 7
#define WB32_GPT_TIM4_IRQ_PRIORITY 7
/*
* ICU driver system settings.
*/
#define WB32_ICU_USE_TIM1 FALSE
#define WB32_ICU_USE_TIM2 FALSE
#define WB32_ICU_USE_TIM3 FALSE
#define WB32_ICU_USE_TIM4 FALSE
#define WB32_ICU_TIM1_IRQ_PRIORITY 7
#define WB32_ICU_TIM2_IRQ_PRIORITY 7
#define WB32_ICU_TIM3_IRQ_PRIORITY 7
#define WB32_ICU_TIM4_IRQ_PRIORITY 7
/*
* PWM driver system settings.
*/
#define WB32_PWM_USE_ADVANCED FALSE
#define WB32_PWM_USE_TIM1 FALSE
#define WB32_PWM_USE_TIM2 FALSE
#define WB32_PWM_USE_TIM3 FALSE
#define WB32_PWM_USE_TIM4 FALSE
#define WB32_PWM_TIM1_IRQ_PRIORITY 7
#define WB32_PWM_TIM2_IRQ_PRIORITY 7
#define WB32_PWM_TIM3_IRQ_PRIORITY 7
#define WB32_PWM_TIM4_IRQ_PRIORITY 7
/*
* I2C driver system settings.
*/
#define WB32_I2C_USE_I2C1 FALSE
#define WB32_I2C_USE_I2C2 FALSE
#define WB32_I2C_BUSY_TIMEOUT 50
#define WB32_I2C_I2C1_IRQ_PRIORITY 5
#define WB32_I2C_I2C2_IRQ_PRIORITY 5
/*
* SERIAL driver system settings.
*/
#define WB32_SERIAL_USE_UART1 FALSE
#define WB32_SERIAL_USE_UART2 FALSE
#define WB32_SERIAL_USE_UART3 FALSE
#define WB32_SERIAL_USART1_PRIORITY 12
#define WB32_SERIAL_USART2_PRIORITY 12
#define WB32_SERIAL_USART3_PRIORITY 12
/*
* SPI driver system settings.
*/
#define WB32_SPI_USE_QSPI FALSE
#define WB32_SPI_USE_SPIM2 FALSE
#define WB32_SPI_USE_SPIS1 FALSE
#define WB32_SPI_USE_SPIS2 FALSE
#define WB32_SPI_QSPI_IRQ_PRIORITY 10
#define WB32_SPI_SPIM2_IRQ_PRIORITY 10
#define WB32_SPI_SPIS1_IRQ_PRIORITY 10
#define WB32_SPI_SPIS2_IRQ_PRIORITY 10
/*
* ST driver system settings.
*/
#define WB32_ST_IRQ_PRIORITY 8
#define WB32_ST_USE_TIMER 2
/*
* UART driver system settings.
*/
#define WB32_UART_USE_UART1 FALSE
#define WB32_UART_USE_UART2 FALSE
#define WB32_UART_USE_UART3 FALSE
#define WB32_UART_UART1_IRQ_PRIORITY 12
#define WB32_UART_UART2_IRQ_PRIORITY 12
#define WB32_UART_UART3_IRQ_PRIORITY 12
/*
* USB driver system settings.
*/
#define WB32_USB_USE_USB1 TRUE
#define WB32_USB_USB1_IRQ_PRIORITY 13
#define WB32_USB_HOST_WAKEUP_DURATION 10
#endif /* MCUCONF_H */

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@ -55,7 +55,7 @@
#if defined(MCU_WB32)
# define CPU_CLOCK WB32_MAINCLK
# if defined(WB32F3G71xx)
# if defined(WB32F3G71xx) || defined(WB32FQ95xx)
# define PAL_OUTPUT_TYPE_OPENDRAIN PAL_WB32_OTYPE_OPENDRAIN
# define PAL_OUTPUT_TYPE_PUSHPULL PAL_WB32_OTYPE_PUSHPULL
# define PAL_OUTPUT_SPEED_HIGHEST PAL_WB32_OSPEED_HIGH

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@ -97,7 +97,7 @@ static const I2CConfig i2cconfig = {
I2C1_OPMODE,
I2C1_CLOCK_SPEED,
I2C1_DUTY_CYCLE,
#elif defined(WB32F3G71xx)
#elif defined(WB32F3G71xx) || defined(WB32FQ95xx)
I2C1_OPMODE,
I2C1_CLOCK_SPEED,
#else

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@ -54,7 +54,7 @@ bool spi_start(pin_t slavePin, bool lsbFirst, uint8_t mode, uint16_t divisor) {
return false;
}
#ifndef WB32F3G71xx
#if !(defined(WB32F3G71xx) || defined(WB32FQ95xx))
uint16_t roundedDivisor = 2;
while (roundedDivisor < divisor) {
roundedDivisor <<= 1;
@ -138,7 +138,7 @@ bool spi_start(pin_t slavePin, bool lsbFirst, uint8_t mode, uint16_t divisor) {
spiConfig.cpr = (roundedDivisor - 1) >> 1;
#elif defined(WB32F3G71xx)
#elif defined(WB32F3G71xx) || defined(WB32FQ95xx)
if (!lsbFirst) {
osalDbgAssert(lsbFirst != FALSE, "unsupported lsbFirst");
}

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@ -18,7 +18,7 @@
#include "quantum.h"
#if defined(WB32F3G71xx)
#if defined(WB32F3G71xx) || defined(WB32FQ95xx)
static SerialConfig serialConfig = {SERIAL_DEFAULT_BITRATE, SD1_WRDLEN, SD1_STPBIT, SD1_PARITY, SD1_ATFLCT};
#else
static SerialConfig serialConfig = {SERIAL_DEFAULT_BITRATE, SD1_CR1, SD1_CR2, SD1_CR3};