2020-03-06 01:40:39 +00:00
|
|
|
/*
|
|
|
|
ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
|
|
|
|
|
|
|
|
Licensed under the Apache License, Version 2.0 (the "License");
|
|
|
|
you may not use this file except in compliance with the License.
|
|
|
|
You may obtain a copy of the License at
|
|
|
|
|
|
|
|
http://www.apache.org/licenses/LICENSE-2.0
|
|
|
|
|
|
|
|
Unless required by applicable law or agreed to in writing, software
|
|
|
|
distributed under the License is distributed on an "AS IS" BASIS,
|
|
|
|
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
|
|
|
See the License for the specific language governing permissions and
|
|
|
|
limitations under the License.
|
|
|
|
*/
|
|
|
|
|
|
|
|
/*
|
|
|
|
* This file has been automatically generated using ChibiStudio board
|
|
|
|
* generator plugin. Do not edit manually.
|
|
|
|
*/
|
|
|
|
|
|
|
|
#include "hal.h"
|
|
|
|
#include "stm32_gpio.h"
|
|
|
|
|
|
|
|
/*===========================================================================*/
|
|
|
|
/* Driver local definitions. */
|
|
|
|
/*===========================================================================*/
|
|
|
|
|
|
|
|
/*===========================================================================*/
|
|
|
|
/* Driver exported variables. */
|
|
|
|
/*===========================================================================*/
|
|
|
|
|
|
|
|
/*===========================================================================*/
|
|
|
|
/* Driver local variables and types. */
|
|
|
|
/*===========================================================================*/
|
|
|
|
|
|
|
|
/**
|
|
|
|
* @brief Type of STM32 GPIO port setup.
|
|
|
|
*/
|
|
|
|
typedef struct {
|
2020-03-06 02:15:29 +00:00
|
|
|
uint32_t moder;
|
|
|
|
uint32_t otyper;
|
|
|
|
uint32_t ospeedr;
|
|
|
|
uint32_t pupdr;
|
|
|
|
uint32_t odr;
|
|
|
|
uint32_t afrl;
|
|
|
|
uint32_t afrh;
|
2020-03-06 01:40:39 +00:00
|
|
|
} gpio_setup_t;
|
|
|
|
|
|
|
|
/**
|
|
|
|
* @brief Type of STM32 GPIO initialization data.
|
|
|
|
*/
|
|
|
|
typedef struct {
|
|
|
|
#if STM32_HAS_GPIOA || defined(__DOXYGEN__)
|
2020-03-06 02:15:29 +00:00
|
|
|
gpio_setup_t PAData;
|
2020-03-06 01:40:39 +00:00
|
|
|
#endif
|
|
|
|
#if STM32_HAS_GPIOB || defined(__DOXYGEN__)
|
2020-03-06 02:15:29 +00:00
|
|
|
gpio_setup_t PBData;
|
2020-03-06 01:40:39 +00:00
|
|
|
#endif
|
|
|
|
#if STM32_HAS_GPIOC || defined(__DOXYGEN__)
|
2020-03-06 02:15:29 +00:00
|
|
|
gpio_setup_t PCData;
|
2020-03-06 01:40:39 +00:00
|
|
|
#endif
|
|
|
|
#if STM32_HAS_GPIOD || defined(__DOXYGEN__)
|
2020-03-06 02:15:29 +00:00
|
|
|
gpio_setup_t PDData;
|
2020-03-06 01:40:39 +00:00
|
|
|
#endif
|
|
|
|
#if STM32_HAS_GPIOE || defined(__DOXYGEN__)
|
2020-03-06 02:15:29 +00:00
|
|
|
gpio_setup_t PEData;
|
2020-03-06 01:40:39 +00:00
|
|
|
#endif
|
|
|
|
#if STM32_HAS_GPIOF || defined(__DOXYGEN__)
|
2020-03-06 02:15:29 +00:00
|
|
|
gpio_setup_t PFData;
|
2020-03-06 01:40:39 +00:00
|
|
|
#endif
|
|
|
|
#if STM32_HAS_GPIOG || defined(__DOXYGEN__)
|
2020-03-06 02:15:29 +00:00
|
|
|
gpio_setup_t PGData;
|
2020-03-06 01:40:39 +00:00
|
|
|
#endif
|
|
|
|
#if STM32_HAS_GPIOH || defined(__DOXYGEN__)
|
2020-03-06 02:15:29 +00:00
|
|
|
gpio_setup_t PHData;
|
2020-03-06 01:40:39 +00:00
|
|
|
#endif
|
|
|
|
#if STM32_HAS_GPIOI || defined(__DOXYGEN__)
|
2020-03-06 02:15:29 +00:00
|
|
|
gpio_setup_t PIData;
|
2020-03-06 01:40:39 +00:00
|
|
|
#endif
|
|
|
|
#if STM32_HAS_GPIOJ || defined(__DOXYGEN__)
|
2020-03-06 02:15:29 +00:00
|
|
|
gpio_setup_t PJData;
|
2020-03-06 01:40:39 +00:00
|
|
|
#endif
|
|
|
|
#if STM32_HAS_GPIOK || defined(__DOXYGEN__)
|
2020-03-06 02:15:29 +00:00
|
|
|
gpio_setup_t PKData;
|
2020-03-06 01:40:39 +00:00
|
|
|
#endif
|
|
|
|
} gpio_config_t;
|
|
|
|
|
|
|
|
/**
|
|
|
|
* @brief STM32 GPIO static initialization data.
|
|
|
|
*/
|
|
|
|
static const gpio_config_t gpio_default_config = {
|
|
|
|
#if STM32_HAS_GPIOA
|
2020-03-06 02:15:29 +00:00
|
|
|
{VAL_GPIOA_MODER, VAL_GPIOA_OTYPER, VAL_GPIOA_OSPEEDR, VAL_GPIOA_PUPDR, VAL_GPIOA_ODR, VAL_GPIOA_AFRL, VAL_GPIOA_AFRH},
|
2020-03-06 01:40:39 +00:00
|
|
|
#endif
|
|
|
|
#if STM32_HAS_GPIOB
|
2020-03-06 02:15:29 +00:00
|
|
|
{VAL_GPIOB_MODER, VAL_GPIOB_OTYPER, VAL_GPIOB_OSPEEDR, VAL_GPIOB_PUPDR, VAL_GPIOB_ODR, VAL_GPIOB_AFRL, VAL_GPIOB_AFRH},
|
2020-03-06 01:40:39 +00:00
|
|
|
#endif
|
|
|
|
#if STM32_HAS_GPIOC
|
2020-03-06 02:15:29 +00:00
|
|
|
{VAL_GPIOC_MODER, VAL_GPIOC_OTYPER, VAL_GPIOC_OSPEEDR, VAL_GPIOC_PUPDR, VAL_GPIOC_ODR, VAL_GPIOC_AFRL, VAL_GPIOC_AFRH},
|
2020-03-06 01:40:39 +00:00
|
|
|
#endif
|
|
|
|
#if STM32_HAS_GPIOD
|
2020-03-06 02:15:29 +00:00
|
|
|
{VAL_GPIOD_MODER, VAL_GPIOD_OTYPER, VAL_GPIOD_OSPEEDR, VAL_GPIOD_PUPDR, VAL_GPIOD_ODR, VAL_GPIOD_AFRL, VAL_GPIOD_AFRH},
|
2020-03-06 01:40:39 +00:00
|
|
|
#endif
|
|
|
|
#if STM32_HAS_GPIOE
|
2020-03-06 02:15:29 +00:00
|
|
|
{VAL_GPIOE_MODER, VAL_GPIOE_OTYPER, VAL_GPIOE_OSPEEDR, VAL_GPIOE_PUPDR, VAL_GPIOE_ODR, VAL_GPIOE_AFRL, VAL_GPIOE_AFRH},
|
2020-03-06 01:40:39 +00:00
|
|
|
#endif
|
|
|
|
#if STM32_HAS_GPIOF
|
2020-03-06 02:15:29 +00:00
|
|
|
{VAL_GPIOF_MODER, VAL_GPIOF_OTYPER, VAL_GPIOF_OSPEEDR, VAL_GPIOF_PUPDR, VAL_GPIOF_ODR, VAL_GPIOF_AFRL, VAL_GPIOF_AFRH},
|
2020-03-06 01:40:39 +00:00
|
|
|
#endif
|
|
|
|
#if STM32_HAS_GPIOG
|
2020-03-06 02:15:29 +00:00
|
|
|
{VAL_GPIOG_MODER, VAL_GPIOG_OTYPER, VAL_GPIOG_OSPEEDR, VAL_GPIOG_PUPDR, VAL_GPIOG_ODR, VAL_GPIOG_AFRL, VAL_GPIOG_AFRH},
|
2020-03-06 01:40:39 +00:00
|
|
|
#endif
|
|
|
|
#if STM32_HAS_GPIOH
|
2020-03-06 02:15:29 +00:00
|
|
|
{VAL_GPIOH_MODER, VAL_GPIOH_OTYPER, VAL_GPIOH_OSPEEDR, VAL_GPIOH_PUPDR, VAL_GPIOH_ODR, VAL_GPIOH_AFRL, VAL_GPIOH_AFRH},
|
2020-03-06 01:40:39 +00:00
|
|
|
#endif
|
|
|
|
#if STM32_HAS_GPIOI
|
2020-03-06 02:15:29 +00:00
|
|
|
{VAL_GPIOI_MODER, VAL_GPIOI_OTYPER, VAL_GPIOI_OSPEEDR, VAL_GPIOI_PUPDR, VAL_GPIOI_ODR, VAL_GPIOI_AFRL, VAL_GPIOI_AFRH},
|
2020-03-06 01:40:39 +00:00
|
|
|
#endif
|
|
|
|
#if STM32_HAS_GPIOJ
|
2020-03-06 02:15:29 +00:00
|
|
|
{VAL_GPIOJ_MODER, VAL_GPIOJ_OTYPER, VAL_GPIOJ_OSPEEDR, VAL_GPIOJ_PUPDR, VAL_GPIOJ_ODR, VAL_GPIOJ_AFRL, VAL_GPIOJ_AFRH},
|
2020-03-06 01:40:39 +00:00
|
|
|
#endif
|
|
|
|
#if STM32_HAS_GPIOK
|
2020-03-06 02:15:29 +00:00
|
|
|
{VAL_GPIOK_MODER, VAL_GPIOK_OTYPER, VAL_GPIOK_OSPEEDR, VAL_GPIOK_PUPDR, VAL_GPIOK_ODR, VAL_GPIOK_AFRL, VAL_GPIOK_AFRH}
|
2020-03-06 01:40:39 +00:00
|
|
|
#endif
|
|
|
|
};
|
|
|
|
|
|
|
|
/*===========================================================================*/
|
|
|
|
/* Driver local functions. */
|
|
|
|
/*===========================================================================*/
|
|
|
|
|
|
|
|
static void gpio_init(stm32_gpio_t *gpiop, const gpio_setup_t *config) {
|
2020-03-06 02:15:29 +00:00
|
|
|
gpiop->OTYPER = config->otyper;
|
|
|
|
gpiop->OSPEEDR = config->ospeedr;
|
|
|
|
gpiop->PUPDR = config->pupdr;
|
|
|
|
gpiop->ODR = config->odr;
|
|
|
|
gpiop->AFRL = config->afrl;
|
|
|
|
gpiop->AFRH = config->afrh;
|
|
|
|
gpiop->MODER = config->moder;
|
2020-03-06 01:40:39 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
static void stm32_gpio_init(void) {
|
2020-03-06 02:15:29 +00:00
|
|
|
/* Enabling GPIO-related clocks, the mask comes from the
|
|
|
|
registry header file.*/
|
|
|
|
rccResetAHB1(STM32_GPIO_EN_MASK);
|
|
|
|
rccEnableAHB1(STM32_GPIO_EN_MASK, true);
|
2020-03-06 01:40:39 +00:00
|
|
|
|
2020-03-06 02:15:29 +00:00
|
|
|
/* Initializing all the defined GPIO ports.*/
|
2020-03-06 01:40:39 +00:00
|
|
|
#if STM32_HAS_GPIOA
|
2020-03-06 02:15:29 +00:00
|
|
|
gpio_init(GPIOA, &gpio_default_config.PAData);
|
2020-03-06 01:40:39 +00:00
|
|
|
#endif
|
|
|
|
#if STM32_HAS_GPIOB
|
2020-03-06 02:15:29 +00:00
|
|
|
gpio_init(GPIOB, &gpio_default_config.PBData);
|
2020-03-06 01:40:39 +00:00
|
|
|
#endif
|
|
|
|
#if STM32_HAS_GPIOC
|
2020-03-06 02:15:29 +00:00
|
|
|
gpio_init(GPIOC, &gpio_default_config.PCData);
|
2020-03-06 01:40:39 +00:00
|
|
|
#endif
|
|
|
|
#if STM32_HAS_GPIOD
|
2020-03-06 02:15:29 +00:00
|
|
|
gpio_init(GPIOD, &gpio_default_config.PDData);
|
2020-03-06 01:40:39 +00:00
|
|
|
#endif
|
|
|
|
#if STM32_HAS_GPIOE
|
2020-03-06 02:15:29 +00:00
|
|
|
gpio_init(GPIOE, &gpio_default_config.PEData);
|
2020-03-06 01:40:39 +00:00
|
|
|
#endif
|
|
|
|
#if STM32_HAS_GPIOF
|
2020-03-06 02:15:29 +00:00
|
|
|
gpio_init(GPIOF, &gpio_default_config.PFData);
|
2020-03-06 01:40:39 +00:00
|
|
|
#endif
|
|
|
|
#if STM32_HAS_GPIOG
|
2020-03-06 02:15:29 +00:00
|
|
|
gpio_init(GPIOG, &gpio_default_config.PGData);
|
2020-03-06 01:40:39 +00:00
|
|
|
#endif
|
|
|
|
#if STM32_HAS_GPIOH
|
2020-03-06 02:15:29 +00:00
|
|
|
gpio_init(GPIOH, &gpio_default_config.PHData);
|
2020-03-06 01:40:39 +00:00
|
|
|
#endif
|
|
|
|
#if STM32_HAS_GPIOI
|
2020-03-06 02:15:29 +00:00
|
|
|
gpio_init(GPIOI, &gpio_default_config.PIData);
|
2020-03-06 01:40:39 +00:00
|
|
|
#endif
|
|
|
|
#if STM32_HAS_GPIOJ
|
2020-03-06 02:15:29 +00:00
|
|
|
gpio_init(GPIOJ, &gpio_default_config.PJData);
|
2020-03-06 01:40:39 +00:00
|
|
|
#endif
|
|
|
|
#if STM32_HAS_GPIOK
|
2020-03-06 02:15:29 +00:00
|
|
|
gpio_init(GPIOK, &gpio_default_config.PKData);
|
2020-03-06 01:40:39 +00:00
|
|
|
#endif
|
|
|
|
}
|
|
|
|
|
|
|
|
/*===========================================================================*/
|
|
|
|
/* Driver interrupt handlers. */
|
|
|
|
/*===========================================================================*/
|
|
|
|
|
|
|
|
/*===========================================================================*/
|
|
|
|
/* Driver exported functions. */
|
|
|
|
/*===========================================================================*/
|
|
|
|
|
|
|
|
__attribute__((weak)) void enter_bootloader_mode_if_requested(void) {}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* @brief Early initialization code.
|
|
|
|
* @details GPIO ports and system clocks are initialized before everything
|
|
|
|
* else.
|
|
|
|
*/
|
|
|
|
void __early_init(void) {
|
2020-03-06 02:15:29 +00:00
|
|
|
enter_bootloader_mode_if_requested();
|
2020-03-06 01:40:39 +00:00
|
|
|
|
2020-03-06 02:15:29 +00:00
|
|
|
stm32_gpio_init();
|
|
|
|
stm32_clock_init();
|
2020-03-06 01:40:39 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
#if HAL_USE_SDC || defined(__DOXYGEN__)
|
|
|
|
/**
|
|
|
|
* @brief SDC card detection.
|
|
|
|
*/
|
|
|
|
bool sdc_lld_is_card_inserted(SDCDriver *sdcp) {
|
2020-03-06 02:15:29 +00:00
|
|
|
(void)sdcp;
|
|
|
|
/* TODO: Fill the implementation.*/
|
|
|
|
return true;
|
2020-03-06 01:40:39 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* @brief SDC card write protection detection.
|
|
|
|
*/
|
|
|
|
bool sdc_lld_is_write_protected(SDCDriver *sdcp) {
|
2020-03-06 02:15:29 +00:00
|
|
|
(void)sdcp;
|
|
|
|
/* TODO: Fill the implementation.*/
|
|
|
|
return false;
|
2020-03-06 01:40:39 +00:00
|
|
|
}
|
|
|
|
#endif /* HAL_USE_SDC */
|
|
|
|
|
|
|
|
#if HAL_USE_MMC_SPI || defined(__DOXYGEN__)
|
|
|
|
/**
|
|
|
|
* @brief MMC_SPI card detection.
|
|
|
|
*/
|
|
|
|
bool mmc_lld_is_card_inserted(MMCDriver *mmcp) {
|
2020-03-06 02:15:29 +00:00
|
|
|
(void)mmcp;
|
|
|
|
/* TODO: Fill the implementation.*/
|
|
|
|
return true;
|
2020-03-06 01:40:39 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* @brief MMC_SPI card write protection detection.
|
|
|
|
*/
|
|
|
|
bool mmc_lld_is_write_protected(MMCDriver *mmcp) {
|
2020-03-06 02:15:29 +00:00
|
|
|
(void)mmcp;
|
|
|
|
/* TODO: Fill the implementation.*/
|
|
|
|
return false;
|
2020-03-06 01:40:39 +00:00
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
|
|
|
/**
|
|
|
|
* @brief Board-specific initialization code.
|
|
|
|
* @todo Add your board-specific code, if any.
|
|
|
|
*/
|
2020-03-06 02:15:29 +00:00
|
|
|
void boardInit(void) {}
|