forked from mirrors/qmk_firmware
93 lines
2.6 KiB
C
93 lines
2.6 KiB
C
/**
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* matrix.c
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*/
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#include <stdint.h>
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#include <stdbool.h>
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#include <string.h>
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#include "quantum.h"
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#include "matrix.h"
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#include "tca6424.h"
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#include "m20add.h"
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static const uint16_t col_pins[MATRIX_COLS] = MATRIX_M20_COL_PINS;
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void matrix_init_custom(void)
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{
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tca6424_init();
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// set port0
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tca6424_write_config(TCA6424_PORT0, 0);
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// set port1
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tca6424_write_config(TCA6424_PORT1, 0);
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// set port2
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tca6424_write_config(TCA6424_PORT2, 0xF5);
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// clear output
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tca6424_write_port(TCA6424_PORT0, 0);
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tca6424_write_port(TCA6424_PORT1, 0);
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tca6424_write_port(TCA6424_PORT2, 0);
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}
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static uint8_t row_mask[] = {ROW1_MASK,ROW2_MASK,ROW3_MASK,ROW4_MASK,ROW5_MASK,ROW6_MASK};
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static uint8_t col_mask[] = {COL1_MASK, COL2_MASK, COL3_MASK, COL4_MASK, COL5_MASK, COL6_MASK, COL7_MASK, COL8_MASK, COL9_MASK, COL10_MASK, COL11_MASK, COL12_MASK, COL13_MASK, COL14_MASK, COL15_MASK, COL16_MASK};
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bool matrix_scan_custom(matrix_row_t current_matrix[])
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{
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bool changed = false;
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uint8_t p0_data = tca6424_read_port(TCA6424_PORT0);
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for (int col = 0; col < MATRIX_COLS; col++) {
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// Select col and wait for col selecton to stabilize
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switch(col) {
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case 0:
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set_pin(col_pins[col]);
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break;
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case 1 ... 8:
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tca6424_write_port(TCA6424_PORT1, col_mask[col]);
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break;
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default:
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tca6424_write_port(TCA6424_PORT0, col_mask[col]|(p0_data&0x01));
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break;
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}
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matrix_io_delay();
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// read row port for all rows
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uint8_t row_value = tca6424_read_port(ROW_PORT);
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for (uint8_t row = 0; row < MATRIX_ROWS; row++) {
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uint8_t tmp = row;
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// Store last value of row prior to reading
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matrix_row_t last_row_value = current_matrix[tmp];
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// Check row pin state
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if (row_value & row_mask[row]) {
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// Pin HI, set col bit
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current_matrix[tmp] |= (1 << col);
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} else {
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// Pin LOW, clear col bit
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current_matrix[tmp] &= ~(1 << col);
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}
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// Determine if the matrix changed state
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if ((last_row_value != current_matrix[tmp]) && !(changed)) {
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changed = true;
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}
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}
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// Unselect col
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switch(col) {
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case 0:
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clear_pin(col_pins[col]);
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break;
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case 8:
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tca6424_write_port(TCA6424_PORT1, 0);
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break;
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case 15:
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tca6424_write_port(TCA6424_PORT0, p0_data&0x01);
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break;
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default:
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break;
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}
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}
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return changed;
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}
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