686a9d35ff
* Re-fix the dual-bank bootloader stuff. * Use wait_ms() instead of using nop's for a delay, as ChibiOS is actually running at the time of bootloader jump.
106 lines
3.7 KiB
C
106 lines
3.7 KiB
C
#include "bootloader.h"
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#include "ch.h"
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#include "hal.h"
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#include "wait.h"
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/* This code should be checked whether it runs correctly on platforms */
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#define SYMVAL(sym) (uint32_t)(((uint8_t *)&(sym)) - ((uint8_t *)0))
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#define BOOTLOADER_MAGIC 0xDEADBEEF
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#define MAGIC_ADDR (unsigned long *)(SYMVAL(__ram0_end__) - 4)
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#ifndef STM32_BOOTLOADER_DUAL_BANK
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# define STM32_BOOTLOADER_DUAL_BANK FALSE
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#endif
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#if STM32_BOOTLOADER_DUAL_BANK
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// Need pin definitions
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# include "config_common.h"
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# ifndef STM32_BOOTLOADER_DUAL_BANK_GPIO
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# error "No STM32_BOOTLOADER_DUAL_BANK_GPIO defined, don't know which pin to toggle"
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# endif
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# ifndef STM32_BOOTLOADER_DUAL_BANK_POLARITY
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# define STM32_BOOTLOADER_DUAL_BANK_POLARITY 0
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# endif
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# ifndef STM32_BOOTLOADER_DUAL_BANK_DELAY
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# define STM32_BOOTLOADER_DUAL_BANK_DELAY 100000
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# endif
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extern uint32_t __ram0_end__;
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void bootloader_jump(void) {
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// For STM32 MCUs with dual-bank flash, and we're incapable of jumping to the bootloader. The first valid flash
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// bank is executed unconditionally after a reset, so it doesn't enter DFU unless BOOT0 is high. Instead, we do
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// it with hardware...in this case, we pull a GPIO high/low depending on the configuration, connects 3.3V to
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// BOOT0's RC charging circuit, lets it charge the capacitor, and issue a system reset. See the QMK discord
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// #hardware channel pins for an example circuit.
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palSetPadMode(PAL_PORT(STM32_BOOTLOADER_DUAL_BANK_GPIO), PAL_PAD(STM32_BOOTLOADER_DUAL_BANK_GPIO), PAL_MODE_OUTPUT_PUSHPULL);
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# if STM32_BOOTLOADER_DUAL_BANK_POLARITY
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palSetPad(PAL_PORT(STM32_BOOTLOADER_DUAL_BANK_GPIO), PAL_PAD(STM32_BOOTLOADER_DUAL_BANK_GPIO));
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# else
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palClearPad(PAL_PORT(STM32_BOOTLOADER_DUAL_BANK_GPIO), PAL_PAD(STM32_BOOTLOADER_DUAL_BANK_GPIO));
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# endif
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// Wait for a while for the capacitor to charge
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wait_ms(100);
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// Issue a system reset to get the ROM bootloader to execute, with BOOT0 high
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NVIC_SystemReset();
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}
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void enter_bootloader_mode_if_requested(void) {} // not needed at all, but if anybody attempts to invoke it....
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#elif defined(STM32_BOOTLOADER_ADDRESS) // STM32_BOOTLOADER_DUAL_BANK
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extern uint32_t __ram0_end__;
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void bootloader_jump(void) {
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*MAGIC_ADDR = BOOTLOADER_MAGIC; // set magic flag => reset handler will jump into boot loader
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NVIC_SystemReset();
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}
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void enter_bootloader_mode_if_requested(void) {
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unsigned long *check = MAGIC_ADDR;
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if (*check == BOOTLOADER_MAGIC) {
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*check = 0;
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__set_CONTROL(0);
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__set_MSP(*(__IO uint32_t *)STM32_BOOTLOADER_ADDRESS);
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__enable_irq();
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typedef void (*BootJump_t)(void);
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BootJump_t boot_jump = *(BootJump_t *)(STM32_BOOTLOADER_ADDRESS + 4);
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boot_jump();
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while (1)
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;
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}
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}
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#elif defined(KL2x) || defined(K20x) // STM32_BOOTLOADER_DUAL_BANK // STM32_BOOTLOADER_ADDRESS
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/* Kinetis */
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# if defined(KIIBOHD_BOOTLOADER)
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/* Kiibohd Bootloader (MCHCK and Infinity KB) */
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# define SCB_AIRCR_VECTKEY_WRITEMAGIC 0x05FA0000
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const uint8_t sys_reset_to_loader_magic[] = "\xff\x00\x7fRESET TO LOADER\x7f\x00\xff";
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void bootloader_jump(void) {
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__builtin_memcpy((void *)VBAT, (const void *)sys_reset_to_loader_magic, sizeof(sys_reset_to_loader_magic));
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// request reset
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SCB->AIRCR = SCB_AIRCR_VECTKEY_WRITEMAGIC | SCB_AIRCR_SYSRESETREQ_Msk;
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}
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# else /* defined(KIIBOHD_BOOTLOADER) */
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/* Default for Kinetis - expecting an ARM Teensy */
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# include "wait.h"
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void bootloader_jump(void) {
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wait_ms(100);
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__BKPT(0);
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}
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# endif /* defined(KIIBOHD_BOOTLOADER) */
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#else /* neither STM32 nor KINETIS */
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__attribute__((weak)) void bootloader_jump(void) {}
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#endif
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