forked from mirrors/qmk_firmware
Keyboard: Update the serial.c of crkbd based on the helix-serial.c (#4349)
This commit is contained in:
parent
e9fd42df71
commit
756d92c1a0
6 changed files with 277 additions and 105 deletions
|
@ -1,10 +1,4 @@
|
||||||
#pragma once
|
#ifndef SOFT_SERIAL_PIN
|
||||||
|
#define SOFT_SERIAL_PIN D2
|
||||||
/* Soft Serial defines */
|
|
||||||
#define SERIAL_PIN_DDR DDRD
|
|
||||||
#define SERIAL_PIN_PORT PORTD
|
|
||||||
#define SERIAL_PIN_INPUT PIND
|
|
||||||
#define SERIAL_PIN_MASK _BV(PD2)
|
|
||||||
#define SERIAL_PIN_INTERRUPT INT2_vect
|
|
||||||
|
|
||||||
#define SERIAL_USE_MULTI_TRANSACTION
|
#define SERIAL_USE_MULTI_TRANSACTION
|
||||||
|
#endif
|
||||||
|
|
|
@ -7,8 +7,8 @@
|
||||||
#include <stddef.h>
|
#include <stddef.h>
|
||||||
#include <split_scomm.h>
|
#include <split_scomm.h>
|
||||||
#include "serial.h"
|
#include "serial.h"
|
||||||
#ifdef SERIAL_DEBUG_MODE
|
#ifdef CONSOLE_ENABLE
|
||||||
#include <avr/io.h>
|
#include <print.h>
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
uint8_t volatile serial_slave_buffer[SERIAL_SLAVE_BUFFER_LENGTH] = {0};
|
uint8_t volatile serial_slave_buffer[SERIAL_SLAVE_BUFFER_LENGTH] = {0};
|
||||||
|
@ -17,6 +17,7 @@ uint8_t volatile status_com = 0;
|
||||||
uint8_t volatile status1 = 0;
|
uint8_t volatile status1 = 0;
|
||||||
uint8_t slave_buffer_change_count = 0;
|
uint8_t slave_buffer_change_count = 0;
|
||||||
uint8_t s_change_old = 0xff;
|
uint8_t s_change_old = 0xff;
|
||||||
|
uint8_t s_change_new = 0xff;
|
||||||
|
|
||||||
SSTD_t transactions[] = {
|
SSTD_t transactions[] = {
|
||||||
#define GET_SLAVE_STATUS 0
|
#define GET_SLAVE_STATUS 0
|
||||||
|
@ -41,12 +42,12 @@ SSTD_t transactions[] = {
|
||||||
|
|
||||||
void serial_master_init(void)
|
void serial_master_init(void)
|
||||||
{
|
{
|
||||||
soft_serial_initiator_init(transactions);
|
soft_serial_initiator_init(transactions, TID_LIMIT(transactions));
|
||||||
}
|
}
|
||||||
|
|
||||||
void serial_slave_init(void)
|
void serial_slave_init(void)
|
||||||
{
|
{
|
||||||
soft_serial_target_init(transactions);
|
soft_serial_target_init(transactions, TID_LIMIT(transactions));
|
||||||
}
|
}
|
||||||
|
|
||||||
// 0 => no error
|
// 0 => no error
|
||||||
|
@ -54,19 +55,37 @@ void serial_slave_init(void)
|
||||||
// 2 => checksum error
|
// 2 => checksum error
|
||||||
int serial_update_buffers(int master_update)
|
int serial_update_buffers(int master_update)
|
||||||
{
|
{
|
||||||
int status;
|
int status, smatstatus;
|
||||||
static int need_retry = 0;
|
static int need_retry = 0;
|
||||||
if( s_change_old != slave_buffer_change_count ) {
|
|
||||||
status = soft_serial_transaction(GET_SLAVE_BUFFER);
|
if( s_change_old != s_change_new ) {
|
||||||
if( status == TRANSACTION_END )
|
smatstatus = soft_serial_transaction(GET_SLAVE_BUFFER);
|
||||||
s_change_old = slave_buffer_change_count;
|
if( smatstatus == TRANSACTION_END ) {
|
||||||
|
s_change_old = s_change_new;
|
||||||
|
#ifdef CONSOLE_ENABLE
|
||||||
|
uprintf("slave matrix = %b %b %b %b %b\n",
|
||||||
|
serial_slave_buffer[0], serial_slave_buffer[1],
|
||||||
|
serial_slave_buffer[2], serial_slave_buffer[3],
|
||||||
|
serial_slave_buffer[4] );
|
||||||
|
#endif
|
||||||
|
}
|
||||||
|
} else {
|
||||||
|
// serial_slave_buffer dosen't change
|
||||||
|
smatstatus = TRANSACTION_END; // dummy status
|
||||||
}
|
}
|
||||||
if( !master_update && !need_retry)
|
|
||||||
status = soft_serial_transaction(GET_SLAVE_STATUS);
|
if( !master_update && !need_retry) {
|
||||||
else
|
status = soft_serial_transaction(GET_SLAVE_STATUS);
|
||||||
status = soft_serial_transaction(PUT_MASTER_GET_SLAVE_STATUS);
|
} else {
|
||||||
need_retry = ( status == TRANSACTION_END ) ? 0 : 1;
|
status = soft_serial_transaction(PUT_MASTER_GET_SLAVE_STATUS);
|
||||||
return status;
|
}
|
||||||
|
if( status == TRANSACTION_END ) {
|
||||||
|
s_change_new = slave_buffer_change_count;
|
||||||
|
need_retry = 0;
|
||||||
|
} else {
|
||||||
|
need_retry = 1;
|
||||||
|
}
|
||||||
|
return smatstatus;
|
||||||
}
|
}
|
||||||
|
|
||||||
#endif // SERIAL_USE_MULTI_TRANSACTION
|
#endif // SERIAL_USE_MULTI_TRANSACTION
|
||||||
|
|
|
@ -1,4 +1,5 @@
|
||||||
#pragma once
|
#ifndef SPLIT_COMM_H
|
||||||
|
#define SPLIT_COMM_H
|
||||||
|
|
||||||
#ifndef SERIAL_USE_MULTI_TRANSACTION
|
#ifndef SERIAL_USE_MULTI_TRANSACTION
|
||||||
/* --- USE Simple API (OLD API, compatible with let's split serial.c) --- */
|
/* --- USE Simple API (OLD API, compatible with let's split serial.c) --- */
|
||||||
|
@ -19,3 +20,5 @@ void serial_slave_init(void);
|
||||||
int serial_update_buffers(int master_changed);
|
int serial_update_buffers(int master_changed);
|
||||||
|
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
#endif /* SPLIT_COMM_H */
|
||||||
|
|
|
@ -1,4 +1,5 @@
|
||||||
#pragma once
|
#ifndef SPLIT_KEYBOARD_UTIL_H
|
||||||
|
#define SPLIT_KEYBOARD_UTIL_H
|
||||||
|
|
||||||
#include <stdbool.h>
|
#include <stdbool.h>
|
||||||
#include "eeconfig.h"
|
#include "eeconfig.h"
|
||||||
|
@ -14,3 +15,5 @@ void split_keyboard_setup(void);
|
||||||
bool has_usb(void);
|
bool has_usb(void);
|
||||||
|
|
||||||
void matrix_master_OLED_init (void);
|
void matrix_master_OLED_init (void);
|
||||||
|
|
||||||
|
#endif
|
||||||
|
|
|
@ -1,5 +1,10 @@
|
||||||
/*
|
/*
|
||||||
* WARNING: be careful changing this code, it is very timing dependent
|
* WARNING: be careful changing this code, it is very timing dependent
|
||||||
|
*
|
||||||
|
* 2018-10-28 checked
|
||||||
|
* avr-gcc 4.9.2
|
||||||
|
* avr-gcc 5.4.0
|
||||||
|
* avr-gcc 7.3.0
|
||||||
*/
|
*/
|
||||||
|
|
||||||
#ifndef F_CPU
|
#ifndef F_CPU
|
||||||
|
@ -14,8 +19,58 @@
|
||||||
#include "serial.h"
|
#include "serial.h"
|
||||||
//#include <pro_micro.h>
|
//#include <pro_micro.h>
|
||||||
|
|
||||||
#ifdef USE_SERIAL
|
#ifdef SOFT_SERIAL_PIN
|
||||||
|
|
||||||
|
#ifdef __AVR_ATmega32U4__
|
||||||
|
// if using ATmega32U4 I2C, can not use PD0 and PD1 in soft serial.
|
||||||
|
#ifdef USE_I2C
|
||||||
|
#if SOFT_SERIAL_PIN == D0 || SOFT_SERIAL_PIN == D1
|
||||||
|
#error Using ATmega32U4 I2C, so can not use PD0, PD1
|
||||||
|
#endif
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#if SOFT_SERIAL_PIN >= D0 && SOFT_SERIAL_PIN <= D3
|
||||||
|
#define SERIAL_PIN_DDR DDRD
|
||||||
|
#define SERIAL_PIN_PORT PORTD
|
||||||
|
#define SERIAL_PIN_INPUT PIND
|
||||||
|
#if SOFT_SERIAL_PIN == D0
|
||||||
|
#define SERIAL_PIN_MASK _BV(PD0)
|
||||||
|
#define EIMSK_BIT _BV(INT0)
|
||||||
|
#define EICRx_BIT (~(_BV(ISC00) | _BV(ISC01)))
|
||||||
|
#define SERIAL_PIN_INTERRUPT INT0_vect
|
||||||
|
#elif SOFT_SERIAL_PIN == D1
|
||||||
|
#define SERIAL_PIN_MASK _BV(PD1)
|
||||||
|
#define EIMSK_BIT _BV(INT1)
|
||||||
|
#define EICRx_BIT (~(_BV(ISC10) | _BV(ISC11)))
|
||||||
|
#define SERIAL_PIN_INTERRUPT INT1_vect
|
||||||
|
#elif SOFT_SERIAL_PIN == D2
|
||||||
|
#define SERIAL_PIN_MASK _BV(PD2)
|
||||||
|
#define EIMSK_BIT _BV(INT2)
|
||||||
|
#define EICRx_BIT (~(_BV(ISC20) | _BV(ISC21)))
|
||||||
|
#define SERIAL_PIN_INTERRUPT INT2_vect
|
||||||
|
#elif SOFT_SERIAL_PIN == D3
|
||||||
|
#define SERIAL_PIN_MASK _BV(PD3)
|
||||||
|
#define EIMSK_BIT _BV(INT3)
|
||||||
|
#define EICRx_BIT (~(_BV(ISC30) | _BV(ISC31)))
|
||||||
|
#define SERIAL_PIN_INTERRUPT INT3_vect
|
||||||
|
#endif
|
||||||
|
#elif SOFT_SERIAL_PIN == E6
|
||||||
|
#define SERIAL_PIN_DDR DDRE
|
||||||
|
#define SERIAL_PIN_PORT PORTE
|
||||||
|
#define SERIAL_PIN_INPUT PINE
|
||||||
|
#define SERIAL_PIN_MASK _BV(PE6)
|
||||||
|
#define EIMSK_BIT _BV(INT6)
|
||||||
|
#define EICRx_BIT (~(_BV(ISC60) | _BV(ISC61)))
|
||||||
|
#define SERIAL_PIN_INTERRUPT INT6_vect
|
||||||
|
#else
|
||||||
|
#error invalid SOFT_SERIAL_PIN value
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#else
|
||||||
|
#error serial.c now support ATmega32U4 only
|
||||||
|
#endif
|
||||||
|
|
||||||
|
//////////////// for backward compatibility ////////////////////////////////
|
||||||
#ifndef SERIAL_USE_MULTI_TRANSACTION
|
#ifndef SERIAL_USE_MULTI_TRANSACTION
|
||||||
/* --- USE Simple API (OLD API, compatible with let's split serial.c) */
|
/* --- USE Simple API (OLD API, compatible with let's split serial.c) */
|
||||||
#if SERIAL_SLAVE_BUFFER_LENGTH > 0
|
#if SERIAL_SLAVE_BUFFER_LENGTH > 0
|
||||||
|
@ -42,56 +97,118 @@ SSTD_t transactions[] = {
|
||||||
};
|
};
|
||||||
|
|
||||||
void serial_master_init(void)
|
void serial_master_init(void)
|
||||||
{ soft_serial_initiator_init(transactions); }
|
{ soft_serial_initiator_init(transactions, TID_LIMIT(transactions)); }
|
||||||
|
|
||||||
void serial_slave_init(void)
|
void serial_slave_init(void)
|
||||||
{ soft_serial_target_init(transactions); }
|
{ soft_serial_target_init(transactions, TID_LIMIT(transactions)); }
|
||||||
|
|
||||||
// 0 => no error
|
// 0 => no error
|
||||||
// 1 => slave did not respond
|
// 1 => slave did not respond
|
||||||
// 2 => checksum error
|
// 2 => checksum error
|
||||||
int serial_update_buffers()
|
int serial_update_buffers()
|
||||||
{ return soft_serial_transaction(); }
|
{
|
||||||
|
int result;
|
||||||
|
result = soft_serial_transaction();
|
||||||
|
return result;
|
||||||
|
}
|
||||||
|
|
||||||
#endif // Simple API (OLD API, compatible with let's split serial.c)
|
#endif // end of Simple API (OLD API, compatible with let's split serial.c)
|
||||||
|
////////////////////////////////////////////////////////////////////////////
|
||||||
|
|
||||||
#define ALWAYS_INLINE __attribute__((always_inline))
|
#define ALWAYS_INLINE __attribute__((always_inline))
|
||||||
#define NO_INLINE __attribute__((noinline))
|
#define NO_INLINE __attribute__((noinline))
|
||||||
#define _delay_sub_us(x) __builtin_avr_delay_cycles(x)
|
#define _delay_sub_us(x) __builtin_avr_delay_cycles(x)
|
||||||
|
|
||||||
// Serial pulse period in microseconds.
|
// parity check
|
||||||
#define TID_SEND_ADJUST 14
|
#define ODD_PARITY 1
|
||||||
|
#define EVEN_PARITY 0
|
||||||
|
#define PARITY EVEN_PARITY
|
||||||
|
|
||||||
#define SELECT_SERIAL_SPEED 1
|
#ifdef SERIAL_DELAY
|
||||||
#if SELECT_SERIAL_SPEED == 0
|
// custom setup in config.h
|
||||||
|
// #define TID_SEND_ADJUST 2
|
||||||
|
// #define SERIAL_DELAY 6 // micro sec
|
||||||
|
// #define READ_WRITE_START_ADJUST 30 // cycles
|
||||||
|
// #define READ_WRITE_WIDTH_ADJUST 8 // cycles
|
||||||
|
#else
|
||||||
|
// ============ Standard setups ============
|
||||||
|
|
||||||
|
#ifndef SELECT_SOFT_SERIAL_SPEED
|
||||||
|
#define SELECT_SOFT_SERIAL_SPEED 1
|
||||||
|
// 0: about 189kbps
|
||||||
|
// 1: about 137kbps (default)
|
||||||
|
// 2: about 75kbps
|
||||||
|
// 3: about 39kbps
|
||||||
|
// 4: about 26kbps
|
||||||
|
// 5: about 20kbps
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#if __GNUC__ < 6
|
||||||
|
#define TID_SEND_ADJUST 14
|
||||||
|
#else
|
||||||
|
#define TID_SEND_ADJUST 2
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#if SELECT_SOFT_SERIAL_SPEED == 0
|
||||||
// Very High speed
|
// Very High speed
|
||||||
#define SERIAL_DELAY 4 // micro sec
|
#define SERIAL_DELAY 4 // micro sec
|
||||||
#define READ_WRITE_START_ADJUST 33 // cycles
|
#if __GNUC__ < 6
|
||||||
#define READ_WRITE_WIDTH_ADJUST 3 // cycles
|
#define READ_WRITE_START_ADJUST 33 // cycles
|
||||||
#elif SELECT_SERIAL_SPEED == 1
|
#define READ_WRITE_WIDTH_ADJUST 3 // cycles
|
||||||
|
#else
|
||||||
|
#define READ_WRITE_START_ADJUST 34 // cycles
|
||||||
|
#define READ_WRITE_WIDTH_ADJUST 7 // cycles
|
||||||
|
#endif
|
||||||
|
#elif SELECT_SOFT_SERIAL_SPEED == 1
|
||||||
// High speed
|
// High speed
|
||||||
#define SERIAL_DELAY 6 // micro sec
|
#define SERIAL_DELAY 6 // micro sec
|
||||||
#define READ_WRITE_START_ADJUST 30 // cycles
|
#if __GNUC__ < 6
|
||||||
#define READ_WRITE_WIDTH_ADJUST 3 // cycles
|
#define READ_WRITE_START_ADJUST 30 // cycles
|
||||||
#elif SELECT_SERIAL_SPEED == 2
|
#define READ_WRITE_WIDTH_ADJUST 3 // cycles
|
||||||
|
#else
|
||||||
|
#define READ_WRITE_START_ADJUST 33 // cycles
|
||||||
|
#define READ_WRITE_WIDTH_ADJUST 7 // cycles
|
||||||
|
#endif
|
||||||
|
#elif SELECT_SOFT_SERIAL_SPEED == 2
|
||||||
// Middle speed
|
// Middle speed
|
||||||
#define SERIAL_DELAY 12 // micro sec
|
#define SERIAL_DELAY 12 // micro sec
|
||||||
#define READ_WRITE_START_ADJUST 30 // cycles
|
#define READ_WRITE_START_ADJUST 30 // cycles
|
||||||
#define READ_WRITE_WIDTH_ADJUST 3 // cycles
|
#if __GNUC__ < 6
|
||||||
#elif SELECT_SERIAL_SPEED == 3
|
#define READ_WRITE_WIDTH_ADJUST 3 // cycles
|
||||||
|
#else
|
||||||
|
#define READ_WRITE_WIDTH_ADJUST 7 // cycles
|
||||||
|
#endif
|
||||||
|
#elif SELECT_SOFT_SERIAL_SPEED == 3
|
||||||
// Low speed
|
// Low speed
|
||||||
#define SERIAL_DELAY 24 // micro sec
|
#define SERIAL_DELAY 24 // micro sec
|
||||||
#define READ_WRITE_START_ADJUST 30 // cycles
|
#define READ_WRITE_START_ADJUST 30 // cycles
|
||||||
#define READ_WRITE_WIDTH_ADJUST 3 // cycles
|
#if __GNUC__ < 6
|
||||||
#elif SELECT_SERIAL_SPEED == 4
|
#define READ_WRITE_WIDTH_ADJUST 3 // cycles
|
||||||
|
#else
|
||||||
|
#define READ_WRITE_WIDTH_ADJUST 7 // cycles
|
||||||
|
#endif
|
||||||
|
#elif SELECT_SOFT_SERIAL_SPEED == 4
|
||||||
// Very Low speed
|
// Very Low speed
|
||||||
#define SERIAL_DELAY 50 // micro sec
|
#define SERIAL_DELAY 36 // micro sec
|
||||||
#define READ_WRITE_START_ADJUST 30 // cycles
|
#define READ_WRITE_START_ADJUST 30 // cycles
|
||||||
#define READ_WRITE_WIDTH_ADJUST 3 // cycles
|
#if __GNUC__ < 6
|
||||||
|
#define READ_WRITE_WIDTH_ADJUST 3 // cycles
|
||||||
|
#else
|
||||||
|
#define READ_WRITE_WIDTH_ADJUST 7 // cycles
|
||||||
|
#endif
|
||||||
|
#elif SELECT_SOFT_SERIAL_SPEED == 5
|
||||||
|
// Ultra Low speed
|
||||||
|
#define SERIAL_DELAY 48 // micro sec
|
||||||
|
#define READ_WRITE_START_ADJUST 30 // cycles
|
||||||
|
#if __GNUC__ < 6
|
||||||
|
#define READ_WRITE_WIDTH_ADJUST 3 // cycles
|
||||||
|
#else
|
||||||
|
#define READ_WRITE_WIDTH_ADJUST 7 // cycles
|
||||||
|
#endif
|
||||||
#else
|
#else
|
||||||
#error Illegal Serial Speed
|
#error invalid SELECT_SOFT_SERIAL_SPEED value
|
||||||
#endif
|
#endif /* SELECT_SOFT_SERIAL_SPEED */
|
||||||
|
#endif /* SERIAL_DELAY */
|
||||||
|
|
||||||
#define SERIAL_DELAY_HALF1 (SERIAL_DELAY/2)
|
#define SERIAL_DELAY_HALF1 (SERIAL_DELAY/2)
|
||||||
#define SERIAL_DELAY_HALF2 (SERIAL_DELAY - SERIAL_DELAY/2)
|
#define SERIAL_DELAY_HALF2 (SERIAL_DELAY - SERIAL_DELAY/2)
|
||||||
|
@ -105,17 +222,21 @@ int serial_update_buffers()
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
static SSTD_t *Transaction_table = NULL;
|
static SSTD_t *Transaction_table = NULL;
|
||||||
|
static uint8_t Transaction_table_size = 0;
|
||||||
|
|
||||||
|
inline static void serial_delay(void) ALWAYS_INLINE;
|
||||||
inline static
|
inline static
|
||||||
void serial_delay(void) {
|
void serial_delay(void) {
|
||||||
_delay_us(SERIAL_DELAY);
|
_delay_us(SERIAL_DELAY);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
inline static void serial_delay_half1(void) ALWAYS_INLINE;
|
||||||
inline static
|
inline static
|
||||||
void serial_delay_half1(void) {
|
void serial_delay_half1(void) {
|
||||||
_delay_us(SERIAL_DELAY_HALF1);
|
_delay_us(SERIAL_DELAY_HALF1);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
inline static void serial_delay_half2(void) ALWAYS_INLINE;
|
||||||
inline static
|
inline static
|
||||||
void serial_delay_half2(void) {
|
void serial_delay_half2(void) {
|
||||||
_delay_us(SERIAL_DELAY_HALF2);
|
_delay_us(SERIAL_DELAY_HALF2);
|
||||||
|
@ -135,6 +256,7 @@ void serial_input_with_pullup(void) {
|
||||||
SERIAL_PIN_PORT |= SERIAL_PIN_MASK;
|
SERIAL_PIN_PORT |= SERIAL_PIN_MASK;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
inline static uint8_t serial_read_pin(void) ALWAYS_INLINE;
|
||||||
inline static
|
inline static
|
||||||
uint8_t serial_read_pin(void) {
|
uint8_t serial_read_pin(void) {
|
||||||
return !!(SERIAL_PIN_INPUT & SERIAL_PIN_MASK);
|
return !!(SERIAL_PIN_INPUT & SERIAL_PIN_MASK);
|
||||||
|
@ -152,30 +274,28 @@ void serial_high(void) {
|
||||||
SERIAL_PIN_PORT |= SERIAL_PIN_MASK;
|
SERIAL_PIN_PORT |= SERIAL_PIN_MASK;
|
||||||
}
|
}
|
||||||
|
|
||||||
void soft_serial_initiator_init(SSTD_t *sstd_table)
|
void soft_serial_initiator_init(SSTD_t *sstd_table, int sstd_table_size)
|
||||||
{
|
{
|
||||||
Transaction_table = sstd_table;
|
Transaction_table = sstd_table;
|
||||||
|
Transaction_table_size = (uint8_t)sstd_table_size;
|
||||||
serial_output();
|
serial_output();
|
||||||
serial_high();
|
serial_high();
|
||||||
}
|
}
|
||||||
|
|
||||||
void soft_serial_target_init(SSTD_t *sstd_table)
|
void soft_serial_target_init(SSTD_t *sstd_table, int sstd_table_size)
|
||||||
{
|
{
|
||||||
Transaction_table = sstd_table;
|
Transaction_table = sstd_table;
|
||||||
|
Transaction_table_size = (uint8_t)sstd_table_size;
|
||||||
serial_input_with_pullup();
|
serial_input_with_pullup();
|
||||||
|
|
||||||
#if SERIAL_PIN_MASK == _BV(PD0)
|
// Enable INT0-INT3,INT6
|
||||||
// Enable INT0
|
EIMSK |= EIMSK_BIT;
|
||||||
EIMSK |= _BV(INT0);
|
#if SERIAL_PIN_MASK == _BV(PE6)
|
||||||
// Trigger on falling edge of INT0
|
// Trigger on falling edge of INT6
|
||||||
EICRA &= ~(_BV(ISC00) | _BV(ISC01));
|
EICRB &= EICRx_BIT;
|
||||||
#elif SERIAL_PIN_MASK == _BV(PD2)
|
|
||||||
// Enable INT2
|
|
||||||
EIMSK |= _BV(INT2);
|
|
||||||
// Trigger on falling edge of INT2
|
|
||||||
EICRA &= ~(_BV(ISC20) | _BV(ISC21));
|
|
||||||
#else
|
#else
|
||||||
#error unknown SERIAL_PIN_MASK value
|
// Trigger on falling edge of INT0-INT3
|
||||||
|
EICRA &= EICRx_BIT;
|
||||||
#endif
|
#endif
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -191,7 +311,7 @@ void sync_recv(void) {
|
||||||
}
|
}
|
||||||
|
|
||||||
// Used by the reciver to send a synchronization signal to the sender.
|
// Used by the reciver to send a synchronization signal to the sender.
|
||||||
static void sync_send(void)NO_INLINE;
|
static void sync_send(void) NO_INLINE;
|
||||||
static
|
static
|
||||||
void sync_send(void) {
|
void sync_send(void) {
|
||||||
serial_low();
|
serial_low();
|
||||||
|
@ -205,12 +325,12 @@ static uint8_t serial_read_chunk(uint8_t *pterrcount, uint8_t bit) {
|
||||||
uint8_t byte, i, p, pb;
|
uint8_t byte, i, p, pb;
|
||||||
|
|
||||||
_delay_sub_us(READ_WRITE_START_ADJUST);
|
_delay_sub_us(READ_WRITE_START_ADJUST);
|
||||||
for( i = 0, byte = 0, p = 0; i < bit; i++ ) {
|
for( i = 0, byte = 0, p = PARITY; i < bit; i++ ) {
|
||||||
serial_delay_half1(); // read the middle of pulses
|
serial_delay_half1(); // read the middle of pulses
|
||||||
if( serial_read_pin() ) {
|
if( serial_read_pin() ) {
|
||||||
byte = (byte << 1) | 1; p ^= 1;
|
byte = (byte << 1) | 1; p ^= 1;
|
||||||
} else {
|
} else {
|
||||||
byte = (byte << 1) | 0; p ^= 0;
|
byte = (byte << 1) | 0; p ^= 0;
|
||||||
}
|
}
|
||||||
_delay_sub_us(READ_WRITE_WIDTH_ADJUST);
|
_delay_sub_us(READ_WRITE_WIDTH_ADJUST);
|
||||||
serial_delay_half2();
|
serial_delay_half2();
|
||||||
|
@ -230,13 +350,13 @@ static uint8_t serial_read_chunk(uint8_t *pterrcount, uint8_t bit) {
|
||||||
void serial_write_chunk(uint8_t data, uint8_t bit) NO_INLINE;
|
void serial_write_chunk(uint8_t data, uint8_t bit) NO_INLINE;
|
||||||
void serial_write_chunk(uint8_t data, uint8_t bit) {
|
void serial_write_chunk(uint8_t data, uint8_t bit) {
|
||||||
uint8_t b, p;
|
uint8_t b, p;
|
||||||
for( p = 0, b = 1<<(bit-1); b ; b >>= 1) {
|
for( p = PARITY, b = 1<<(bit-1); b ; b >>= 1) {
|
||||||
if(data & b) {
|
if(data & b) {
|
||||||
serial_high(); p ^= 1;
|
serial_high(); p ^= 1;
|
||||||
} else {
|
} else {
|
||||||
serial_low(); p ^= 0;
|
serial_low(); p ^= 0;
|
||||||
}
|
}
|
||||||
serial_delay();
|
serial_delay();
|
||||||
}
|
}
|
||||||
/* send parity bit */
|
/* send parity bit */
|
||||||
if(p & 1) { serial_high(); }
|
if(p & 1) { serial_high(); }
|
||||||
|
@ -288,6 +408,13 @@ void change_reciver2sender(void) {
|
||||||
serial_delay_half1(); //4
|
serial_delay_half1(); //4
|
||||||
}
|
}
|
||||||
|
|
||||||
|
static inline uint8_t nibble_bits_count(uint8_t bits)
|
||||||
|
{
|
||||||
|
bits = (bits & 0x5) + (bits >> 1 & 0x5);
|
||||||
|
bits = (bits & 0x3) + (bits >> 2 & 0x3);
|
||||||
|
return bits;
|
||||||
|
}
|
||||||
|
|
||||||
// interrupt handle to be used by the target device
|
// interrupt handle to be used by the target device
|
||||||
ISR(SERIAL_PIN_INTERRUPT) {
|
ISR(SERIAL_PIN_INTERRUPT) {
|
||||||
|
|
||||||
|
@ -297,12 +424,15 @@ ISR(SERIAL_PIN_INTERRUPT) {
|
||||||
SSTD_t *trans = Transaction_table;
|
SSTD_t *trans = Transaction_table;
|
||||||
#else
|
#else
|
||||||
// recive transaction table index
|
// recive transaction table index
|
||||||
uint8_t tid;
|
uint8_t tid, bits;
|
||||||
uint8_t pecount = 0;
|
uint8_t pecount = 0;
|
||||||
sync_recv();
|
sync_recv();
|
||||||
tid = serial_read_chunk(&pecount,4);
|
bits = serial_read_chunk(&pecount,7);
|
||||||
if(pecount> 0)
|
tid = bits>>3;
|
||||||
|
bits = (bits&7) != nibble_bits_count(tid);
|
||||||
|
if( bits || pecount> 0 || tid > Transaction_table_size ) {
|
||||||
return;
|
return;
|
||||||
|
}
|
||||||
serial_delay_half1();
|
serial_delay_half1();
|
||||||
|
|
||||||
serial_high(); // response step1 low->high
|
serial_high(); // response step1 low->high
|
||||||
|
@ -315,17 +445,17 @@ ISR(SERIAL_PIN_INTERRUPT) {
|
||||||
// target send phase
|
// target send phase
|
||||||
if( trans->target2initiator_buffer_size > 0 )
|
if( trans->target2initiator_buffer_size > 0 )
|
||||||
serial_send_packet((uint8_t *)trans->target2initiator_buffer,
|
serial_send_packet((uint8_t *)trans->target2initiator_buffer,
|
||||||
trans->target2initiator_buffer_size);
|
trans->target2initiator_buffer_size);
|
||||||
// target switch to input
|
// target switch to input
|
||||||
change_sender2reciver();
|
change_sender2reciver();
|
||||||
|
|
||||||
// target recive phase
|
// target recive phase
|
||||||
if( trans->initiator2target_buffer_size > 0 ) {
|
if( trans->initiator2target_buffer_size > 0 ) {
|
||||||
if (serial_recive_packet((uint8_t *)trans->initiator2target_buffer,
|
if (serial_recive_packet((uint8_t *)trans->initiator2target_buffer,
|
||||||
trans->initiator2target_buffer_size) ) {
|
trans->initiator2target_buffer_size) ) {
|
||||||
*trans->status = TRANSACTION_ACCEPTED;
|
*trans->status = TRANSACTION_ACCEPTED;
|
||||||
} else {
|
} else {
|
||||||
*trans->status = TRANSACTION_DATA_ERROR;
|
*trans->status = TRANSACTION_DATA_ERROR;
|
||||||
}
|
}
|
||||||
} else {
|
} else {
|
||||||
*trans->status = TRANSACTION_ACCEPTED;
|
*trans->status = TRANSACTION_ACCEPTED;
|
||||||
|
@ -349,6 +479,8 @@ int soft_serial_transaction(void) {
|
||||||
SSTD_t *trans = Transaction_table;
|
SSTD_t *trans = Transaction_table;
|
||||||
#else
|
#else
|
||||||
int soft_serial_transaction(int sstd_index) {
|
int soft_serial_transaction(int sstd_index) {
|
||||||
|
if( sstd_index > Transaction_table_size )
|
||||||
|
return TRANSACTION_TYPE_ERROR;
|
||||||
SSTD_t *trans = &Transaction_table[sstd_index];
|
SSTD_t *trans = &Transaction_table[sstd_index];
|
||||||
#endif
|
#endif
|
||||||
cli();
|
cli();
|
||||||
|
@ -375,9 +507,10 @@ int soft_serial_transaction(int sstd_index) {
|
||||||
|
|
||||||
#else
|
#else
|
||||||
// send transaction table index
|
// send transaction table index
|
||||||
|
int tid = (sstd_index<<3) | (7 & nibble_bits_count(sstd_index));
|
||||||
sync_send();
|
sync_send();
|
||||||
_delay_sub_us(TID_SEND_ADJUST);
|
_delay_sub_us(TID_SEND_ADJUST);
|
||||||
serial_write_chunk(sstd_index, 4);
|
serial_write_chunk(tid, 7);
|
||||||
serial_delay_half1();
|
serial_delay_half1();
|
||||||
|
|
||||||
// wait for the target response (step1 low->high)
|
// wait for the target response (step1 low->high)
|
||||||
|
@ -389,12 +522,12 @@ int soft_serial_transaction(int sstd_index) {
|
||||||
// check if the target is present (step2 high->low)
|
// check if the target is present (step2 high->low)
|
||||||
for( int i = 0; serial_read_pin(); i++ ) {
|
for( int i = 0; serial_read_pin(); i++ ) {
|
||||||
if (i > SLAVE_INT_ACK_WIDTH + 1) {
|
if (i > SLAVE_INT_ACK_WIDTH + 1) {
|
||||||
// slave failed to pull the line low, assume not present
|
// slave failed to pull the line low, assume not present
|
||||||
serial_output();
|
serial_output();
|
||||||
serial_high();
|
serial_high();
|
||||||
*trans->status = TRANSACTION_NO_RESPONSE;
|
*trans->status = TRANSACTION_NO_RESPONSE;
|
||||||
sei();
|
sei();
|
||||||
return TRANSACTION_NO_RESPONSE;
|
return TRANSACTION_NO_RESPONSE;
|
||||||
}
|
}
|
||||||
_delay_sub_us(SLAVE_INT_ACK_WIDTH_UNIT);
|
_delay_sub_us(SLAVE_INT_ACK_WIDTH_UNIT);
|
||||||
}
|
}
|
||||||
|
@ -404,12 +537,12 @@ int soft_serial_transaction(int sstd_index) {
|
||||||
// if the target is present syncronize with it
|
// if the target is present syncronize with it
|
||||||
if( trans->target2initiator_buffer_size > 0 ) {
|
if( trans->target2initiator_buffer_size > 0 ) {
|
||||||
if (!serial_recive_packet((uint8_t *)trans->target2initiator_buffer,
|
if (!serial_recive_packet((uint8_t *)trans->target2initiator_buffer,
|
||||||
trans->target2initiator_buffer_size) ) {
|
trans->target2initiator_buffer_size) ) {
|
||||||
serial_output();
|
serial_output();
|
||||||
serial_high();
|
serial_high();
|
||||||
*trans->status = TRANSACTION_DATA_ERROR;
|
*trans->status = TRANSACTION_DATA_ERROR;
|
||||||
sei();
|
sei();
|
||||||
return TRANSACTION_DATA_ERROR;
|
return TRANSACTION_DATA_ERROR;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -419,7 +552,7 @@ int soft_serial_transaction(int sstd_index) {
|
||||||
// initiator send phase
|
// initiator send phase
|
||||||
if( trans->initiator2target_buffer_size > 0 ) {
|
if( trans->initiator2target_buffer_size > 0 ) {
|
||||||
serial_send_packet((uint8_t *)trans->initiator2target_buffer,
|
serial_send_packet((uint8_t *)trans->initiator2target_buffer,
|
||||||
trans->initiator2target_buffer_size);
|
trans->initiator2target_buffer_size);
|
||||||
}
|
}
|
||||||
|
|
||||||
// always, release the line when not in use
|
// always, release the line when not in use
|
||||||
|
@ -442,3 +575,16 @@ int soft_serial_get_and_clean_status(int sstd_index) {
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
// Helix serial.c history
|
||||||
|
// 2018-1-29 fork from let's split and add PD2, modify sync_recv() (#2308, bceffdefc)
|
||||||
|
// 2018-6-28 bug fix master to slave comm and speed up (#3255, 1038bbef4)
|
||||||
|
// (adjusted with avr-gcc 4.9.2)
|
||||||
|
// 2018-7-13 remove USE_SERIAL_PD2 macro (#3374, f30d6dd78)
|
||||||
|
// (adjusted with avr-gcc 4.9.2)
|
||||||
|
// 2018-8-11 add support multi-type transaction (#3608, feb5e4aae)
|
||||||
|
// (adjusted with avr-gcc 4.9.2)
|
||||||
|
// 2018-10-21 fix serial and RGB animation conflict (#4191, 4665e4fff)
|
||||||
|
// (adjusted with avr-gcc 7.3.0)
|
||||||
|
// 2018-10-28 re-adjust compiler depend value of delay (#4269, 8517f8a66)
|
||||||
|
// (adjusted with avr-gcc 5.4.0, 7.3.0)
|
||||||
|
|
|
@ -1,16 +1,19 @@
|
||||||
#pragma once
|
#ifndef SOFT_SERIAL_H
|
||||||
|
#define SOFT_SERIAL_H
|
||||||
|
|
||||||
#include <stdbool.h>
|
#include <stdbool.h>
|
||||||
|
|
||||||
// /////////////////////////////////////////////////////////////////
|
// /////////////////////////////////////////////////////////////////
|
||||||
// Need Soft Serial defines in serial_config.h
|
// Need Soft Serial defines in config.h
|
||||||
// /////////////////////////////////////////////////////////////////
|
// /////////////////////////////////////////////////////////////////
|
||||||
// ex.
|
// ex.
|
||||||
// #define SERIAL_PIN_DDR DDRD
|
// #define SOFT_SERIAL_PIN ?? // ?? = D0,D1,D2,D3,E6
|
||||||
// #define SERIAL_PIN_PORT PORTD
|
// OPTIONAL: #define SELECT_SOFT_SERIAL_SPEED ? // ? = 1,2,3,4,5
|
||||||
// #define SERIAL_PIN_INPUT PIND
|
// // 1: about 137kbps (default)
|
||||||
// #define SERIAL_PIN_MASK _BV(PD?) ?=0,2
|
// // 2: about 75kbps
|
||||||
// #define SERIAL_PIN_INTERRUPT INT?_vect ?=0,2
|
// // 3: about 39kbps
|
||||||
|
// // 4: about 26kbps
|
||||||
|
// // 5: about 20kbps
|
||||||
//
|
//
|
||||||
// //// USE Simple API (OLD API, compatible with let's split serial.c)
|
// //// USE Simple API (OLD API, compatible with let's split serial.c)
|
||||||
// ex.
|
// ex.
|
||||||
|
@ -46,16 +49,18 @@ typedef struct _SSTD_t {
|
||||||
uint8_t target2initiator_buffer_size;
|
uint8_t target2initiator_buffer_size;
|
||||||
uint8_t *target2initiator_buffer;
|
uint8_t *target2initiator_buffer;
|
||||||
} SSTD_t;
|
} SSTD_t;
|
||||||
|
#define TID_LIMIT( table ) (sizeof(table) / sizeof(SSTD_t))
|
||||||
|
|
||||||
// initiator is transaction start side
|
// initiator is transaction start side
|
||||||
void soft_serial_initiator_init(SSTD_t *sstd_table);
|
void soft_serial_initiator_init(SSTD_t *sstd_table, int sstd_table_size);
|
||||||
// target is interrupt accept side
|
// target is interrupt accept side
|
||||||
void soft_serial_target_init(SSTD_t *sstd_table);
|
void soft_serial_target_init(SSTD_t *sstd_table, int sstd_table_size);
|
||||||
|
|
||||||
// initiator resullt
|
// initiator resullt
|
||||||
#define TRANSACTION_END 0
|
#define TRANSACTION_END 0
|
||||||
#define TRANSACTION_NO_RESPONSE 0x1
|
#define TRANSACTION_NO_RESPONSE 0x1
|
||||||
#define TRANSACTION_DATA_ERROR 0x2
|
#define TRANSACTION_DATA_ERROR 0x2
|
||||||
|
#define TRANSACTION_TYPE_ERROR 0x4
|
||||||
#ifndef SERIAL_USE_MULTI_TRANSACTION
|
#ifndef SERIAL_USE_MULTI_TRANSACTION
|
||||||
int soft_serial_transaction(void);
|
int soft_serial_transaction(void);
|
||||||
#else
|
#else
|
||||||
|
@ -71,7 +76,9 @@ int soft_serial_transaction(int sstd_index);
|
||||||
// target:
|
// target:
|
||||||
// TRANSACTION_DATA_ERROR
|
// TRANSACTION_DATA_ERROR
|
||||||
// or TRANSACTION_ACCEPTED
|
// or TRANSACTION_ACCEPTED
|
||||||
#define TRANSACTION_ACCEPTED 0x4
|
#define TRANSACTION_ACCEPTED 0x8
|
||||||
#ifdef SERIAL_USE_MULTI_TRANSACTION
|
#ifdef SERIAL_USE_MULTI_TRANSACTION
|
||||||
int soft_serial_get_and_clean_status(int sstd_index);
|
int soft_serial_get_and_clean_status(int sstd_index);
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
#endif /* SOFT_SERIAL_H */
|
||||||
|
|
Loading…
Reference in a new issue