2018-05-14 14:17:24 +00:00
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/* Library made by: g4lvanix
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* Github repository: https://github.com/g4lvanix/I2C-master-lib
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*/
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#include <avr/io.h>
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#include <util/twi.h>
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#include "i2c_master.h"
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2018-06-13 03:37:06 +00:00
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#include "timer.h"
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2019-03-12 17:23:28 +00:00
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#include "wait.h"
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2018-05-14 14:17:24 +00:00
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2018-10-08 22:27:04 +00:00
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#ifndef F_SCL
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2019-03-12 17:23:28 +00:00
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# define F_SCL 400000UL // SCL frequency
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2018-10-08 22:27:04 +00:00
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#endif
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2018-05-14 14:17:24 +00:00
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#define Prescaler 1
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2019-03-12 17:23:28 +00:00
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#define TWBR_val ((((F_CPU / F_SCL) / Prescaler) - 16) / 2)
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2018-05-14 14:17:24 +00:00
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2019-03-12 17:23:28 +00:00
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void i2c_init(void) {
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TWSR = 0; /* no prescaler */
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2018-07-18 16:55:57 +00:00
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TWBR = (uint8_t)TWBR_val;
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2018-05-14 14:17:24 +00:00
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}
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2019-03-12 17:23:28 +00:00
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i2c_status_t i2c_start(uint8_t address, uint16_t timeout) {
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2018-07-18 16:55:57 +00:00
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// reset TWI control register
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TWCR = 0;
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// transmit START condition
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2019-03-12 17:23:28 +00:00
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TWCR = (1 << TWINT) | (1 << TWSTA) | (1 << TWEN);
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2018-06-13 03:37:06 +00:00
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2018-06-20 20:26:43 +00:00
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uint16_t timeout_timer = timer_read();
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2019-03-12 17:23:28 +00:00
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while (!(TWCR & (1 << TWINT))) {
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2018-06-23 18:18:47 +00:00
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if ((timeout != I2C_TIMEOUT_INFINITE) && ((timer_read() - timeout_timer) >= timeout)) {
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2018-06-20 20:26:43 +00:00
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return I2C_STATUS_TIMEOUT;
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2018-06-13 03:37:06 +00:00
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}
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2018-06-20 20:26:43 +00:00
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}
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2018-05-16 02:30:58 +00:00
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2018-07-18 16:55:57 +00:00
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// check if the start condition was successfully transmitted
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2019-03-12 17:23:28 +00:00
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if (((TW_STATUS & 0xF8) != TW_START) && ((TW_STATUS & 0xF8) != TW_REP_START)) {
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return I2C_STATUS_ERROR;
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}
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2018-05-16 02:30:58 +00:00
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2018-07-18 16:55:57 +00:00
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// load slave address into data register
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TWDR = address;
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// start transmission of address
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2019-03-12 17:23:28 +00:00
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TWCR = (1 << TWINT) | (1 << TWEN);
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2018-06-13 03:37:06 +00:00
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2018-06-20 20:26:43 +00:00
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timeout_timer = timer_read();
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2019-03-12 17:23:28 +00:00
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while (!(TWCR & (1 << TWINT))) {
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2018-06-23 18:18:47 +00:00
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if ((timeout != I2C_TIMEOUT_INFINITE) && ((timer_read() - timeout_timer) >= timeout)) {
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2018-06-20 20:26:43 +00:00
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return I2C_STATUS_TIMEOUT;
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2018-06-13 03:37:06 +00:00
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}
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2018-06-20 20:26:43 +00:00
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}
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2018-05-16 02:30:58 +00:00
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2018-07-18 16:55:57 +00:00
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// check if the device has acknowledged the READ / WRITE mode
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uint8_t twst = TW_STATUS & 0xF8;
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2019-03-12 17:23:28 +00:00
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if ((twst != TW_MT_SLA_ACK) && (twst != TW_MR_SLA_ACK)) {
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return I2C_STATUS_ERROR;
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}
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2018-05-16 02:30:58 +00:00
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2018-07-18 16:55:57 +00:00
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return I2C_STATUS_SUCCESS;
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2018-05-14 14:17:24 +00:00
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}
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2019-03-12 17:23:28 +00:00
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i2c_status_t i2c_write(uint8_t data, uint16_t timeout) {
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2018-07-18 16:55:57 +00:00
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// load data into data register
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TWDR = data;
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// start transmission of data
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2019-03-12 17:23:28 +00:00
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TWCR = (1 << TWINT) | (1 << TWEN);
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2018-06-13 03:37:06 +00:00
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2018-06-20 20:26:43 +00:00
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uint16_t timeout_timer = timer_read();
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2019-03-12 17:23:28 +00:00
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while (!(TWCR & (1 << TWINT))) {
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2018-06-23 18:18:47 +00:00
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if ((timeout != I2C_TIMEOUT_INFINITE) && ((timer_read() - timeout_timer) >= timeout)) {
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2018-06-20 20:26:43 +00:00
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return I2C_STATUS_TIMEOUT;
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2018-06-13 03:37:06 +00:00
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}
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2018-06-20 20:26:43 +00:00
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}
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2018-05-16 02:30:58 +00:00
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2019-03-12 17:23:28 +00:00
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if ((TW_STATUS & 0xF8) != TW_MT_DATA_ACK) {
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return I2C_STATUS_ERROR;
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}
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2018-05-16 02:30:58 +00:00
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2018-07-18 16:55:57 +00:00
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return I2C_STATUS_SUCCESS;
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2018-05-14 14:17:24 +00:00
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}
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2019-03-12 17:23:28 +00:00
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int16_t i2c_read_ack(uint16_t timeout) {
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2018-07-18 16:55:57 +00:00
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// start TWI module and acknowledge data after reception
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2019-03-12 17:23:28 +00:00
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TWCR = (1 << TWINT) | (1 << TWEN) | (1 << TWEA);
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2018-06-13 03:37:06 +00:00
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2018-06-20 20:26:43 +00:00
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uint16_t timeout_timer = timer_read();
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2019-03-12 17:23:28 +00:00
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while (!(TWCR & (1 << TWINT))) {
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2018-06-23 18:18:47 +00:00
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if ((timeout != I2C_TIMEOUT_INFINITE) && ((timer_read() - timeout_timer) >= timeout)) {
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2018-06-20 20:26:43 +00:00
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return I2C_STATUS_TIMEOUT;
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2018-06-13 03:37:06 +00:00
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}
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2018-06-20 20:26:43 +00:00
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}
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2018-06-13 03:37:06 +00:00
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2018-07-18 16:55:57 +00:00
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// return received data from TWDR
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return TWDR;
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2018-05-14 14:17:24 +00:00
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}
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2019-03-12 17:23:28 +00:00
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int16_t i2c_read_nack(uint16_t timeout) {
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2018-07-18 16:55:57 +00:00
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// start receiving without acknowledging reception
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2019-03-12 17:23:28 +00:00
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TWCR = (1 << TWINT) | (1 << TWEN);
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2018-06-13 03:37:06 +00:00
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2018-06-20 20:26:43 +00:00
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uint16_t timeout_timer = timer_read();
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2019-03-12 17:23:28 +00:00
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while (!(TWCR & (1 << TWINT))) {
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2018-06-23 18:18:47 +00:00
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if ((timeout != I2C_TIMEOUT_INFINITE) && ((timer_read() - timeout_timer) >= timeout)) {
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2018-06-20 20:26:43 +00:00
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return I2C_STATUS_TIMEOUT;
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2018-06-13 03:37:06 +00:00
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}
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2018-06-20 20:26:43 +00:00
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}
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2018-06-13 03:37:06 +00:00
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2018-07-18 16:55:57 +00:00
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// return received data from TWDR
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return TWDR;
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2018-05-14 14:17:24 +00:00
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}
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2019-03-12 17:23:28 +00:00
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i2c_status_t i2c_transmit(uint8_t address, uint8_t* data, uint16_t length, uint16_t timeout) {
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2018-06-23 01:26:30 +00:00
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i2c_status_t status = i2c_start(address | I2C_WRITE, timeout);
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2018-05-16 02:30:58 +00:00
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2019-03-12 17:23:28 +00:00
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for (uint16_t i = 0; i < length && status >= 0; i++) {
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2018-07-18 16:55:57 +00:00
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status = i2c_write(data[i], timeout);
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}
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2018-05-16 02:30:58 +00:00
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2019-03-12 17:23:28 +00:00
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i2c_stop();
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2018-05-16 02:30:58 +00:00
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2019-03-12 17:23:28 +00:00
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return status;
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2018-05-14 14:17:24 +00:00
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}
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2019-03-12 17:23:28 +00:00
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i2c_status_t i2c_receive(uint8_t address, uint8_t* data, uint16_t length, uint16_t timeout) {
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2018-06-23 01:26:30 +00:00
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i2c_status_t status = i2c_start(address | I2C_READ, timeout);
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2019-03-12 17:23:28 +00:00
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for (uint16_t i = 0; i < (length - 1) && status >= 0; i++) {
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2018-06-23 01:26:30 +00:00
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status = i2c_read_ack(timeout);
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if (status >= 0) {
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data[i] = status;
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}
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2018-07-18 16:55:57 +00:00
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}
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2018-05-16 02:30:58 +00:00
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2019-03-12 17:23:28 +00:00
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if (status >= 0) {
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status = i2c_read_nack(timeout);
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if (status >= 0) {
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data[(length - 1)] = status;
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}
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2018-06-23 01:26:30 +00:00
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}
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2019-03-12 17:23:28 +00:00
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i2c_stop();
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2018-05-16 02:30:58 +00:00
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2019-03-15 15:55:07 +00:00
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return (status < 0) ? status : I2C_STATUS_SUCCESS;
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2018-05-14 14:17:24 +00:00
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}
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2019-03-12 17:23:28 +00:00
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i2c_status_t i2c_writeReg(uint8_t devaddr, uint8_t regaddr, uint8_t* data, uint16_t length, uint16_t timeout) {
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2018-06-23 01:26:30 +00:00
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i2c_status_t status = i2c_start(devaddr | 0x00, timeout);
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2019-03-12 17:23:28 +00:00
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if (status >= 0) {
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status = i2c_write(regaddr, timeout);
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2018-05-14 14:17:24 +00:00
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2019-03-12 17:23:28 +00:00
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for (uint16_t i = 0; i < length && status >= 0; i++) {
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status = i2c_write(data[i], timeout);
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}
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2018-07-18 16:55:57 +00:00
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}
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2018-05-14 14:17:24 +00:00
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2019-03-12 17:23:28 +00:00
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i2c_stop();
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2018-05-14 14:17:24 +00:00
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2019-03-12 17:23:28 +00:00
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return status;
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2018-05-14 14:17:24 +00:00
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}
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2019-03-12 17:23:28 +00:00
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i2c_status_t i2c_readReg(uint8_t devaddr, uint8_t regaddr, uint8_t* data, uint16_t length, uint16_t timeout) {
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2018-06-23 01:26:30 +00:00
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i2c_status_t status = i2c_start(devaddr, timeout);
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2019-03-12 17:23:28 +00:00
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if (status < 0) {
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goto error;
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}
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2018-05-14 14:17:24 +00:00
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2018-06-23 01:26:30 +00:00
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status = i2c_write(regaddr, timeout);
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2019-03-12 17:23:28 +00:00
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if (status < 0) {
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goto error;
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}
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2019-01-10 16:26:40 +00:00
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2018-06-23 01:26:30 +00:00
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status = i2c_start(devaddr | 0x01, timeout);
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2018-05-14 14:17:24 +00:00
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2019-03-12 17:23:28 +00:00
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for (uint16_t i = 0; i < (length - 1) && status >= 0; i++) {
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2018-07-18 16:55:57 +00:00
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status = i2c_read_ack(timeout);
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2018-06-23 01:26:30 +00:00
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if (status >= 0) {
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data[i] = status;
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}
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2018-07-18 16:55:57 +00:00
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}
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2018-05-14 14:17:24 +00:00
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2019-03-12 17:23:28 +00:00
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if (status >= 0) {
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status = i2c_read_nack(timeout);
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if (status >= 0) {
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data[(length - 1)] = status;
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}
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2018-06-23 01:26:30 +00:00
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}
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2019-03-12 17:23:28 +00:00
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error:
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i2c_stop();
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2018-05-14 14:17:24 +00:00
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2019-03-15 15:55:07 +00:00
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return (status < 0) ? status : I2C_STATUS_SUCCESS;
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2018-05-14 14:17:24 +00:00
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}
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2019-03-12 17:23:28 +00:00
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void i2c_stop(void) {
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2018-07-18 16:55:57 +00:00
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// transmit STOP condition
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2019-03-12 17:23:28 +00:00
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TWCR = (1 << TWINT) | (1 << TWEN) | (1 << TWSTO);
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2019-01-10 16:26:40 +00:00
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}
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