2022-04-13 08:00:18 +00:00
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// Copyright 2021 Nick Brassel (@tzarc)
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// SPDX-License-Identifier: GPL-2.0-or-later
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#pragma once
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#ifdef QUANTUM_PAINTER_SPI_ENABLE
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# include <stdint.h>
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# include "gpio.h"
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# include "qp_internal.h"
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////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
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// Base SPI support
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2023-03-25 17:56:04 +00:00
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typedef struct qp_comms_spi_config_t {
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2022-04-13 08:00:18 +00:00
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pin_t chip_select_pin;
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uint16_t divisor;
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bool lsb_first;
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int8_t mode;
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2023-03-25 17:56:04 +00:00
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} qp_comms_spi_config_t;
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2022-04-13 08:00:18 +00:00
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bool qp_comms_spi_init(painter_device_t device);
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bool qp_comms_spi_start(painter_device_t device);
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uint32_t qp_comms_spi_send_data(painter_device_t device, const void* data, uint32_t byte_count);
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void qp_comms_spi_stop(painter_device_t device);
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2023-03-25 17:56:04 +00:00
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extern const painter_comms_vtable_t spi_comms_vtable;
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2022-04-13 08:00:18 +00:00
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////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
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// SPI with D/C and RST pins
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# ifdef QUANTUM_PAINTER_SPI_DC_RESET_ENABLE
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2023-03-25 17:56:04 +00:00
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typedef struct qp_comms_spi_dc_reset_config_t {
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qp_comms_spi_config_t spi_config;
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pin_t dc_pin;
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pin_t reset_pin;
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} qp_comms_spi_dc_reset_config_t;
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2022-04-13 08:00:18 +00:00
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void qp_comms_spi_dc_reset_send_command(painter_device_t device, uint8_t cmd);
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uint32_t qp_comms_spi_dc_reset_send_data(painter_device_t device, const void* data, uint32_t byte_count);
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void qp_comms_spi_dc_reset_bulk_command_sequence(painter_device_t device, const uint8_t* sequence, size_t sequence_len);
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2023-03-25 17:56:04 +00:00
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extern const painter_comms_with_command_vtable_t spi_comms_with_dc_vtable;
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2022-04-13 08:00:18 +00:00
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# endif // QUANTUM_PAINTER_SPI_DC_RESET_ENABLE
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////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
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#endif // QUANTUM_PAINTER_SPI_ENABLE
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