8e394ffc7a
2015-09-25 Andrew Bennett <andrew.bennett@imgtec.com> Ali Lown <ali.lown@imgtec.com> sim/common/ * sim-bits.h (EXTEND6): New macro. (EXTEND12): New macro. (EXTEND25): New macro. sim/mips/ * Makefile.in (tmp-micromips): New rule. (tmp-mach-multi): Add support for micromips. * configure.ac (mips*-sde-elf* | mips*-mti-elf*): Made a multi sim that works for both mips64 and micromips64. (mipsisa32r2*-*-*): Made a multi sim that works for mips32 and micromips32. Add build support for micromips. * dsp.igen (do_ph_s_absq, do_w_s_absq, do_qb_s_absq, do_addsc, do_addwc, do_bitrev, do_extpv, do_extrv, do_extrv_s_h, do_insv, do_lxx do_modsub, do_mthlip, do_mulsaq_s_w_ph, do_ph_packrl, do_qb_pick do_ph_pick, do_qb_ph_precequ, do_qb_ph_preceu, do_w_preceq do_w_ph_precrq, do_ph_qb_precrq, do_w_ph_rs_precrq do_qb_w_raddu, do_rddsp, do_repl, do_shilov, do_ph_shl, do_qb_shl do_w_s_shllv, do_ph_shrlv, do_w_r_shrav, do_wrdsp, do_qb_shrav, do_append, do_balign, do_ph_w_mulsa, do_ph_qb_precr, do_prepend): New functions. Refactored instruction code to use these functions. * dsp2.igen: Refactored instruction code to use the new functions. * interp.c (decode_coproc): Refactored to work with any instruction encoding. (isa_mode): New variable (RSVD_INSTRUCTION): Changed to 0x00000039. * m16.igen (BREAK16): Refactored instruction to use do_break16. (JALX32): Add mips32, mips64, mips32r2 and mips64r2 models. * micromips.dc: New file. * micromips.igen: New file. * micromips16.dc: New file. * micromipsdsp.igen: New file. * micromipsrun.c: New file. * mips.igen (do_swc1): Changed to work with any instruction encoding. (do_add do_addi do_andi do_dadd do_daddi do_dsll32 do_dsra32 do_dsrl32, do_dsub, do_break, do_break16, do_clo, do_clz, do_dclo do_dclz, do_lb, do_lh, do_lwr, do_lwl, do_lwc, do_lw, do_lwu, do_lhu do_ldc, do_lbu, do_ll, do_lld, do_lui, do_madd, do_dsp_madd, do_maddu do_dsp_maddu, do_dsp_mfhi, do_dsp_mflo, do_movn, do_movz, do_msub do_dsp_msub, do_msubu, do_dsp_msubu, do_mthi, do_dsp_mthi, do_mtlo do_dsp_mtlo, do_mul, do_dsp_mult, do_dsp_multu, do_pref, do_sc, do_scd do_sub, do_sw, do_teq, do_teqi, do_tge, do_tgei, do_tgeiu, do_tgeu, do_tlt do_tlti, do_tltiu, do_tltu, do_tne, do_tnei, do_abs_fmt, do_add_fmt do_alnv_ps, do_c_cond_fmt, do_ceil_fmt, do_cfc1, do_ctc1, do_cvt_d_fmt do_cvt_l_fmt, do_cvt_ps_s, do_cvt_s_fmt, do_cvt_s_pl, do_cvt_s_pu do_cvt_w_fmt, do_div_fmt, do_dmfc1b, do_dmtc1b, do_floor_fmt, do_luxc1_32 do_luxc1_64, do_lwc1, do_lwxc1, do_madd_fmt, do_mfc1b, do_mov_fmt, do_movtf do_movtf_fmt, do_movn_fmt, do_movz_fmt, do_msub_fmt, do_mtc1b, do_mul_fmt do_neg_fmt, do_nmadd_fmt, do_nmsub_fmt, do_pll_ps, do_plu_ps, do_pul_ps do_puu_ps, do_recip_fmt, do_round_fmt, do_rsqrt_fmt, do_prefx, do_sdc1 do_suxc1_32, do_suxc1_64, do_sqrt_fmt, do_sub_fmt, do_swc1, do_swxc1 do_trunc_fmt): New functions, refactored from existing instructions. Refactored instruction code to use these functions. (RSVD): Changed to use new reserved instruction. (loadstore_ea, not_word_value, unpredictable, check_mt_hilo, check_mf_hilo, check_mult_hilo, check_div_hilo, check_u64, do_luxc1_32, do_sdc1, do_suxc1_32, check_fmt_p, check_fpu, do_load_double, do_store_double): Added micromips32 and micromips64 models. Added include for micromips.igen and micromipsdsp.igen Add micromips32 and micromips64 models. (DecodeCoproc): Updated to use new macro definition. * mips3264r2.igen (do_dsbh, do_dshd, do_dext, do_dextm, do_dextu, do_di, do_dins, do_dinsm, do_ei, do_ext, do_mfhc1, do_mthc1, do_ins, do_dinsu, do_seb, do_seh do_rdhwr, do_wsbh): New functions. Refactored instruction code to use these functions. * sim-main.h (CP0_operation): New enum. (DecodeCoproc): Updated macro. (IMEM32_MICROMIPS, IMEM16_MICROMIPS, MICROMIPS_MINOR_OPCODE, MICROMIPS_DELAYSLOT_SIZE_ANY, MICROMIPS_DELAYSLOT_SIZE_16, MICROMIPS_DELAYSLOT_SIZE_32, ISA_MODE_MIPS32 and ISA_MODE_MICROMIPS): New defines. (sim_state): Add isa_mode field. sim/testsuite/sim/mips/ * basic.exp (run_micromips_test, run_sim_tests): New functions Add support for micromips tests. * hilo-hazard-4.s: New file. * testutils.inc (_dowrite): Changed reserved instruction encoding. (writemsg): Moved the la and li instructions before the data they are assigned to, which prevents a bug where MIPS32 relocations are used instead of micromips relocations when building for micromips.
135 lines
4.3 KiB
C
135 lines
4.3 KiB
C
/* Run function for the micromips simulator
|
|
|
|
Copyright (C) 2005-2015 Free Software Foundation, Inc.
|
|
Contributed by Imagination Technologies, Ltd.
|
|
Written by Andrew Bennett <andrew.bennett@imgtec.com>.
|
|
|
|
This file is part of the MIPS sim.
|
|
|
|
This program is free software; you can redistribute it and/or modify
|
|
it under the terms of the GNU General Public License as published by
|
|
the Free Software Foundation; either version 3 of the License, or
|
|
(at your option) any later version.
|
|
|
|
This program is distributed in the hope that it will be useful,
|
|
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
|
GNU General Public License for more details.
|
|
|
|
You should have received a copy of the GNU General Public License
|
|
along with this program. If not, see <http://www.gnu.org/licenses/>. */
|
|
|
|
#include "sim-main.h"
|
|
#include "micromips16_idecode.h"
|
|
#include "micromips32_idecode.h"
|
|
#include "micromips_m32_idecode.h"
|
|
#include "bfd.h"
|
|
#include "sim-engine.h"
|
|
|
|
/* These definitions come from the *_support.h files generated by igen and are
|
|
required because they are used in some of the macros in the code below.
|
|
Unfortunately we can not just blindly include the *_support.h files to get
|
|
these definitions because some of the defines in these files are specific
|
|
for a particular configuration of the simulator for example instruction word
|
|
size is 16 bits for micromips16 and 32 bits for micromips32. This means we
|
|
could break future code changes by doing this, so a safer approach is to just
|
|
extract the defines that we need to get this file to compile. */
|
|
#define SD sd
|
|
#define CPU cpu
|
|
|
|
address_word
|
|
micromips_instruction_decode (SIM_DESC sd, sim_cpu * cpu,
|
|
address_word cia,
|
|
int instruction_size)
|
|
{
|
|
if (instruction_size == MICROMIPS_DELAYSLOT_SIZE_ANY)
|
|
{
|
|
micromips16_instruction_word instruction_0 = IMEM16_MICROMIPS (cia);
|
|
if (MICROMIPS_MINOR_OPCODE (instruction_0) > 0
|
|
&& MICROMIPS_MINOR_OPCODE (instruction_0) < 4)
|
|
return micromips16_idecode_issue (sd, instruction_0, cia);
|
|
else
|
|
{
|
|
micromips32_instruction_word instruction_0 = IMEM32_MICROMIPS (cia);
|
|
return micromips32_idecode_issue (sd, instruction_0, cia);
|
|
}
|
|
}
|
|
else if (instruction_size == MICROMIPS_DELAYSLOT_SIZE_16)
|
|
{
|
|
micromips16_instruction_word instruction_0 = IMEM16_MICROMIPS (cia);
|
|
if (MICROMIPS_MINOR_OPCODE (instruction_0) > 0
|
|
&& MICROMIPS_MINOR_OPCODE (instruction_0) < 4)
|
|
return micromips16_idecode_issue (sd, instruction_0, cia);
|
|
else
|
|
sim_engine_abort (sd, cpu, cia,
|
|
"Invalid 16 bit micromips instruction");
|
|
}
|
|
else if (instruction_size == MICROMIPS_DELAYSLOT_SIZE_32)
|
|
{
|
|
micromips32_instruction_word instruction_0 = IMEM32_MICROMIPS (cia);
|
|
return micromips32_idecode_issue (sd, instruction_0, cia);
|
|
}
|
|
else
|
|
return NULL_CIA;
|
|
}
|
|
|
|
void
|
|
sim_engine_run (SIM_DESC sd, int next_cpu_nr, int nr_cpus,
|
|
int signal)
|
|
{
|
|
micromips_m32_instruction_word instruction_0;
|
|
sim_cpu *cpu = STATE_CPU (sd, next_cpu_nr);
|
|
micromips32_instruction_address cia = CPU_PC_GET (cpu);
|
|
sd->isa_mode = ISA_MODE_MIPS32;
|
|
|
|
while (1)
|
|
{
|
|
micromips32_instruction_address nia;
|
|
|
|
/* Allow us to switch back from MIPS32 to microMIPS
|
|
This covers two cases:
|
|
1. Setting the correct isa mode based on the start address
|
|
from the elf header.
|
|
2. Setting the correct isa mode after a MIPS32 jump or branch
|
|
instruction. */
|
|
if ((sd->isa_mode == ISA_MODE_MIPS32)
|
|
&& ((cia & 0x1) == ISA_MODE_MICROMIPS))
|
|
{
|
|
sd->isa_mode = ISA_MODE_MICROMIPS;
|
|
cia = cia & ~0x1;
|
|
}
|
|
|
|
#if defined (ENGINE_ISSUE_PREFIX_HOOK)
|
|
ENGINE_ISSUE_PREFIX_HOOK ();
|
|
#endif
|
|
switch (sd->isa_mode)
|
|
{
|
|
case ISA_MODE_MICROMIPS:
|
|
nia =
|
|
micromips_instruction_decode (sd, cpu, cia,
|
|
MICROMIPS_DELAYSLOT_SIZE_ANY);
|
|
break;
|
|
case ISA_MODE_MIPS32:
|
|
instruction_0 = IMEM32 (cia);
|
|
nia = micromips_m32_idecode_issue (sd, instruction_0, cia);
|
|
break;
|
|
default:
|
|
nia = NULL_CIA;
|
|
}
|
|
|
|
#if defined (ENGINE_ISSUE_POSTFIX_HOOK)
|
|
ENGINE_ISSUE_POSTFIX_HOOK ();
|
|
#endif
|
|
|
|
/* Update the instruction address */
|
|
cia = nia;
|
|
|
|
/* process any events */
|
|
if (sim_events_tick (sd))
|
|
{
|
|
CPU_PC_SET (cpu, cia);
|
|
sim_events_process (sd);
|
|
cia = CPU_PC_GET (cpu);
|
|
}
|
|
}
|
|
}
|