ff6f572f8b
if there are no FPA registers. (arm_dwarf_reg_to_regnum): New function. (arm_register_type, arm_register_name): Return minimal values for unsupported registers. (arm_register_sim_regno): Handle iWMMXt registers. (arm_gdbarch_init): Record missing FPA registers if indicated by a target description. Recognize iWMMXt registers. Only register "info float" for FPA. Use ARM_NUM_REGS. Register arm_dwarf_reg_to_regnum. * arm-tdep.h (enum gdb_regnum): Add ARM_NUM_REGS and iWMMXt constants. (struct gdbarch_tdep): Add have_fpa_registers. * features/xscale-iwmmxt.xml: Update capitalization. * regformats/arm-with-iwmmxt.dat: Regenerated. * src/gdb/doc/gdb.texinfo (Standard Target Features): Mention case insensitivity. (ARM Features): Describe org.gnu.gdb.xscale.iwmmxt. * gdb.arch/iwmmxt-regs.c, gdb.arch/iwmmxt-regs.exp: Update register capitalization.
51 lines
396 B
Text
51 lines
396 B
Text
# DO NOT EDIT: generated from arm-with-iwmmxt.xml
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name:arm_with_iwmmxt
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expedite:r11,sp,pc
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32:r0
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32:r1
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32:r2
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32:r3
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32:r4
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32:r5
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32:r6
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32:r7
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32:r8
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32:r9
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32:r10
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32:r11
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32:r12
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32:sp
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32:lr
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32:pc
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0:
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0:
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0:
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0:
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0:
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0:
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0:
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0:
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0:
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32:cpsr
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64:wR0
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64:wR1
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64:wR2
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64:wR3
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64:wR4
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64:wR5
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64:wR6
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64:wR7
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64:wR8
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64:wR9
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64:wR10
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64:wR11
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64:wR12
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64:wR13
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64:wR14
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64:wR15
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32:wCSSF
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32:wCASF
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32:wCGR0
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32:wCGR1
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32:wCGR2
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32:wCGR3
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