1187 lines
34 KiB
C
1187 lines
34 KiB
C
/* Target-dependent code for the Fujitsu FR-V, for GDB, the GNU Debugger.
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Copyright 2002, 2003 Free Software Foundation, Inc.
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This file is part of GDB.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 59 Temple Place - Suite 330,
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Boston, MA 02111-1307, USA. */
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#include "defs.h"
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#include "gdb_string.h"
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#include "inferior.h"
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#include "symfile.h" /* for entry_point_address */
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#include "gdbcore.h"
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#include "arch-utils.h"
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#include "regcache.h"
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#include "frame.h"
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#include "frame-unwind.h"
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#include "frame-base.h"
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#include "trad-frame.h"
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#include "dis-asm.h"
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extern void _initialize_frv_tdep (void);
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static gdbarch_init_ftype frv_gdbarch_init;
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static gdbarch_register_name_ftype frv_register_name;
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static gdbarch_breakpoint_from_pc_ftype frv_breakpoint_from_pc;
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static gdbarch_skip_prologue_ftype frv_skip_prologue;
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static gdbarch_deprecated_extract_return_value_ftype frv_extract_return_value;
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static gdbarch_deprecated_extract_struct_value_address_ftype frv_extract_struct_value_address;
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static gdbarch_frameless_function_invocation_ftype frv_frameless_function_invocation;
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static gdbarch_deprecated_push_arguments_ftype frv_push_arguments;
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static gdbarch_deprecated_saved_pc_after_call_ftype frv_saved_pc_after_call;
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/* Register numbers. You can change these as needed, but don't forget
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to update the simulator accordingly. */
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enum {
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/* The total number of registers we know exist. */
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frv_num_regs = 147,
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/* Register numbers 0 -- 63 are always reserved for general-purpose
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registers. The chip at hand may have less. */
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first_gpr_regnum = 0,
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sp_regnum = 1,
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fp_regnum = 2,
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struct_return_regnum = 3,
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last_gpr_regnum = 63,
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/* Register numbers 64 -- 127 are always reserved for floating-point
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registers. The chip at hand may have less. */
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first_fpr_regnum = 64,
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last_fpr_regnum = 127,
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/* Register numbers 128 on up are always reserved for special-purpose
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registers. */
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first_spr_regnum = 128,
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pc_regnum = 128,
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psr_regnum = 129,
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ccr_regnum = 130,
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cccr_regnum = 131,
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tbr_regnum = 135,
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brr_regnum = 136,
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dbar0_regnum = 137,
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dbar1_regnum = 138,
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dbar2_regnum = 139,
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dbar3_regnum = 140,
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lr_regnum = 145,
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lcr_regnum = 146,
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last_spr_regnum = 146
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};
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static LONGEST frv_call_dummy_words[] =
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{0};
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struct frv_unwind_cache /* was struct frame_extra_info */
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{
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/* The previous frame's inner-most stack address. Used as this
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frame ID's stack_addr. */
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CORE_ADDR prev_sp;
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/* The frame's base, optionally used by the high-level debug info. */
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CORE_ADDR base;
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/* Table indicating the location of each and every register. */
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struct trad_frame_saved_reg *saved_regs;
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};
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/* A structure describing a particular variant of the FRV.
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We allocate and initialize one of these structures when we create
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the gdbarch object for a variant.
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At the moment, all the FR variants we support differ only in which
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registers are present; the portable code of GDB knows that
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registers whose names are the empty string don't exist, so the
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`register_names' array captures all the per-variant information we
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need.
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in the future, if we need to have per-variant maps for raw size,
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virtual type, etc., we should replace register_names with an array
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of structures, each of which gives all the necessary info for one
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register. Don't stick parallel arrays in here --- that's so
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Fortran. */
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struct gdbarch_tdep
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{
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/* How many general-purpose registers does this variant have? */
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int num_gprs;
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/* How many floating-point registers does this variant have? */
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int num_fprs;
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/* How many hardware watchpoints can it support? */
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int num_hw_watchpoints;
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/* How many hardware breakpoints can it support? */
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int num_hw_breakpoints;
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/* Register names. */
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char **register_names;
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};
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#define CURRENT_VARIANT (gdbarch_tdep (current_gdbarch))
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/* Allocate a new variant structure, and set up default values for all
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the fields. */
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static struct gdbarch_tdep *
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new_variant (void)
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{
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struct gdbarch_tdep *var;
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int r;
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char buf[20];
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var = xmalloc (sizeof (*var));
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memset (var, 0, sizeof (*var));
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var->num_gprs = 64;
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var->num_fprs = 64;
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var->num_hw_watchpoints = 0;
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var->num_hw_breakpoints = 0;
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/* By default, don't supply any general-purpose or floating-point
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register names. */
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var->register_names = (char **) xmalloc (frv_num_regs * sizeof (char *));
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for (r = 0; r < frv_num_regs; r++)
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var->register_names[r] = "";
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/* Do, however, supply default names for the special-purpose
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registers. */
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for (r = first_spr_regnum; r <= last_spr_regnum; ++r)
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{
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sprintf (buf, "x%d", r);
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var->register_names[r] = xstrdup (buf);
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}
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var->register_names[pc_regnum] = "pc";
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var->register_names[lr_regnum] = "lr";
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var->register_names[lcr_regnum] = "lcr";
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var->register_names[psr_regnum] = "psr";
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var->register_names[ccr_regnum] = "ccr";
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var->register_names[cccr_regnum] = "cccr";
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var->register_names[tbr_regnum] = "tbr";
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/* Debug registers. */
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var->register_names[brr_regnum] = "brr";
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var->register_names[dbar0_regnum] = "dbar0";
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var->register_names[dbar1_regnum] = "dbar1";
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var->register_names[dbar2_regnum] = "dbar2";
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var->register_names[dbar3_regnum] = "dbar3";
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return var;
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}
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/* Indicate that the variant VAR has NUM_GPRS general-purpose
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registers, and fill in the names array appropriately. */
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static void
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set_variant_num_gprs (struct gdbarch_tdep *var, int num_gprs)
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{
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int r;
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var->num_gprs = num_gprs;
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for (r = 0; r < num_gprs; ++r)
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{
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char buf[20];
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sprintf (buf, "gr%d", r);
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var->register_names[first_gpr_regnum + r] = xstrdup (buf);
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}
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}
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/* Indicate that the variant VAR has NUM_FPRS floating-point
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registers, and fill in the names array appropriately. */
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static void
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set_variant_num_fprs (struct gdbarch_tdep *var, int num_fprs)
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{
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int r;
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var->num_fprs = num_fprs;
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for (r = 0; r < num_fprs; ++r)
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{
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char buf[20];
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sprintf (buf, "fr%d", r);
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var->register_names[first_fpr_regnum + r] = xstrdup (buf);
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}
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}
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static const char *
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frv_register_name (int reg)
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{
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if (reg < 0)
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return "?toosmall?";
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if (reg >= frv_num_regs)
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return "?toolarge?";
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return CURRENT_VARIANT->register_names[reg];
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}
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static int
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frv_register_raw_size (int reg)
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{
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return 4;
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}
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static int
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frv_register_virtual_size (int reg)
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{
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return 4;
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}
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static struct type *
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frv_register_virtual_type (int reg)
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{
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if (reg >= 64 && reg <= 127)
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return builtin_type_float;
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else
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return builtin_type_int;
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}
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static int
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frv_register_byte (int reg)
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{
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return (reg * 4);
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}
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static const unsigned char *
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frv_breakpoint_from_pc (CORE_ADDR *pcptr, int *lenp)
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{
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static unsigned char breakpoint[] = {0xc0, 0x70, 0x00, 0x01};
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*lenp = sizeof (breakpoint);
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return breakpoint;
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}
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/* Return true if REG is a caller-saves ("scratch") register,
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false otherwise. */
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static int
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is_caller_saves_reg (int reg)
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{
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return ((4 <= reg && reg <= 7)
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|| (14 <= reg && reg <= 15)
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|| (32 <= reg && reg <= 47));
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}
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/* Return true if REG is a callee-saves register, false otherwise. */
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static int
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is_callee_saves_reg (int reg)
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{
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return ((16 <= reg && reg <= 31)
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|| (48 <= reg && reg <= 63));
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}
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/* Return true if REG is an argument register, false otherwise. */
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static int
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is_argument_reg (int reg)
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{
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return (8 <= reg && reg <= 13);
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}
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/* Scan an FR-V prologue, starting at PC, until frame->PC.
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If FRAME is non-zero, fill in its saved_regs with appropriate addresses.
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We assume FRAME's saved_regs array has already been allocated and cleared.
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Return the first PC value after the prologue.
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Note that, for unoptimized code, we almost don't need this function
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at all; all arguments and locals live on the stack, so we just need
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the FP to find everything. The catch: structures passed by value
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have their addresses living in registers; they're never spilled to
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the stack. So if you ever want to be able to get to these
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arguments in any frame but the top, you'll need to do this serious
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prologue analysis. */
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static CORE_ADDR
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frv_analyze_prologue (CORE_ADDR pc, struct frame_info *next_frame,
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struct frv_unwind_cache *info)
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{
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/* When writing out instruction bitpatterns, we use the following
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letters to label instruction fields:
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P - The parallel bit. We don't use this.
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J - The register number of GRj in the instruction description.
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K - The register number of GRk in the instruction description.
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I - The register number of GRi.
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S - a signed imediate offset.
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U - an unsigned immediate offset.
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The dots below the numbers indicate where hex digit boundaries
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fall, to make it easier to check the numbers. */
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/* Non-zero iff we've seen the instruction that initializes the
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frame pointer for this function's frame. */
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int fp_set = 0;
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/* If fp_set is non_zero, then this is the distance from
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the stack pointer to frame pointer: fp = sp + fp_offset. */
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int fp_offset = 0;
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/* Total size of frame prior to any alloca operations. */
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int framesize = 0;
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/* Flag indicating if lr has been saved on the stack. */
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int lr_saved_on_stack = 0;
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/* The number of the general-purpose register we saved the return
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address ("link register") in, or -1 if we haven't moved it yet. */
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int lr_save_reg = -1;
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/* Offset (from sp) at which lr has been saved on the stack. */
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int lr_sp_offset = 0;
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/* If gr_saved[i] is non-zero, then we've noticed that general
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register i has been saved at gr_sp_offset[i] from the stack
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pointer. */
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char gr_saved[64];
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int gr_sp_offset[64];
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memset (gr_saved, 0, sizeof (gr_saved));
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while (! next_frame || pc < frame_pc_unwind (next_frame))
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{
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LONGEST op = read_memory_integer (pc, 4);
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/* The tests in this chain of ifs should be in order of
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decreasing selectivity, so that more particular patterns get
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to fire before less particular patterns. */
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/* Setting the FP from the SP:
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ori sp, 0, fp
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P 000010 0100010 000001 000000000000 = 0x04881000
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0 111111 1111111 111111 111111111111 = 0x7fffffff
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. . . . . . . .
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We treat this as part of the prologue. */
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if ((op & 0x7fffffff) == 0x04881000)
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{
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fp_set = 1;
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fp_offset = 0;
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}
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/* Move the link register to the scratch register grJ, before saving:
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movsg lr, grJ
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P 000100 0000011 010000 000111 JJJJJJ = 0x080d01c0
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0 111111 1111111 111111 111111 000000 = 0x7fffffc0
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. . . . . . . .
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We treat this as part of the prologue. */
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else if ((op & 0x7fffffc0) == 0x080d01c0)
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{
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int gr_j = op & 0x3f;
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/* If we're moving it to a scratch register, that's fine. */
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if (is_caller_saves_reg (gr_j))
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lr_save_reg = gr_j;
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/* Otherwise it's not a prologue instruction that we
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recognize. */
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else
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break;
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}
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/* To save multiple callee-saves registers on the stack, at
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offset zero:
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std grK,@(sp,gr0)
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P KKKKKK 0000011 000001 000011 000000 = 0x000c10c0
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0 000000 1111111 111111 111111 111111 = 0x01ffffff
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stq grK,@(sp,gr0)
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P KKKKKK 0000011 000001 000100 000000 = 0x000c1100
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0 000000 1111111 111111 111111 111111 = 0x01ffffff
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. . . . . . . .
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We treat this as part of the prologue, and record the register's
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saved address in the frame structure. */
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else if ((op & 0x01ffffff) == 0x000c10c0
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|| (op & 0x01ffffff) == 0x000c1100)
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{
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int gr_k = ((op >> 25) & 0x3f);
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int ope = ((op >> 6) & 0x3f);
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int count;
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int i;
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/* Is it an std or an stq? */
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if (ope == 0x03)
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count = 2;
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else
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count = 4;
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/* Is it really a callee-saves register? */
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if (is_callee_saves_reg (gr_k))
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{
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for (i = 0; i < count; i++)
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{
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gr_saved[gr_k + i] = 1;
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gr_sp_offset[gr_k + i] = 4 * i;
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}
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}
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else
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/* It's not a prologue instruction. */
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break;
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}
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/* Adjusting the stack pointer. (The stack pointer is GR1.)
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addi sp, S, sp
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P 000001 0010000 000001 SSSSSSSSSSSS = 0x02401000
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0 111111 1111111 111111 000000000000 = 0x7ffff000
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. . . . . . . .
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We treat this as part of the prologue. */
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else if ((op & 0x7ffff000) == 0x02401000)
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{
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/* Sign-extend the twelve-bit field.
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(Isn't there a better way to do this?) */
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int s = (((op & 0xfff) - 0x800) & 0xfff) - 0x800;
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framesize -= s;
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}
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/* Setting the FP to a constant distance from the SP:
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addi sp, S, fp
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P 000010 0010000 000001 SSSSSSSSSSSS = 0x04401000
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0 111111 1111111 111111 000000000000 = 0x7ffff000
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. . . . . . . .
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We treat this as part of the prologue. */
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else if ((op & 0x7ffff000) == 0x04401000)
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{
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/* Sign-extend the twelve-bit field.
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(Isn't there a better way to do this?) */
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int s = (((op & 0xfff) - 0x800) & 0xfff) - 0x800;
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fp_set = 1;
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fp_offset = s;
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}
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/* To spill an argument register to a scratch register:
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ori GRi, 0, GRk
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P KKKKKK 0100010 IIIIII 000000000000 = 0x00880000
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0 000000 1111111 000000 111111111111 = 0x01fc0fff
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. . . . . . . .
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For the time being, we treat this as a prologue instruction,
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assuming that GRi is an argument register. This one's kind
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of suspicious, because it seems like it could be part of a
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legitimate body instruction. But we only come here when the
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source info wasn't helpful, so we have to do the best we can.
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Hopefully once GCC and GDB agree on how to emit line number
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info for prologues, then this code will never come into play. */
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else if ((op & 0x01fc0fff) == 0x00880000)
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{
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int gr_i = ((op >> 12) & 0x3f);
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/* If the source isn't an arg register, then this isn't a
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prologue instruction. */
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if (! is_argument_reg (gr_i))
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break;
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}
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/* To spill 16-bit values to the stack:
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sthi GRk, @(fp, s)
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P KKKKKK 1010001 000010 SSSSSSSSSSSS = 0x01442000
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0 000000 1111111 111111 000000000000 = 0x01fff000
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. . . . . . . .
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And for 8-bit values, we use STB instructions.
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stbi GRk, @(fp, s)
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P KKKKKK 1010000 000010 SSSSSSSSSSSS = 0x01402000
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0 000000 1111111 111111 000000000000 = 0x01fff000
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. . . . . . . .
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We check that GRk is really an argument register, and treat
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all such as part of the prologue. */
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else if ( (op & 0x01fff000) == 0x01442000
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|| (op & 0x01fff000) == 0x01402000)
|
|
{
|
|
int gr_k = ((op >> 25) & 0x3f);
|
|
|
|
if (! is_argument_reg (gr_k))
|
|
break; /* Source isn't an arg register. */
|
|
}
|
|
|
|
/* To save multiple callee-saves register on the stack, at a
|
|
non-zero offset:
|
|
|
|
stdi GRk, @(sp, s)
|
|
P KKKKKK 1010011 000001 SSSSSSSSSSSS = 0x014c1000
|
|
0 000000 1111111 111111 000000000000 = 0x01fff000
|
|
. . . . . . . .
|
|
stqi GRk, @(sp, s)
|
|
P KKKKKK 1010100 000001 SSSSSSSSSSSS = 0x01501000
|
|
0 000000 1111111 111111 000000000000 = 0x01fff000
|
|
. . . . . . . .
|
|
We treat this as part of the prologue, and record the register's
|
|
saved address in the frame structure. */
|
|
else if ((op & 0x01fff000) == 0x014c1000
|
|
|| (op & 0x01fff000) == 0x01501000)
|
|
{
|
|
int gr_k = ((op >> 25) & 0x3f);
|
|
int count;
|
|
int i;
|
|
|
|
/* Is it a stdi or a stqi? */
|
|
if ((op & 0x01fff000) == 0x014c1000)
|
|
count = 2;
|
|
else
|
|
count = 4;
|
|
|
|
/* Is it really a callee-saves register? */
|
|
if (is_callee_saves_reg (gr_k))
|
|
{
|
|
/* Sign-extend the twelve-bit field.
|
|
(Isn't there a better way to do this?) */
|
|
int s = (((op & 0xfff) - 0x800) & 0xfff) - 0x800;
|
|
|
|
for (i = 0; i < count; i++)
|
|
{
|
|
gr_saved[gr_k + i] = 1;
|
|
gr_sp_offset[gr_k + i] = s + (4 * i);
|
|
}
|
|
}
|
|
else
|
|
/* It's not a prologue instruction. */
|
|
break;
|
|
}
|
|
|
|
/* Storing any kind of integer register at any constant offset
|
|
from any other register.
|
|
|
|
st GRk, @(GRi, gr0)
|
|
P KKKKKK 0000011 IIIIII 000010 000000 = 0x000c0080
|
|
0 000000 1111111 000000 111111 111111 = 0x01fc0fff
|
|
. . . . . . . .
|
|
sti GRk, @(GRi, d12)
|
|
P KKKKKK 1010010 IIIIII SSSSSSSSSSSS = 0x01480000
|
|
0 000000 1111111 000000 000000000000 = 0x01fc0000
|
|
. . . . . . . .
|
|
These could be almost anything, but a lot of prologue
|
|
instructions fall into this pattern, so let's decode the
|
|
instruction once, and then work at a higher level. */
|
|
else if (((op & 0x01fc0fff) == 0x000c0080)
|
|
|| ((op & 0x01fc0000) == 0x01480000))
|
|
{
|
|
int gr_k = ((op >> 25) & 0x3f);
|
|
int gr_i = ((op >> 12) & 0x3f);
|
|
int offset;
|
|
|
|
/* Are we storing with gr0 as an offset, or using an
|
|
immediate value? */
|
|
if ((op & 0x01fc0fff) == 0x000c0080)
|
|
offset = 0;
|
|
else
|
|
offset = (((op & 0xfff) - 0x800) & 0xfff) - 0x800;
|
|
|
|
/* If the address isn't relative to the SP or FP, it's not a
|
|
prologue instruction. */
|
|
if (gr_i != sp_regnum && gr_i != fp_regnum)
|
|
break;
|
|
|
|
/* Saving the old FP in the new frame (relative to the SP). */
|
|
if (gr_k == fp_regnum && gr_i == sp_regnum)
|
|
{
|
|
gr_saved[fp_regnum] = 1;
|
|
gr_sp_offset[fp_regnum] = offset;
|
|
}
|
|
|
|
/* Saving callee-saves register(s) on the stack, relative to
|
|
the SP. */
|
|
else if (gr_i == sp_regnum
|
|
&& is_callee_saves_reg (gr_k))
|
|
{
|
|
gr_saved[gr_k] = 1;
|
|
if (gr_i == sp_regnum)
|
|
gr_sp_offset[gr_k] = offset;
|
|
else
|
|
gr_sp_offset[gr_k] = offset + fp_offset;
|
|
}
|
|
|
|
/* Saving the scratch register holding the return address. */
|
|
else if (lr_save_reg != -1
|
|
&& gr_k == lr_save_reg)
|
|
{
|
|
lr_saved_on_stack = 1;
|
|
if (gr_i == sp_regnum)
|
|
lr_sp_offset = offset;
|
|
else
|
|
lr_sp_offset = offset + fp_offset;
|
|
}
|
|
|
|
/* Spilling int-sized arguments to the stack. */
|
|
else if (is_argument_reg (gr_k))
|
|
;
|
|
|
|
/* It's not a store instruction we recognize, so this must
|
|
be the end of the prologue. */
|
|
else
|
|
break;
|
|
}
|
|
|
|
/* It's not any instruction we recognize, so this must be the end
|
|
of the prologue. */
|
|
else
|
|
break;
|
|
|
|
pc += 4;
|
|
}
|
|
|
|
if (next_frame && info)
|
|
{
|
|
int i;
|
|
ULONGEST this_base;
|
|
|
|
/* If we know the relationship between the stack and frame
|
|
pointers, record the addresses of the registers we noticed.
|
|
Note that we have to do this as a separate step at the end,
|
|
because instructions may save relative to the SP, but we need
|
|
their addresses relative to the FP. */
|
|
if (fp_set)
|
|
frame_unwind_unsigned_register (next_frame, fp_regnum, &this_base);
|
|
else
|
|
frame_unwind_unsigned_register (next_frame, sp_regnum, &this_base);
|
|
|
|
for (i = 0; i < 64; i++)
|
|
if (gr_saved[i])
|
|
info->saved_regs[i].addr = this_base - fp_offset + gr_sp_offset[i];
|
|
|
|
info->prev_sp = this_base - fp_offset + framesize;
|
|
info->base = this_base;
|
|
|
|
/* If LR was saved on the stack, record its location. */
|
|
if (lr_saved_on_stack)
|
|
info->saved_regs[lr_regnum].addr = this_base - fp_offset + lr_sp_offset;
|
|
|
|
/* The call instruction moves the caller's PC in the callee's LR.
|
|
Since this is an unwind, do the reverse. Copy the location of LR
|
|
into PC (the address / regnum) so that a request for PC will be
|
|
converted into a request for the LR. */
|
|
info->saved_regs[pc_regnum] = info->saved_regs[lr_regnum];
|
|
|
|
/* Save the previous frame's computed SP value. */
|
|
trad_frame_set_value (info->saved_regs, sp_regnum, info->prev_sp);
|
|
}
|
|
|
|
return pc;
|
|
}
|
|
|
|
|
|
static CORE_ADDR
|
|
frv_skip_prologue (CORE_ADDR pc)
|
|
{
|
|
CORE_ADDR func_addr, func_end, new_pc;
|
|
|
|
new_pc = pc;
|
|
|
|
/* If the line table has entry for a line *within* the function
|
|
(i.e., not in the prologue, and not past the end), then that's
|
|
our location. */
|
|
if (find_pc_partial_function (pc, NULL, &func_addr, &func_end))
|
|
{
|
|
struct symtab_and_line sal;
|
|
|
|
sal = find_pc_line (func_addr, 0);
|
|
|
|
if (sal.line != 0 && sal.end < func_end)
|
|
{
|
|
new_pc = sal.end;
|
|
}
|
|
}
|
|
|
|
/* The FR-V prologue is at least five instructions long (twenty bytes).
|
|
If we didn't find a real source location past that, then
|
|
do a full analysis of the prologue. */
|
|
if (new_pc < pc + 20)
|
|
new_pc = frv_analyze_prologue (pc, 0, 0);
|
|
|
|
return new_pc;
|
|
}
|
|
|
|
|
|
static struct frv_unwind_cache *
|
|
frv_frame_unwind_cache (struct frame_info *next_frame,
|
|
void **this_prologue_cache)
|
|
{
|
|
struct gdbarch *gdbarch = get_frame_arch (next_frame);
|
|
CORE_ADDR pc;
|
|
ULONGEST prev_sp;
|
|
ULONGEST this_base;
|
|
struct frv_unwind_cache *info;
|
|
|
|
if ((*this_prologue_cache))
|
|
return (*this_prologue_cache);
|
|
|
|
info = FRAME_OBSTACK_ZALLOC (struct frv_unwind_cache);
|
|
(*this_prologue_cache) = info;
|
|
info->saved_regs = trad_frame_alloc_saved_regs (next_frame);
|
|
|
|
/* Prologue analysis does the rest... */
|
|
frv_analyze_prologue (frame_func_unwind (next_frame), next_frame, info);
|
|
|
|
return info;
|
|
}
|
|
|
|
static void
|
|
frv_extract_return_value (struct type *type, char *regbuf, char *valbuf)
|
|
{
|
|
memcpy (valbuf, (regbuf
|
|
+ frv_register_byte (8)
|
|
+ (TYPE_LENGTH (type) < 4 ? 4 - TYPE_LENGTH (type) : 0)),
|
|
TYPE_LENGTH (type));
|
|
}
|
|
|
|
static CORE_ADDR
|
|
frv_extract_struct_value_address (char *regbuf)
|
|
{
|
|
return extract_unsigned_integer (regbuf +
|
|
frv_register_byte (struct_return_regnum),
|
|
4);
|
|
}
|
|
|
|
static void
|
|
frv_store_struct_return (CORE_ADDR addr, CORE_ADDR sp)
|
|
{
|
|
write_register (struct_return_regnum, addr);
|
|
}
|
|
|
|
static int
|
|
frv_frameless_function_invocation (struct frame_info *frame)
|
|
{
|
|
return frameless_look_for_prologue (frame);
|
|
}
|
|
|
|
#define ROUND_UP(n,a) (((n)+(a)-1) & ~((a)-1))
|
|
#define ROUND_DOWN(n,a) ((n) & ~((a)-1))
|
|
|
|
static CORE_ADDR
|
|
frv_frame_align (struct gdbarch *gdbarch, CORE_ADDR sp)
|
|
{
|
|
/* Require dword alignment. */
|
|
return ROUND_DOWN (sp, 8);
|
|
}
|
|
|
|
static CORE_ADDR
|
|
frv_push_dummy_call (struct gdbarch *gdbarch, CORE_ADDR func_addr,
|
|
struct regcache *regcache, CORE_ADDR bp_addr,
|
|
int nargs, struct value **args, CORE_ADDR sp,
|
|
int struct_return, CORE_ADDR struct_addr)
|
|
{
|
|
int argreg;
|
|
int argnum;
|
|
char *val;
|
|
char valbuf[4];
|
|
struct value *arg;
|
|
struct type *arg_type;
|
|
int len;
|
|
enum type_code typecode;
|
|
CORE_ADDR regval;
|
|
int stack_space;
|
|
int stack_offset;
|
|
|
|
#if 0
|
|
printf("Push %d args at sp = %x, struct_return=%d (%x)\n",
|
|
nargs, (int) sp, struct_return, struct_addr);
|
|
#endif
|
|
|
|
stack_space = 0;
|
|
for (argnum = 0; argnum < nargs; ++argnum)
|
|
stack_space += ROUND_UP (TYPE_LENGTH (VALUE_TYPE (args[argnum])), 4);
|
|
|
|
stack_space -= (6 * 4);
|
|
if (stack_space > 0)
|
|
sp -= stack_space;
|
|
|
|
/* Make sure stack is dword aligned. */
|
|
sp = ROUND_DOWN (sp, 8);
|
|
|
|
stack_offset = 0;
|
|
|
|
argreg = 8;
|
|
|
|
if (struct_return)
|
|
regcache_cooked_write_unsigned (regcache, struct_return_regnum,
|
|
struct_addr);
|
|
|
|
for (argnum = 0; argnum < nargs; ++argnum)
|
|
{
|
|
arg = args[argnum];
|
|
arg_type = check_typedef (VALUE_TYPE (arg));
|
|
len = TYPE_LENGTH (arg_type);
|
|
typecode = TYPE_CODE (arg_type);
|
|
|
|
if (typecode == TYPE_CODE_STRUCT || typecode == TYPE_CODE_UNION)
|
|
{
|
|
store_unsigned_integer (valbuf, 4, VALUE_ADDRESS (arg));
|
|
typecode = TYPE_CODE_PTR;
|
|
len = 4;
|
|
val = valbuf;
|
|
}
|
|
else
|
|
{
|
|
val = (char *) VALUE_CONTENTS (arg);
|
|
}
|
|
|
|
while (len > 0)
|
|
{
|
|
int partial_len = (len < 4 ? len : 4);
|
|
|
|
if (argreg < 14)
|
|
{
|
|
regval = extract_unsigned_integer (val, partial_len);
|
|
#if 0
|
|
printf(" Argnum %d data %x -> reg %d\n",
|
|
argnum, (int) regval, argreg);
|
|
#endif
|
|
regcache_cooked_write_unsigned (regcache, argreg, regval);
|
|
++argreg;
|
|
}
|
|
else
|
|
{
|
|
#if 0
|
|
printf(" Argnum %d data %x -> offset %d (%x)\n",
|
|
argnum, *((int *)val), stack_offset, (int) (sp + stack_offset));
|
|
#endif
|
|
write_memory (sp + stack_offset, val, partial_len);
|
|
stack_offset += ROUND_UP(partial_len, 4);
|
|
}
|
|
len -= partial_len;
|
|
val += partial_len;
|
|
}
|
|
}
|
|
|
|
/* Set the return address. For the frv, the return breakpoint is
|
|
always at BP_ADDR. */
|
|
regcache_cooked_write_unsigned (regcache, lr_regnum, bp_addr);
|
|
|
|
/* Finally, update the SP register. */
|
|
regcache_cooked_write_unsigned (regcache, sp_regnum, sp);
|
|
|
|
return sp;
|
|
}
|
|
|
|
static void
|
|
frv_store_return_value (struct type *type, char *valbuf)
|
|
{
|
|
int length = TYPE_LENGTH (type);
|
|
int reg8_offset = frv_register_byte (8);
|
|
|
|
if (length <= 4)
|
|
deprecated_write_register_bytes (reg8_offset + (4 - length), valbuf,
|
|
length);
|
|
else if (length == 8)
|
|
deprecated_write_register_bytes (reg8_offset, valbuf, length);
|
|
else
|
|
internal_error (__FILE__, __LINE__,
|
|
"Don't know how to return a %d-byte value.", length);
|
|
}
|
|
|
|
|
|
/* Hardware watchpoint / breakpoint support for the FR500
|
|
and FR400. */
|
|
|
|
int
|
|
frv_check_watch_resources (int type, int cnt, int ot)
|
|
{
|
|
struct gdbarch_tdep *var = CURRENT_VARIANT;
|
|
|
|
/* Watchpoints not supported on simulator. */
|
|
if (strcmp (target_shortname, "sim") == 0)
|
|
return 0;
|
|
|
|
if (type == bp_hardware_breakpoint)
|
|
{
|
|
if (var->num_hw_breakpoints == 0)
|
|
return 0;
|
|
else if (cnt <= var->num_hw_breakpoints)
|
|
return 1;
|
|
}
|
|
else
|
|
{
|
|
if (var->num_hw_watchpoints == 0)
|
|
return 0;
|
|
else if (ot)
|
|
return -1;
|
|
else if (cnt <= var->num_hw_watchpoints)
|
|
return 1;
|
|
}
|
|
return -1;
|
|
}
|
|
|
|
|
|
CORE_ADDR
|
|
frv_stopped_data_address (void)
|
|
{
|
|
CORE_ADDR brr, dbar0, dbar1, dbar2, dbar3;
|
|
|
|
brr = read_register (brr_regnum);
|
|
dbar0 = read_register (dbar0_regnum);
|
|
dbar1 = read_register (dbar1_regnum);
|
|
dbar2 = read_register (dbar2_regnum);
|
|
dbar3 = read_register (dbar3_regnum);
|
|
|
|
if (brr & (1<<11))
|
|
return dbar0;
|
|
else if (brr & (1<<10))
|
|
return dbar1;
|
|
else if (brr & (1<<9))
|
|
return dbar2;
|
|
else if (brr & (1<<8))
|
|
return dbar3;
|
|
else
|
|
return 0;
|
|
}
|
|
|
|
static CORE_ADDR
|
|
frv_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame)
|
|
{
|
|
return frame_unwind_register_unsigned (next_frame, pc_regnum);
|
|
}
|
|
|
|
/* Given a GDB frame, determine the address of the calling function's
|
|
frame. This will be used to create a new GDB frame struct. */
|
|
|
|
static void
|
|
frv_frame_this_id (struct frame_info *next_frame,
|
|
void **this_prologue_cache, struct frame_id *this_id)
|
|
{
|
|
struct frv_unwind_cache *info
|
|
= frv_frame_unwind_cache (next_frame, this_prologue_cache);
|
|
CORE_ADDR base;
|
|
CORE_ADDR func;
|
|
struct minimal_symbol *msym_stack;
|
|
struct frame_id id;
|
|
|
|
/* The FUNC is easy. */
|
|
func = frame_func_unwind (next_frame);
|
|
|
|
/* This is meant to halt the backtrace at "_start". Make sure we
|
|
don't halt it at a generic dummy frame. */
|
|
if (inside_entry_file (func))
|
|
return;
|
|
|
|
/* Check if the stack is empty. */
|
|
msym_stack = lookup_minimal_symbol ("_stack", NULL, NULL);
|
|
if (msym_stack && info->base == SYMBOL_VALUE_ADDRESS (msym_stack))
|
|
return;
|
|
|
|
/* Hopefully the prologue analysis either correctly determined the
|
|
frame's base (which is the SP from the previous frame), or set
|
|
that base to "NULL". */
|
|
base = info->prev_sp;
|
|
if (base == 0)
|
|
return;
|
|
|
|
id = frame_id_build (base, func);
|
|
|
|
/* Check that we're not going round in circles with the same frame
|
|
ID (but avoid applying the test to sentinel frames which do go
|
|
round in circles). Can't use frame_id_eq() as that doesn't yet
|
|
compare the frame's PC value. */
|
|
if (frame_relative_level (next_frame) >= 0
|
|
&& get_frame_type (next_frame) != DUMMY_FRAME
|
|
&& frame_id_eq (get_frame_id (next_frame), id))
|
|
return;
|
|
|
|
(*this_id) = id;
|
|
}
|
|
|
|
static void
|
|
frv_frame_prev_register (struct frame_info *next_frame,
|
|
void **this_prologue_cache,
|
|
int regnum, int *optimizedp,
|
|
enum lval_type *lvalp, CORE_ADDR *addrp,
|
|
int *realnump, void *bufferp)
|
|
{
|
|
struct frv_unwind_cache *info
|
|
= frv_frame_unwind_cache (next_frame, this_prologue_cache);
|
|
trad_frame_prev_register (next_frame, info->saved_regs, regnum,
|
|
optimizedp, lvalp, addrp, realnump, bufferp);
|
|
}
|
|
|
|
static const struct frame_unwind frv_frame_unwind = {
|
|
NORMAL_FRAME,
|
|
frv_frame_this_id,
|
|
frv_frame_prev_register
|
|
};
|
|
|
|
static const struct frame_unwind *
|
|
frv_frame_sniffer (struct frame_info *next_frame)
|
|
{
|
|
return &frv_frame_unwind;
|
|
}
|
|
|
|
static CORE_ADDR
|
|
frv_frame_base_address (struct frame_info *next_frame, void **this_cache)
|
|
{
|
|
struct frv_unwind_cache *info
|
|
= frv_frame_unwind_cache (next_frame, this_cache);
|
|
return info->base;
|
|
}
|
|
|
|
static const struct frame_base frv_frame_base = {
|
|
&frv_frame_unwind,
|
|
frv_frame_base_address,
|
|
frv_frame_base_address,
|
|
frv_frame_base_address
|
|
};
|
|
|
|
static CORE_ADDR
|
|
frv_unwind_sp (struct gdbarch *gdbarch, struct frame_info *next_frame)
|
|
{
|
|
return frame_unwind_register_unsigned (next_frame, sp_regnum);
|
|
}
|
|
|
|
|
|
/* Assuming NEXT_FRAME->prev is a dummy, return the frame ID of that
|
|
dummy frame. The frame ID's base needs to match the TOS value
|
|
saved by save_dummy_frame_tos(), and the PC match the dummy frame's
|
|
breakpoint. */
|
|
|
|
static struct frame_id
|
|
frv_unwind_dummy_id (struct gdbarch *gdbarch, struct frame_info *next_frame)
|
|
{
|
|
return frame_id_build (frv_unwind_sp (gdbarch, next_frame),
|
|
frame_pc_unwind (next_frame));
|
|
}
|
|
|
|
|
|
static struct gdbarch *
|
|
frv_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
|
|
{
|
|
struct gdbarch *gdbarch;
|
|
struct gdbarch_tdep *var;
|
|
|
|
/* Check to see if we've already built an appropriate architecture
|
|
object for this executable. */
|
|
arches = gdbarch_list_lookup_by_info (arches, &info);
|
|
if (arches)
|
|
return arches->gdbarch;
|
|
|
|
/* Select the right tdep structure for this variant. */
|
|
var = new_variant ();
|
|
switch (info.bfd_arch_info->mach)
|
|
{
|
|
case bfd_mach_frv:
|
|
case bfd_mach_frvsimple:
|
|
case bfd_mach_fr500:
|
|
case bfd_mach_frvtomcat:
|
|
set_variant_num_gprs (var, 64);
|
|
set_variant_num_fprs (var, 64);
|
|
break;
|
|
|
|
case bfd_mach_fr400:
|
|
set_variant_num_gprs (var, 32);
|
|
set_variant_num_fprs (var, 32);
|
|
break;
|
|
|
|
default:
|
|
/* Never heard of this variant. */
|
|
return 0;
|
|
}
|
|
|
|
gdbarch = gdbarch_alloc (&info, var);
|
|
|
|
set_gdbarch_short_bit (gdbarch, 16);
|
|
set_gdbarch_int_bit (gdbarch, 32);
|
|
set_gdbarch_long_bit (gdbarch, 32);
|
|
set_gdbarch_long_long_bit (gdbarch, 64);
|
|
set_gdbarch_float_bit (gdbarch, 32);
|
|
set_gdbarch_double_bit (gdbarch, 64);
|
|
set_gdbarch_long_double_bit (gdbarch, 64);
|
|
set_gdbarch_ptr_bit (gdbarch, 32);
|
|
|
|
set_gdbarch_num_regs (gdbarch, frv_num_regs);
|
|
set_gdbarch_sp_regnum (gdbarch, sp_regnum);
|
|
set_gdbarch_deprecated_fp_regnum (gdbarch, fp_regnum);
|
|
set_gdbarch_pc_regnum (gdbarch, pc_regnum);
|
|
|
|
set_gdbarch_register_name (gdbarch, frv_register_name);
|
|
set_gdbarch_deprecated_register_size (gdbarch, 4);
|
|
set_gdbarch_deprecated_register_bytes (gdbarch, frv_num_regs * 4);
|
|
set_gdbarch_deprecated_register_byte (gdbarch, frv_register_byte);
|
|
set_gdbarch_deprecated_register_raw_size (gdbarch, frv_register_raw_size);
|
|
set_gdbarch_deprecated_max_register_raw_size (gdbarch, 4);
|
|
set_gdbarch_deprecated_register_virtual_size (gdbarch, frv_register_virtual_size);
|
|
set_gdbarch_deprecated_max_register_virtual_size (gdbarch, 4);
|
|
set_gdbarch_deprecated_register_virtual_type (gdbarch, frv_register_virtual_type);
|
|
|
|
set_gdbarch_skip_prologue (gdbarch, frv_skip_prologue);
|
|
set_gdbarch_breakpoint_from_pc (gdbarch, frv_breakpoint_from_pc);
|
|
|
|
set_gdbarch_frame_args_skip (gdbarch, 0);
|
|
set_gdbarch_frameless_function_invocation (gdbarch, frv_frameless_function_invocation);
|
|
|
|
set_gdbarch_use_struct_convention (gdbarch, always_use_struct_convention);
|
|
set_gdbarch_deprecated_extract_return_value (gdbarch, frv_extract_return_value);
|
|
|
|
set_gdbarch_deprecated_store_struct_return (gdbarch, frv_store_struct_return);
|
|
set_gdbarch_deprecated_store_return_value (gdbarch, frv_store_return_value);
|
|
set_gdbarch_deprecated_extract_struct_value_address (gdbarch, frv_extract_struct_value_address);
|
|
|
|
/* Frame stuff. */
|
|
set_gdbarch_unwind_pc (gdbarch, frv_unwind_pc);
|
|
set_gdbarch_unwind_sp (gdbarch, frv_unwind_sp);
|
|
set_gdbarch_frame_align (gdbarch, frv_frame_align);
|
|
frame_unwind_append_sniffer (gdbarch, frv_frame_sniffer);
|
|
frame_base_set_default (gdbarch, &frv_frame_base);
|
|
|
|
/* Settings for calling functions in the inferior. */
|
|
set_gdbarch_push_dummy_call (gdbarch, frv_push_dummy_call);
|
|
set_gdbarch_unwind_dummy_id (gdbarch, frv_unwind_dummy_id);
|
|
|
|
/* Settings that should be unnecessary. */
|
|
set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
|
|
|
|
set_gdbarch_write_pc (gdbarch, generic_target_write_pc);
|
|
|
|
set_gdbarch_decr_pc_after_break (gdbarch, 0);
|
|
set_gdbarch_function_start_offset (gdbarch, 0);
|
|
|
|
set_gdbarch_remote_translate_xfer_address
|
|
(gdbarch, generic_remote_translate_xfer_address);
|
|
|
|
/* Hardware watchpoint / breakpoint support. */
|
|
switch (info.bfd_arch_info->mach)
|
|
{
|
|
case bfd_mach_frv:
|
|
case bfd_mach_frvsimple:
|
|
case bfd_mach_fr500:
|
|
case bfd_mach_frvtomcat:
|
|
/* fr500-style hardware debugging support. */
|
|
var->num_hw_watchpoints = 4;
|
|
var->num_hw_breakpoints = 4;
|
|
break;
|
|
|
|
case bfd_mach_fr400:
|
|
/* fr400-style hardware debugging support. */
|
|
var->num_hw_watchpoints = 2;
|
|
var->num_hw_breakpoints = 4;
|
|
break;
|
|
|
|
default:
|
|
/* Otherwise, assume we don't have hardware debugging support. */
|
|
var->num_hw_watchpoints = 0;
|
|
var->num_hw_breakpoints = 0;
|
|
break;
|
|
}
|
|
|
|
set_gdbarch_print_insn (gdbarch, print_insn_frv);
|
|
|
|
return gdbarch;
|
|
}
|
|
|
|
void
|
|
_initialize_frv_tdep (void)
|
|
{
|
|
register_gdbarch_init (bfd_arch_frv, frv_gdbarch_init);
|
|
}
|