fdd12ef3c6
* ppc-dis.c (print_insn_powerpc): Don't print tabs. Handle PPC_OPERANDS_GPR_0. * ppc-opc.c (RA0): Define. (RAQ, RAL, RAM, RAS, RSQ, RTQ, RSO): Use PPC_OPERAND_GPR_0. (RAOPT): Rename from RAO. Update all uses. (powerpc_opcodes): Use RA0 as appropriate. Add "lsdx", "lsdi", "stsdx", "stsdi", "lmd" and "stmd" insns. include/opcode/ * ppc.h (PPC_OPERAND_GPR_0): Define. Bump other operand defines. gas/testsuite/ Update gas/ppc/. ld/testsuite/ Update ld-powerpc/.
49 lines
1.4 KiB
Makefile
49 lines
1.4 KiB
Makefile
#source: tls32.s
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#as: -a32
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#ld: -shared -melf32ppc
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#objdump: -dr
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#target: powerpc*-*-*
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.*: +file format elf32-powerpc
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Disassembly of section \.text:
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0+538 <_start>:
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538: 38 7f 00 1c addi r3,r31,28
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53c: 48 00 00 01 bl 53c .*
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540: 38 7f 00 0c addi r3,r31,12
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544: 48 00 00 01 bl 544 .*
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548: 38 7f 00 24 addi r3,r31,36
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54c: 48 01 01 95 bl 106e0 .*
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550: 38 7f 00 0c addi r3,r31,12
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554: 48 01 01 8d bl 106e0 .*
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558: 39 23 80 20 addi r9,r3,-32736
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55c: 3d 23 00 00 addis r9,r3,0
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560: 81 49 80 24 lwz r10,-32732\(r9\)
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564: 81 3f 00 2c lwz r9,44\(r31\)
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568: 7d 49 12 2e lhzx r10,r9,r2
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56c: 89 42 00 00 lbz r10,0\(r2\)
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570: 3d 22 00 00 addis r9,r2,0
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574: 99 49 00 00 stb r10,0\(r9\)
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578: 38 7e 00 14 addi r3,r30,20
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57c: 48 00 00 01 bl 57c .*
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580: 38 7e 00 0c addi r3,r30,12
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584: 48 00 00 01 bl 584 .*
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588: 91 43 80 04 stw r10,-32764\(r3\)
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58c: 3d 23 00 00 addis r9,r3,0
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590: 91 49 80 08 stw r10,-32760\(r9\)
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594: 81 3e 00 2c lwz r9,44\(r30\)
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598: 7d 49 13 2e sthx r10,r9,r2
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59c: a1 42 00 00 lhz r10,0\(r2\)
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5a0: 3d 22 00 00 addis r9,r2,0
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5a4: a9 49 00 00 lha r10,0\(r9\)
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Disassembly of section \.got:
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00010664 <\.got>:
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10664: 4e 80 00 21 blrl
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10668: 00 01 05 c4 \.long 0x105c4
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\.\.\.
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Disassembly of section \.plt:
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00010698 <\.plt>:
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\.\.\.
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