f1ce6af4fe
* config/tc-tic80.c: Many additions to previous placeholder file.
* config/tc-tic80.h: Ditto.
649 lines
15 KiB
C
649 lines
15 KiB
C
/* tc-tic80.c -- Assemble for the TI TMS320C80 (MV)
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Copyright (C) 1996 Free Software Foundation, Inc.
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This file is part of GAS, the GNU Assembler.
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GAS is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2, or (at your option)
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any later version.
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GAS is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with GAS; see the file COPYING. If not, write to the Free
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Software Foundation, 59 Temple Place - Suite 330, Boston, MA
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02111-1307, USA. */
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#include "as.h"
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#include "opcode/tic80.h"
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/* Generic assembler global variables which must be defined by all targets. */
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/* Characters which always start a comment. */
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const char comment_chars[] = ";";
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/* Characters which start a comment at the beginning of a line. */
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const char line_comment_chars[] = ";*";
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/* Characters which may be used to separate multiple commands on a
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single line. */
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const char line_separator_chars[] = ";";
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/* Characters which are used to indicate an exponent in a floating
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point number. */
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const char EXP_CHARS[] = "eE";
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/* Characters which mean that a number is a floating point constant,
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as in 0d1.0. */
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const char FLT_CHARS[] = "dD";
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/* This table describes all the machine specific pseudo-ops the assembler
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has to support. The fields are:
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pseudo-op name without dot
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function to call to execute this pseudo-op
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Integer arg to pass to the function
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*/
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const pseudo_typeS md_pseudo_table[] =
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{
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{"word", cons, 4},
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{ NULL, NULL, 0 }
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};
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/* Opcode hash table. */
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static struct hash_control *tic80_hash;
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static struct tic80_opcode * find_opcode PARAMS ((struct tic80_opcode *, expressionS []));
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static unsigned long build_insn PARAMS ((struct tic80_opcode *, expressionS *, unsigned long insn));
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static int get_operands PARAMS ((expressionS exp[]));
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static int reg_name_search PARAMS ((char *name));
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static int register_name PARAMS ((expressionS *expressionP));
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int
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md_estimate_size_before_relax (fragP, segment_type)
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fragS *fragP;
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segT segment_type;
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{
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as_fatal ("Relaxation is a luxury we can't afford\n");
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return (-1);
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}
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/* We have no need to default values of symbols. */
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/* ARGSUSED */
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symbolS *
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md_undefined_symbol (name)
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char *name;
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{
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return 0;
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}
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/* Turn a string in input_line_pointer into a floating point constant of type
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type, and store the appropriate bytes in *litP. The number of LITTLENUMS
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emitted is stored in *sizeP . An error message is returned, or NULL on OK.
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*/
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#define MAX_LITTLENUMS 4
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char *
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md_atof (type, litP, sizeP)
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int type;
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char *litP;
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int *sizeP;
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{
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int prec;
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LITTLENUM_TYPE words[MAX_LITTLENUMS];
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LITTLENUM_TYPE *wordP;
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char *t;
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char *atof_ieee ();
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switch (type)
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{
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case 'f':
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case 'F':
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case 's':
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case 'S':
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prec = 2;
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break;
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case 'd':
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case 'D':
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case 'r':
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case 'R':
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prec = 4;
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break;
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default:
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*sizeP = 0;
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return "bad call to md_atof ()";
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}
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t = atof_ieee (input_line_pointer, type, words);
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if (t)
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{
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input_line_pointer = t;
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}
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*sizeP = prec * sizeof (LITTLENUM_TYPE);
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for (wordP = words; prec--;)
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{
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md_number_to_chars (litP, (valueT) (*wordP++), sizeof (LITTLENUM_TYPE));
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litP += sizeof (LITTLENUM_TYPE);
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}
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return (NULL);
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}
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/* reg_name_search does a binary search of the tic80_pre_defined_registers
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array to see if "name" is a valid regiter name. Returns the register
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number from the array on success, or -1 on failure. */
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static int
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reg_name_search (name)
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char *name;
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{
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int middle, low, high;
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int cmp;
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low = 0;
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high = tic80_num_regs - 1;
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do
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{
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middle = (low + high) / 2;
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cmp = strcasecmp (name, tic80_pre_defined_registers[middle].name);
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if (cmp < 0)
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{
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high = middle - 1;
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}
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else if (cmp > 0)
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{
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low = middle + 1;
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}
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else
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{
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return (tic80_pre_defined_registers[middle].value);
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}
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}
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while (low <= high);
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return (-1);
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}
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/* register_name() checks the string at input_line_pointer
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to see if it is a valid register name */
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static int
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register_name (expressionP)
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expressionS *expressionP;
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{
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int reg_number;
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char c;
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char *p = input_line_pointer;
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while (*p != '\000' && *p != '\n' && *p != '\r' && *p != ',' && *p != ' ' && *p != ')')
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p++;
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c = *p;
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if (c)
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{
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*p++ = '\000';
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}
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/* look to see if it's in the register table */
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reg_number = reg_name_search (input_line_pointer);
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if (reg_number >= 0)
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{
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expressionP -> X_op = O_register;
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/* temporarily store a pointer to the string here */
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expressionP -> X_op_symbol = (struct symbol *) input_line_pointer;
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expressionP -> X_add_number = reg_number;
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input_line_pointer = p;
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return (1);
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}
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if (c)
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{
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*(p - 1) = c;
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}
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return (0);
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}
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/* get_operands() parses a string of operands and fills in a passed array of
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expressions in EXP.
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Note that we use O_absent expressions to record additional information
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about the previous non-O_absent expression, such as ":m" or ":s"
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modifiers or register numbers enclosed in parens like "(r10)".
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Returns the number of expressions that were placed in EXP.
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*/
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static int
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get_operands (exp)
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expressionS exp[];
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{
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char *p = input_line_pointer;
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int numexp = 0;
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int mflag = 0;
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int sflag = 0;
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int parens = 0;
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while (*p)
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{
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/* Skip leading whitespace */
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while (*p == ' ' || *p == '\t' || *p == ',')
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{
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p++;
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}
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/* Check to see if we have any operands left to parse */
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if (*p == 0 || *p == '\n' || *p == '\r')
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{
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break;
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}
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/* Notice scaling or direct memory operand modifiers and save them in
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an O_absent expression after the expression that they modify. */
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if (*p == ':')
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{
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p++;
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exp[numexp].X_op = O_absent;
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if (*p == 'm')
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{
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p++;
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exp[numexp].X_add_number = TIC80_OPERAND_M_SI | TIC80_OPERAND_M_LI;
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}
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else if (*p == 's')
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{
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p++;
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exp[numexp].X_add_number = TIC80_OPERAND_SCALED;
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}
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else
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{
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as_bad ("':' not followed by 'm' or 's'");
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}
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numexp++;
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continue;
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}
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/* Handle leading '(' on operands that use them, by recording that we
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have entered a paren nesting level and then continuing. We complain
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about multiple nesting. */
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if (*p == '(')
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{
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if (++parens != 1)
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{
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as_bad ("paren nesting");
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}
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p++;
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continue;
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}
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/* Handle trailing ')' on operands that use them, by reducing the
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nesting level and then continuing. We complain if there were too
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many closures. */
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if (*p == ')')
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{
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/* Record that we have left a paren group and continue */
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if (--parens < 0)
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{
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as_bad ("mismatched parenthesis");
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}
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p++;
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continue;
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}
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/* Begin operand parsing at the current scan point. */
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input_line_pointer = p;
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/* Check to see if it might be a register name */
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if (!register_name (&exp[numexp]))
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{
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/* parse as an expression */
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expression (&exp[numexp]);
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}
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if (exp[numexp].X_op == O_illegal)
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{
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as_bad ("illegal operand");
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}
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else if (exp[numexp].X_op == O_absent)
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{
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as_bad ("missing operand");
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}
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numexp++;
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p = input_line_pointer;
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}
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if (parens)
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{
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exp[numexp].X_op = O_absent;
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exp[numexp++].X_add_number = TIC80_OPERAND_PARENS;
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}
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exp[numexp].X_op = 0;
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return (numexp);
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}
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/* find_opcode() gets a pointer to the entry in the opcode table that
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matches the instruction being assembled, or returns NULL if no such match
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is found.
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First it parses all the operands and save them as expressions. Note that
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we use O_absent expressions to record additional information about the
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previous non-O_absent expression, such as ":m" or ":s" modifiers or
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register numbers enclosed in parens like "(r10)".
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It then looks at all opcodes with the same name and use the operands to
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choose the correct opcode. */
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static struct tic80_opcode *
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find_opcode (opcode, myops)
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struct tic80_opcode *opcode;
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expressionS myops[];
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{
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int i, match, done, numops;
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struct tic80_opcode *next_opcode;
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match = 0;
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/* First parse all the operands so we only have to do it once. */
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get_operands (myops);
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/* Now search the opcode table table for one with operands that
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matches what we've got. */
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while (!match)
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{
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match = 1;
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for (i = 0; opcode -> operands[i]; i++)
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{
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int flags = tic80_operands[opcode->operands[i]].flags;
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int X_op = myops[i].X_op;
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int num = myops[i].X_add_number;
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if (X_op == 0)
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{
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match = 0;
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break;
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}
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if (flags & TIC80_OPERAND_GPR)
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{
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if ((X_op != O_register) ||
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((flags & OPERAND_ACC) != (num & OPERAND_ACC)) ||
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((flags & OPERAND_FLAG) != (num & OPERAND_FLAG)) ||
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((flags & OPERAND_CONTROL) != (num & OPERAND_CONTROL)))
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{
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match=0;
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break;
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}
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}
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if (((flags & OPERAND_MINUS) && ((X_op != O_absent) || (num != OPERAND_MINUS))) ||
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((flags & OPERAND_PLUS) && ((X_op != O_absent) || (num != OPERAND_PLUS))) ||
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((flags & OPERAND_ATMINUS) && ((X_op != O_absent) || (num != OPERAND_ATMINUS))) ||
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((flags & OPERAND_ATPAR) && ((X_op != O_absent) || (num != OPERAND_ATPAR))) ||
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((flags & OPERAND_ATSIGN) && ((X_op != O_absent) || (num != OPERAND_ATSIGN))))
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{
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match=0;
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break;
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}
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}
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/* we're only done if the operands matched so far AND there
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are no more to check */
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if (match && myops[i].X_op==0)
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break;
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else
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match = 0;
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next_opcode = opcode+1;
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if (next_opcode->opcode == 0)
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break;
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if (strcmp(next_opcode->name, opcode->name))
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break;
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opcode = next_opcode;
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}
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if (!match)
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{
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as_bad ("bad opcode or operands");
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return (0);
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}
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/* Check that all registers that are required to be even are. */
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/* Also, if any operands were marked as registers, but were really symbols */
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/* fix that here. */
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for (i=0; opcode->operands[i]; i++)
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{
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if ((tic80_operands[opcode->operands[i]].flags & OPERAND_EVEN) &&
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(myops[i].X_add_number & 1))
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as_fatal("Register number must be EVEN");
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if (myops[i].X_op == O_register)
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{
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if (!(tic80_operands[opcode->operands[i]].flags & OPERAND_REG))
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{
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myops[i].X_op = O_symbol;
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myops[i].X_add_symbol = symbol_find_or_make ((char *)myops[i].X_op_symbol);
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myops[i].X_add_number = 0;
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myops[i].X_op_symbol = NULL;
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}
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}
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}
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return opcode;
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}
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/* build_insn takes a pointer to the opcode entry in the opcode table
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and the array of operand expressions and returns the instruction */
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static unsigned long
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build_insn (opcode, opers, insn)
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struct tic80_opcode *opcode;
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expressionS *opers;
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unsigned long insn;
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{
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return (0);
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}
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/* This is the main entry point for the machine-dependent assembler. STR points to a
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machine dependent instruction. This function is supposed to emit the frags/bytes
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it assembles to.
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*/
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void
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md_assemble (str)
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char *str;
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{
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char *scan;
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unsigned char *input_line_save;
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struct tic80_opcode *opcode;
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expressionS myops[6];
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unsigned long insn;
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/* Ensure there is something there to assemble. */
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assert (str);
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/* Drop any leading whitespace. */
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while (isspace (*str))
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{
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str++;
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}
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/* Isolate the mnemonic from the rest of the string by finding the first
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whitespace character and zapping it to a null byte. */
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for (scan = str; *scan != '\000' && !isspace (*scan); scan++) {;}
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if (*scan != '\000')
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{
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*scan++ = '\000';
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}
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/* Try to find this mnemonic in the hash table */
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if ((opcode = (struct tic80_opcode *) hash_find (tic80_hash, str)) == NULL)
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{
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as_bad ("Invalid mnemonic: '%s'", str);
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return;
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}
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str = scan;
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while (isspace (*scan))
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{
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scan++;
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}
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input_line_save = input_line_pointer;
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input_line_pointer = str;
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opcode = find_opcode (opcode, myops);
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if (opcode == NULL)
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{
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return;
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}
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input_line_pointer = input_line_save;
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insn = build_insn (opcode, myops, 0);
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/* FIXME - finish this */
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}
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/* This function is called once, at assembler startup time. It should
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set up all the tables, etc., that the MD part of the assembler will
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need. */
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void
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md_begin ()
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{
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char *prev_name = "";
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register const struct tic80_opcode *op;
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register const struct tic80_opcode *op_end;
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tic80_hash = hash_new();
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/* Insert unique names into hash table. The TIc80 instruction set
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has many identical opcode names that have different opcodes based
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on the operands. This hash table then provides a quick index to
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the first opcode with a particular name in the opcode table. */
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op_end = tic80_opcodes + tic80_num_opcodes;
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for (op = tic80_opcodes; op < op_end; op++)
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{
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if (strcmp (prev_name, op -> name) != 0)
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{
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prev_name = (char *) op -> name;
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hash_insert (tic80_hash, op -> name, (char *) op);
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}
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}
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}
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CONST char *md_shortopts = "";
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struct option md_longopts[] = {
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{NULL, no_argument, NULL, 0}
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};
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size_t md_longopts_size = sizeof(md_longopts);
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/* Take care of the target-specific command-line options. */
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int
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md_parse_option (c, arg)
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int c;
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char *arg;
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{
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return (0);
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}
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|
||
/* Print a description of the command-line options that we accept. */
|
||
|
||
void
|
||
md_show_usage (stream)
|
||
FILE *stream;
|
||
{
|
||
}
|
||
|
||
|
||
/* Attempt to simplify or even eliminate a fixup. The return value is
|
||
ignored; perhaps it was once meaningful, but now it is historical.
|
||
To indicate that a fixup has been eliminated, set fixP->fx_done.
|
||
*/
|
||
|
||
void
|
||
md_apply_fix (fixP, val)
|
||
fixS *fixP;
|
||
long val;
|
||
{
|
||
as_fatal ("md_apply_fix() not implemented yet\n");
|
||
abort ();
|
||
}
|
||
|
||
|
||
/* Functions concerning relocs. */
|
||
|
||
/* The location from which a PC relative jump should be calculated,
|
||
given a PC relative reloc. */
|
||
|
||
long
|
||
md_pcrel_from (fixP)
|
||
fixS *fixP;
|
||
{
|
||
as_fatal ("md_pcrel_from() not implemented yet\n");
|
||
abort ();
|
||
}
|
||
|
||
/*
|
||
* Called after relax() is finished.
|
||
* In: Address of frag.
|
||
* fr_type == rs_machine_dependent.
|
||
* fr_subtype is what the address relaxed to.
|
||
*
|
||
* Out: Any fixSs and constants are set up.
|
||
* Caller will turn frag into a ".space 0".
|
||
*/
|
||
|
||
void
|
||
md_convert_frag (headers, seg, fragP)
|
||
object_headers *headers;
|
||
segT seg;
|
||
fragS *fragP;
|
||
{
|
||
as_fatal ("md_convert_frag() not implemented yet\n");
|
||
abort ();
|
||
}
|
||
|
||
|
||
/*ARGSUSED*/
|
||
void
|
||
tc_coff_symbol_emit_hook (ignore)
|
||
symbolS *ignore;
|
||
{
|
||
}
|
||
|
||
#if defined OBJ_COFF
|
||
|
||
short
|
||
tc_coff_fix2rtype (fixP)
|
||
fixS *fixP;
|
||
{
|
||
as_fatal ("tc_coff_fix2rtype() not implemented yet\n");
|
||
abort ();
|
||
}
|
||
|
||
#endif /* OBJ_COFF */
|
||
|
||
/* end of tc-tic80.c */
|