487 lines
19 KiB
Text
487 lines
19 KiB
Text
@c Copyright (C) 1991, 92, 93, 94, 95, 97, 1998 Free Software Foundation, Inc.
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@c This is part of the GAS manual.
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@c For copying conditions, see the file as.texinfo.
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@ifset GENERIC
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@page
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@node i386-Dependent
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@chapter 80386 Dependent Features
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@end ifset
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@ifclear GENERIC
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@node Machine Dependencies
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@chapter 80386 Dependent Features
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@end ifclear
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@cindex i386 support
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@cindex i80306 support
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@menu
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* i386-Options:: Options
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* i386-Syntax:: AT&T Syntax versus Intel Syntax
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* i386-Opcodes:: Opcode Naming
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* i386-Regs:: Register Naming
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* i386-prefixes:: Opcode Prefixes
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* i386-Memory:: Memory References
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* i386-jumps:: Handling of Jump Instructions
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* i386-Float:: Floating Point
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* i386-16bit:: Writing 16-bit Code
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* i386-Bugs:: AT&T Syntax bugs
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* i386-Notes:: Notes
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@end menu
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@node i386-Options
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@section Options
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@cindex options for i386 (none)
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@cindex i386 options (none)
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The 80386 has no machine dependent options.
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@node i386-Syntax
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@section AT&T Syntax versus Intel Syntax
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@cindex i386 syntax compatibility
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@cindex syntax compatibility, i386
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In order to maintain compatibility with the output of @code{@value{GCC}},
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@code{@value{AS}} supports AT&T System V/386 assembler syntax. This is quite
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different from Intel syntax. We mention these differences because
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almost all 80386 documents use Intel syntax. Notable differences
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between the two syntaxes are:
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@cindex immediate operands, i386
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@cindex i386 immediate operands
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@cindex register operands, i386
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@cindex i386 register operands
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@cindex jump/call operands, i386
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@cindex i386 jump/call operands
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@cindex operand delimiters, i386
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@itemize @bullet
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@item
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AT&T immediate operands are preceded by @samp{$}; Intel immediate
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operands are undelimited (Intel @samp{push 4} is AT&T @samp{pushl $4}).
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AT&T register operands are preceded by @samp{%}; Intel register operands
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are undelimited. AT&T absolute (as opposed to PC relative) jump/call
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operands are prefixed by @samp{*}; they are undelimited in Intel syntax.
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@cindex i386 source, destination operands
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@cindex source, destination operands; i386
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@item
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AT&T and Intel syntax use the opposite order for source and destination
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operands. Intel @samp{add eax, 4} is @samp{addl $4, %eax}. The
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@samp{source, dest} convention is maintained for compatibility with
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previous Unix assemblers. Note that instructions with more than one
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source operand, such as the @samp{enter} instruction, do @emph{not} have
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reversed order. @ref{i386-Bugs}.
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@cindex opcode suffixes, i386
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@cindex sizes operands, i386
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@cindex i386 size suffixes
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@item
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In AT&T syntax the size of memory operands is determined from the last
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character of the opcode name. Opcode suffixes of @samp{b}, @samp{w},
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and @samp{l} specify byte (8-bit), word (16-bit), and long (32-bit)
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memory references. Intel syntax accomplishes this by prefixing memory
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operands (@emph{not} the opcodes themselves) with @samp{byte ptr},
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@samp{word ptr}, and @samp{dword ptr}. Thus, Intel @samp{mov al, byte
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ptr @var{foo}} is @samp{movb @var{foo}, %al} in AT&T syntax.
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@cindex return instructions, i386
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@cindex i386 jump, call, return
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@item
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Immediate form long jumps and calls are
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@samp{lcall/ljmp $@var{section}, $@var{offset}} in AT&T syntax; the
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Intel syntax is
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@samp{call/jmp far @var{section}:@var{offset}}. Also, the far return
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instruction
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is @samp{lret $@var{stack-adjust}} in AT&T syntax; Intel syntax is
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@samp{ret far @var{stack-adjust}}.
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@cindex sections, i386
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@cindex i386 sections
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@item
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The AT&T assembler does not provide support for multiple section
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programs. Unix style systems expect all programs to be single sections.
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@end itemize
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@node i386-Opcodes
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@section Opcode Naming
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@cindex i386 opcode naming
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@cindex opcode naming, i386
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Opcode names are suffixed with one character modifiers which specify the
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size of operands. The letters @samp{b}, @samp{w}, and @samp{l} specify
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byte, word, and long operands. If no suffix is specified by an
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instruction then @code{@value{AS}} tries to
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fill in the missing suffix based on the destination register operand
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(the last one by convention). Thus, @samp{mov %ax, %bx} is equivalent
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to @samp{movw %ax, %bx}; also, @samp{mov $1, %bx} is equivalent to
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@samp{movw $1, %bx}. Note that this is incompatible with the AT&T Unix
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assembler which assumes that a missing opcode suffix implies long
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operand size. (This incompatibility does not affect compiler output
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since compilers always explicitly specify the opcode suffix.)
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Almost all opcodes have the same names in AT&T and Intel format. There
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are a few exceptions. The sign extend and zero extend instructions need
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two sizes to specify them. They need a size to sign/zero extend
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@emph{from} and a size to zero extend @emph{to}. This is accomplished
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by using two opcode suffixes in AT&T syntax. Base names for sign extend
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and zero extend are @samp{movs@dots{}} and @samp{movz@dots{}} in AT&T
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syntax (@samp{movsx} and @samp{movzx} in Intel syntax). The opcode
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suffixes are tacked on to this base name, the @emph{from} suffix before
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the @emph{to} suffix. Thus, @samp{movsbl %al, %edx} is AT&T syntax for
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``move sign extend @emph{from} %al @emph{to} %edx.'' Possible suffixes,
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thus, are @samp{bl} (from byte to long), @samp{bw} (from byte to word),
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and @samp{wl} (from word to long).
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@cindex conversion instructions, i386
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@cindex i386 conversion instructions
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The Intel-syntax conversion instructions
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@itemize @bullet
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@item
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@samp{cbw} --- sign-extend byte in @samp{%al} to word in @samp{%ax},
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@item
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@samp{cwde} --- sign-extend word in @samp{%ax} to long in @samp{%eax},
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@item
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@samp{cwd} --- sign-extend word in @samp{%ax} to long in @samp{%dx:%ax},
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@item
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@samp{cdq} --- sign-extend dword in @samp{%eax} to quad in @samp{%edx:%eax},
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@end itemize
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@noindent
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are called @samp{cbtw}, @samp{cwtl}, @samp{cwtd}, and @samp{cltd} in
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AT&T naming. @code{@value{AS}} accepts either naming for these instructions.
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@cindex jump instructions, i386
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@cindex call instructions, i386
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Far call/jump instructions are @samp{lcall} and @samp{ljmp} in
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AT&T syntax, but are @samp{call far} and @samp{jump far} in Intel
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convention.
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@node i386-Regs
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@section Register Naming
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@cindex i386 registers
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@cindex registers, i386
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Register operands are always prefixed with @samp{%}. The 80386 registers
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consist of
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@itemize @bullet
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@item
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the 8 32-bit registers @samp{%eax} (the accumulator), @samp{%ebx},
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@samp{%ecx}, @samp{%edx}, @samp{%edi}, @samp{%esi}, @samp{%ebp} (the
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frame pointer), and @samp{%esp} (the stack pointer).
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@item
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the 8 16-bit low-ends of these: @samp{%ax}, @samp{%bx}, @samp{%cx},
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@samp{%dx}, @samp{%di}, @samp{%si}, @samp{%bp}, and @samp{%sp}.
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@item
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the 8 8-bit registers: @samp{%ah}, @samp{%al}, @samp{%bh},
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@samp{%bl}, @samp{%ch}, @samp{%cl}, @samp{%dh}, and @samp{%dl} (These
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are the high-bytes and low-bytes of @samp{%ax}, @samp{%bx},
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@samp{%cx}, and @samp{%dx})
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@item
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the 6 section registers @samp{%cs} (code section), @samp{%ds}
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(data section), @samp{%ss} (stack section), @samp{%es}, @samp{%fs},
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and @samp{%gs}.
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@item
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the 3 processor control registers @samp{%cr0}, @samp{%cr2}, and
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@samp{%cr3}.
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@item
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the 6 debug registers @samp{%db0}, @samp{%db1}, @samp{%db2},
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@samp{%db3}, @samp{%db6}, and @samp{%db7}.
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@item
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the 2 test registers @samp{%tr6} and @samp{%tr7}.
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@item
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the 8 floating point register stack @samp{%st} or equivalently
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@samp{%st(0)}, @samp{%st(1)}, @samp{%st(2)}, @samp{%st(3)},
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@samp{%st(4)}, @samp{%st(5)}, @samp{%st(6)}, and @samp{%st(7)}.
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@end itemize
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@node i386-prefixes
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@section Opcode Prefixes
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@cindex i386 opcode prefixes
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@cindex opcode prefixes, i386
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@cindex prefixes, i386
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Opcode prefixes are used to modify the following opcode. They are used
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to repeat string instructions, to provide section overrides, to perform
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bus lock operations, and to give operand and address size (16-bit
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operands are specified in an instruction by prefixing what would
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normally be 32-bit operands with a ``operand size'' opcode prefix).
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Opcode prefixes are best written on the same line as the instruction
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they act upon. For example, the @samp{scas} (scan string) instruction is
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repeated with:
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@smallexample
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repne scas %es:(%edi),%al
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@end smallexample
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You may also place prefixes on the lines immediately preceding the
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opcode, but this circumvents checks that @code{@value{AS}} does with
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prefixes, and will not work with all prefixes.
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Here is a list of opcode prefixes:
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@cindex section override prefixes, i386
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@itemize @bullet
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@item
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Section override prefixes @samp{cs}, @samp{ds}, @samp{ss}, @samp{es},
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@samp{fs}, @samp{gs}. These are automatically added by specifying
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using the @var{section}:@var{memory-operand} form for memory references.
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@cindex size prefixes, i386
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@item
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Operand/Address size prefixes @samp{data16} and @samp{addr16}
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change 32-bit operands/addresses into 16-bit operands/addresses,
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while @samp{data32} and @samp{addr32} change 16-bit ones (in a
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@code{.code16} section) into 32-bit operands/addresses. These prefixes
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@emph{must} appear on the same line of code as the opcode they modify.
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For example, in a 16-bit @code{.code16} section, you might write:
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@smallexample
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addr32 jmpl *(%ebx)
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@end smallexample
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@cindex bus lock prefixes, i386
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@cindex inhibiting interrupts, i386
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@item
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The bus lock prefix @samp{lock} inhibits interrupts during
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execution of the instruction it precedes. (This is only valid with
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certain instructions; see a 80386 manual for details).
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@cindex coprocessor wait, i386
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@item
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The wait for coprocessor prefix @samp{wait} waits for the
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coprocessor to complete the current instruction. This should never be
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needed for the 80386/80387 combination.
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@cindex repeat prefixes, i386
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@item
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The @samp{rep}, @samp{repe}, and @samp{repne} prefixes are added
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to string instructions to make them repeat @samp{%ecx} times.
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@end itemize
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@node i386-Memory
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@section Memory References
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@cindex i386 memory references
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@cindex memory references, i386
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An Intel syntax indirect memory reference of the form
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@smallexample
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@var{section}:[@var{base} + @var{index}*@var{scale} + @var{disp}]
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@end smallexample
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@noindent
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is translated into the AT&T syntax
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@smallexample
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@var{section}:@var{disp}(@var{base}, @var{index}, @var{scale})
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@end smallexample
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@noindent
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where @var{base} and @var{index} are the optional 32-bit base and
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index registers, @var{disp} is the optional displacement, and
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@var{scale}, taking the values 1, 2, 4, and 8, multiplies @var{index}
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to calculate the address of the operand. If no @var{scale} is
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specified, @var{scale} is taken to be 1. @var{section} specifies the
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optional section register for the memory operand, and may override the
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default section register (see a 80386 manual for section register
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defaults). Note that section overrides in AT&T syntax @emph{must}
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be preceded by a @samp{%}. If you specify a section override which
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coincides with the default section register, @code{@value{AS}} does @emph{not}
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output any section register override prefixes to assemble the given
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instruction. Thus, section overrides can be specified to emphasize which
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section register is used for a given memory operand.
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Here are some examples of Intel and AT&T style memory references:
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@table @asis
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@item AT&T: @samp{-4(%ebp)}, Intel: @samp{[ebp - 4]}
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@var{base} is @samp{%ebp}; @var{disp} is @samp{-4}. @var{section} is
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missing, and the default section is used (@samp{%ss} for addressing with
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@samp{%ebp} as the base register). @var{index}, @var{scale} are both missing.
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@item AT&T: @samp{foo(,%eax,4)}, Intel: @samp{[foo + eax*4]}
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@var{index} is @samp{%eax} (scaled by a @var{scale} 4); @var{disp} is
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@samp{foo}. All other fields are missing. The section register here
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defaults to @samp{%ds}.
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@item AT&T: @samp{foo(,1)}; Intel @samp{[foo]}
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This uses the value pointed to by @samp{foo} as a memory operand.
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Note that @var{base} and @var{index} are both missing, but there is only
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@emph{one} @samp{,}. This is a syntactic exception.
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@item AT&T: @samp{%gs:foo}; Intel @samp{gs:foo}
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This selects the contents of the variable @samp{foo} with section
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register @var{section} being @samp{%gs}.
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@end table
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Absolute (as opposed to PC relative) call and jump operands must be
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prefixed with @samp{*}. If no @samp{*} is specified, @code{@value{AS}}
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always chooses PC relative addressing for jump/call labels.
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Any instruction that has a memory operand, but no register operand,
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@emph{must} specify its size (byte, word, or long) with an opcode suffix
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(@samp{b}, @samp{w}, or @samp{l}, respectively).
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@node i386-jumps
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@section Handling of Jump Instructions
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@cindex jump optimization, i386
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@cindex i386 jump optimization
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Jump instructions are always optimized to use the smallest possible
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displacements. This is accomplished by using byte (8-bit) displacement
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jumps whenever the target is sufficiently close. If a byte displacement
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is insufficient a long (32-bit) displacement is used. We do not support
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word (16-bit) displacement jumps in 32-bit mode (i.e. prefixing the jump instruction
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with the @samp{data16} opcode prefix), since the 80386 insists upon masking
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@samp{%eip} to 16 bits after the word displacement is added.
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Note that the @samp{jcxz}, @samp{jecxz}, @samp{loop}, @samp{loopz},
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@samp{loope}, @samp{loopnz} and @samp{loopne} instructions only come in byte
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displacements, so that if you use these instructions (@code{@value{GCC}} does
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not use them) you may get an error message (and incorrect code). The AT&T
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80386 assembler tries to get around this problem by expanding @samp{jcxz foo}
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to
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@smallexample
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jcxz cx_zero
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jmp cx_nonzero
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cx_zero: jmp foo
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cx_nonzero:
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@end smallexample
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@node i386-Float
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@section Floating Point
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@cindex i386 floating point
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@cindex floating point, i386
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All 80387 floating point types except packed BCD are supported.
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(BCD support may be added without much difficulty). These data
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types are 16-, 32-, and 64- bit integers, and single (32-bit),
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double (64-bit), and extended (80-bit) precision floating point.
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Each supported type has an opcode suffix and a constructor
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associated with it. Opcode suffixes specify operand's data
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types. Constructors build these data types into memory.
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@cindex @code{float} directive, i386
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@cindex @code{single} directive, i386
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@cindex @code{double} directive, i386
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@cindex @code{tfloat} directive, i386
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@itemize @bullet
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@item
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Floating point constructors are @samp{.float} or @samp{.single},
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@samp{.double}, and @samp{.tfloat} for 32-, 64-, and 80-bit formats.
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These correspond to opcode suffixes @samp{s}, @samp{l}, and @samp{t}.
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@samp{t} stands for 80-bit real. The 80387 only supports this format
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via the @samp{fldt} (load 80-bit real to stack top) and @samp{fstpt}
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(store 80-bit real and pop stack) instructions.
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@cindex @code{word} directive, i386
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@cindex @code{long} directive, i386
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@cindex @code{int} directive, i386
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@cindex @code{quad} directive, i386
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@item
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Integer constructors are @samp{.word}, @samp{.long} or @samp{.int}, and
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@samp{.quad} for the 16-, 32-, and 64-bit integer formats. The
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corresponding opcode suffixes are @samp{s} (single), @samp{l} (long),
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and @samp{q} (quad). As with the 80-bit real format, the 64-bit
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@samp{q} format is only present in the @samp{fildq} (load quad integer
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to stack top) and @samp{fistpq} (store quad integer and pop stack)
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instructions.
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@end itemize
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Register to register operations should not use opcode suffixes.
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@samp{fstl %st, %st(1)} will give a warning, and be assembled as if you
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wrote @samp{fst %st, %st(1)}, since all register to register operations
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use 80-bit floating point operands. (Contrast this with @samp{fstl %st, mem},
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which converts @samp{%st} from 80-bit to 64-bit floating point format,
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then stores the result in the 4 byte location @samp{mem})
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@node i386-16bit
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@section Writing 16-bit Code
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@cindex i386 16-bit code
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@cindex 16-bit code, i386
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@cindex real-mode code, i386
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@cindex @code{code16} directive, i386
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@cindex @code{code32} directive, i386
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While @code{@value{AS}} normally writes only ``pure'' 32-bit i386 code,
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it also supports writing code to run in real mode or in 16-bit protected
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mode code segments. To do this, put a @samp{.code16} directive before
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the assembly language instructions to be run in 16-bit mode. You can
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switch @code{@value{AS}} back to writing normal 32-bit code with the
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@samp{.code32} directive.
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The code which @code{@value{AS}} generates in 16-bit mode will not
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necessarily run on a 16-bit pre-80386 processor. To write code that
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runs on such a processor, you must refrain from using @emph{any} 32-bit
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constructs which require @code{@value{AS}} to output address or operand
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|
size prefixes.
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|
|
|
Note that writing 16-bit code instructions by explicitly specifying a
|
|
prefix or a suffix within a 32-bit code section generates different
|
|
machine instructions than those generated for a 16-bit code segment. In a
|
|
32-bit code section, the following code generates the machine
|
|
instruction sequence @samp{66 6a 04}, which pushes the value @samp{4} onto
|
|
the stack, decrementing @samp{%esp} by 2.
|
|
|
|
@smallexample
|
|
pushw $4
|
|
@end smallexample
|
|
|
|
The same code in a 16-bit code section would generate the machine
|
|
instruction sequence @samp{6a 04} (ie. without the operand size prefix),
|
|
which is correct since the processor default operand size is assumed to
|
|
be 16 bits in a 16-bit code section.
|
|
|
|
@node i386-Bugs
|
|
@section AT&T Syntax bugs
|
|
|
|
The UnixWare assembler, and probably other AT&T derived ix86 Unix
|
|
assemblers, generate floating point instructions with reversed source
|
|
and destination registers in certain cases. Unfortunately, gcc and
|
|
possibly many other programs use this reversed syntax, so we're stuck
|
|
with it.
|
|
|
|
For example
|
|
|
|
@smallexample
|
|
fsub %st,%st(3)
|
|
@end smallexample
|
|
@noindent
|
|
results in @samp{%st(3)} being updated to @samp{%st - %st(3)} rather
|
|
than the expected @samp{%st(3) - %st}. This happens with all the
|
|
non-commutative arithmetic floating point operations with two register
|
|
operands where the source register is @samp{%st} and the destination
|
|
register is @samp{%st(i)}.
|
|
|
|
@node i386-Notes
|
|
@section Notes
|
|
|
|
@cindex i386 @code{mul}, @code{imul} instructions
|
|
@cindex @code{mul} instruction, i386
|
|
@cindex @code{imul} instruction, i386
|
|
There is some trickery concerning the @samp{mul} and @samp{imul}
|
|
instructions that deserves mention. The 16-, 32-, and 64-bit expanding
|
|
multiplies (base opcode @samp{0xf6}; extension 4 for @samp{mul} and 5
|
|
for @samp{imul}) can be output only in the one operand form. Thus,
|
|
@samp{imul %ebx, %eax} does @emph{not} select the expanding multiply;
|
|
the expanding multiply would clobber the @samp{%edx} register, and this
|
|
would confuse @code{@value{GCC}} output. Use @samp{imul %ebx} to get the
|
|
64-bit product in @samp{%edx:%eax}.
|
|
|
|
We have added a two operand form of @samp{imul} when the first operand
|
|
is an immediate mode expression and the second operand is a register.
|
|
This is just a shorthand, so that, multiplying @samp{%eax} by 69, for
|
|
example, can be done with @samp{imul $69, %eax} rather than @samp{imul
|
|
$69, %eax, %eax}.
|
|
|