cd4a7468c9
* elf32-spu.c (struct spu_link_hash_table): Add init, line_size_log2,
num_lines_log2.
(struct got_entry): Add br_addr.
(struct call_info): Add priority.
(struct function_info): Add lr_store and sp_adjust.
(spu_elf_setup): Init line_size_log2 and num_lines_log2.
(spu_elf_find_overlays): For soft-icache, mark any section within cache
area as an overlay, and check that no other overlays exist. Look up
icache overlay manager entry sym.
(BRA_STUBS, BRA, BRASL): Define.
(enum _stub_type): Replace ovl_stub with call_ovl_stub and br*_ovl_stub.
(needs_ovl_stub): Adjust for soft-icache. Return priority encoded
in branch insn.
(count_stub, build_stub): Support soft-icache.
(build_spuear_stubs, process_stubs): Adjust build_stub call.
(spu_elf_size_stubs): Size soft-icache stubs.
(overlay_index): New function.
(spu_elf_build_stubs): Make static. Support soft-icache.
(spu_elf_check_vma): Don't turn off auto_overlay if soft-icache.
(find_function_stack_adjust): Save lr store and stack adjust insn
offsets.
(maybe_insert_function): Adjust find_function_stack_adjust call.
(mark_functions_via_relocs): Retrieve priority.
(remove_cycles): Only warn about pruned arcs when stack_analysis.
(sort_calls): Sort by priority first.
(mark_overlay_section): Ignore .ovl.init.
(sum_stack): Only print when stack_analysis.
(print_one_overlay_section): New function, extracted from..
(spu_elf_auto_overlay): ..here. Support soft-icache overlays.
(spu_elf_stack_analysis): Only print when htab->stack_analysis.
(spu_elf_final_link): Call spu_elf_stack_analysis for lrlive
analysis. Call spu_elf_build_stubs.
(spu_elf_relocate_section): For soft-icache encode overlay index
into addresses.
(spu_elf_output_symbol_hook): Support soft-icache.
(spu_elf_modify_program_headers: Likewise.
* elf32-spu.h (struct spu_elf_params): Add lrlive_analysis. Rename
num_regions to num_lines. Add line_size and max_branch.
(enum _ovly_flavour): Add ovly_soft_icache.
(spu_elf_build_stubs): Delete.
gas/
* config/tc-spu.c (md_pseudo_table): Add "brinfo".
(brinfo): New var.
(md_assemble): Poke brinfo into branch instructions.
(spu_brinfo): New function.
(md_apply_fix): Don't assume insn fields start off at zero, mask
them to remove possible brinfo.
ld/
* emultempl/spuelf.em (params): Init new fields.
(num_lines_set, line_size_set, icache_mgr, icache_mgr_stream): New vars.
(spu_place_special_section): Adjust placement for soft-icache. Pad
soft-icache section to a fixed size. Clear addr_tree.
(spu_elf_load_ovl_mgr): Support soft-icache. Map overlay manager
sections a little more intelligently.
(gld${EMULATION_NAME}_finish): Don't call spu_elf_build_stubs.
(OPTION_SPU_NUM_LINES): Rename from OPTION_SPU_NUM_REGIONS.
(OPTION_SPU_SOFT_ICACHE, OPTION_SPU_LINE_SIZE): Define.
(OPTION_SPU_LRLIVE): Define.
(PARSE_AND_LIST_LONGOPTS): Add new soft-icache options.
(PARSE_AND_LIST_OPTIONS): Likewise.
(PARSE_AND_LIST_ARGS_CASES): Handle them.
* emultempl/spu_icache.S: Dummy file.
* emultempl/spu_icache.o_c: Regenerate.
* Makefile.am (eelf32_spu.c): Depend on spu_icache.o_c.
(spu_icache.o_c): Add rule to build.
(CLEANFILES): Zap temp files.
(EXTRA_DIST): Add spu_icache.o_c.
* Makefile.in: Regenerate.
ld/testsuite/
* ld-spu/ovl.d: Allow for absolute branches in stubs.
* ld-spu/ovl2.d: Likewise.
145 lines
2.5 KiB
Makefile
145 lines
2.5 KiB
Makefile
#source: ovl2.s
|
|
#ld: -N -T ovl2.lnk -T ovl.lnk --emit-relocs
|
|
#objdump: -D -r
|
|
|
|
.*elf32-spu
|
|
|
|
Disassembly of section \.text:
|
|
|
|
00000100 <_start>:
|
|
.* brsl \$0,.* <00000000\.ovl_call\.f1_a1>.*
|
|
.*SPU_REL16 f1_a1
|
|
.* brsl \$0,.* <00000000\.ovl_call\.setjmp>.*
|
|
.*SPU_REL16 setjmp
|
|
.* br 100 <_start> # 100
|
|
.*SPU_REL16 _start
|
|
|
|
0000010c <setjmp>:
|
|
.* bi \$0
|
|
|
|
00000110 <longjmp>:
|
|
.* bi \$0
|
|
.*00 00 01 40.*
|
|
.*SPU_ADDR32 \.ov_a1\+0x14
|
|
\.\.\.
|
|
|
|
#00000118 <00000000\.ovl_call.f1_a1>:
|
|
#.* bra?sl \$75,.* <__ovly_load>.*
|
|
#.*00 04 04 00.*
|
|
#
|
|
#00000120 <00000000\.ovl_call.setjmp>:
|
|
#.* bra?sl \$75,.* <__ovly_load>.*
|
|
#.*00 00 01 0c.*
|
|
#
|
|
#00000128 <_SPUEAR_f1_a2>:
|
|
#.* bra?sl \$75,.* <__ovly_load>.*
|
|
#.*00 08 04 00.*
|
|
|
|
00000120 <00000000\.ovl_call.f1_a1>:
|
|
.* ila \$78,1
|
|
.* lnop
|
|
.* ila \$79,1040 # 410
|
|
.* bra? .* <__ovly_load>.*
|
|
|
|
00000130 <00000000\.ovl_call.setjmp>:
|
|
.* ila \$78,0
|
|
.* lnop
|
|
.* ila \$79,268 # 10c
|
|
.* bra? .* <__ovly_load>.*
|
|
|
|
00000140 <00000000\.ovl_call\.13:5>:
|
|
.* ila \$78,1
|
|
.* lnop
|
|
.* ila \$79,1044 # 414
|
|
.* bra? .* <__ovly_load>.*
|
|
|
|
00000150 <_SPUEAR_f1_a2>:
|
|
.* ila \$78,2
|
|
.* lnop
|
|
.* ila \$79,1040 # 410
|
|
.* bra? .* <__ovly_load>.*
|
|
|
|
#...
|
|
Disassembly of section \.ov_a1:
|
|
|
|
00000400 <00000001\.ovl_call\.14:6>:
|
|
.* ila \$78,2
|
|
.* lnop
|
|
.* ila \$79,1044 # 414
|
|
.* bra? .* <__ovly_load>.*
|
|
|
|
00000410 <f1_a1>:
|
|
.* bi \$0
|
|
.*00 00 04 14.*
|
|
.*SPU_ADDR32 \.ov_a1\+0x14
|
|
.*00 00 04 20.*
|
|
.*SPU_ADDR32 \.ov_a1\+0x20
|
|
.*00 00 04 00.*
|
|
.*SPU_ADDR32 \.ov_a2\+0x14
|
|
|
|
Disassembly of section \.ov_a2:
|
|
|
|
00000400 <00000002\.ovl_call\.13:5>:
|
|
.* ila \$78,1
|
|
.* lnop
|
|
.* ila \$79,1056 # 420
|
|
.* bra? .* <__ovly_load>.*
|
|
|
|
00000410 <f1_a2>:
|
|
.* br .* <longjmp>.*
|
|
.*SPU_REL16 longjmp
|
|
.*00 00 04 00.*
|
|
.*SPU_ADDR32 \.ov_a1\+0x20
|
|
.*00 00 04 1c.*
|
|
.*SPU_ADDR32 \.ov_a2\+0x1c
|
|
.*00 00 00 00.*
|
|
|
|
Disassembly of section \.data:
|
|
|
|
00000420 <_ovly_table-0x10>:
|
|
.*00 00 00 00 .*
|
|
.*00 00 00 01 .*
|
|
\.\.\.
|
|
00000430 <_ovly_table>:
|
|
.*00 00 04 00 .*
|
|
.*00 00 00 20 .*
|
|
#.*00 00 03 10 .*
|
|
.*00 00 03 60 .*
|
|
.*00 00 00 01 .*
|
|
.*00 00 04 00 .*
|
|
.*00 00 00 20 .*
|
|
#.*00 00 03 20 .*
|
|
.*00 00 03 80 .*
|
|
.*00 00 00 01 .*
|
|
|
|
00000450 <_ovly_buf_table>:
|
|
.*00 00 00 00 .*
|
|
|
|
Disassembly of section \.toe:
|
|
|
|
00000460 <_EAR_>:
|
|
\.\.\.
|
|
|
|
Disassembly of section .nonalloc:
|
|
|
|
00000000 <.nonalloc>:
|
|
.*00 00 04 14.*
|
|
.*SPU_ADDR32 \.ov_a1\+0x14
|
|
.*00 00 04 20.*
|
|
.*SPU_ADDR32 \.ov_a1\+0x20
|
|
.*00 00 04 14.*
|
|
.*SPU_ADDR32 \.ov_a2\+0x14
|
|
.*00 00 04 1c.*
|
|
.*SPU_ADDR32 \.ov_a2\+0x1c
|
|
|
|
Disassembly of section \.note\.spu_name:
|
|
|
|
.* <\.note\.spu_name>:
|
|
.*: 00 00 00 08 .*
|
|
.*: 00 00 00 0c .*
|
|
.*: 00 00 00 01 .*
|
|
.*: 53 50 55 4e .*
|
|
.*: 41 4d 45 00 .*
|
|
.*: 74 6d 70 64 .*
|
|
.*: 69 72 2f 64 .*
|
|
.*: 75 6d 70 00 .*
|