96297dabb3
FCTRL_REGNUM, FPC_REGNUM, FSTAT_REGNUM, FTAG_REGNUM, FCS_REGNUM, FCOFF_REGNUM, FDS_REGNUM, FDOFF_REGNUM, FOP_REGNUM, LAST_FPU_CTRL_REGNUM, XMM0_REGNUM, XMM7_REGNUM, MXCSR_REGNUM, IS_FP_REGNUM, IS_SSE_REGNUM): Removed. (FP0_REGNUM): Define conditionally depending on HAVE_I387_REGS. (SIZEOF_FPU_CTRL_REGS): Hardcode value. * i386-tdep.h (struct gdbarch_tdep): Change such that it contains a single member `num_xmm_regs'. (FPC_REGNUM): New macro. (FIRST_FPU_REGNUM, LAST_FPU_REGNUM, FISRT_XMM_REGNUM, LAST_XMM_REGNUM, MXCSR_REGNUM, FIRST_FPU_CTRL_REGNUM, LAST_FPU_CTRL_REGNUM): Removed. (FCTRL_REGNUM, FSTAT_REGNUM, FTAG_REGNUM, FOP_REGNUM, XMM0_REGNUM, MXCSR_REGNUM): Define unconditionally. Change macros to match the comment describing the register layout. (FISEG_REGNUM, FIOFF_REGNUM, FOSEG_REGNUM, FOOFF_REGNUM): New macros. (FP_REGNUM_P, FPC_REGNUM_P, SSE_REGNUM_P): New macros. (IS_FP_REGNUM, IS_FPU_CTRL_REGNUM, IS_SSE_REGNUM): Make obsolete, unconditionally define in terms of FP_REGNUM_P, FPC_REGNUM_P and SSE_REGNUM_P). (FCS_REGNUM, FCOFF_REGNUM, FDS_REGNUM, FDOFF_REGNUM): Make obsolete, unconditionally define in terms of FISEG_REGNUM, FIOFF_REGNUM, FOSEG_REGNUM, FOOFF_REGNUM. * i386-tdep.c (i386_gdbarch_init): Initialize `num_xmm_regs' member of `struct gdbarch_tdep'. * x86-64-tdep.c (i386_gdbarch_init): Change initialization of `struct gdbarch_tdep'. * i387-nat.c (FCS_REGNUM, FCOFF_REGNUM, FDS_REGNUM, FDOFF_REGNUM): Replace with FISEG_REGNUM, FIOFF_REGNUM, FOSEG_REGNUM and FOOFF_REGNUM. Use FPC_REGNUM instead of FIRST_FPU_CTRL_REGNUM. Use XMM0_REGNUM instead of LAST_FPU_CTRL_REGNUM.
346 lines
9.1 KiB
C
346 lines
9.1 KiB
C
/* Native-dependent code for the i387.
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Copyright 2000, 2001 Free Software Foundation, Inc.
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This file is part of GDB.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 59 Temple Place - Suite 330,
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Boston, MA 02111-1307, USA. */
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#include "defs.h"
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#include "inferior.h"
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#include "value.h"
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#include "regcache.h"
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#include "i387-nat.h"
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#include "i386-tdep.h"
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/* FIXME: kettenis/2000-05-21: Right now more than a few i386 targets
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define their own routines to manage the floating-point registers in
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GDB's register array. Most (if not all) of these targets use the
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format used by the "fsave" instruction in their communication with
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the OS. They should all be converted to use the routines below. */
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/* At fsave_offset[REGNUM] you'll find the offset to the location in
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the data structure used by the "fsave" instruction where GDB
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register REGNUM is stored. */
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static int fsave_offset[] =
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{
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28 + 0 * FPU_REG_RAW_SIZE, /* FP0_REGNUM through ... */
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28 + 1 * FPU_REG_RAW_SIZE,
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28 + 2 * FPU_REG_RAW_SIZE,
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28 + 3 * FPU_REG_RAW_SIZE,
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28 + 4 * FPU_REG_RAW_SIZE,
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28 + 5 * FPU_REG_RAW_SIZE,
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28 + 6 * FPU_REG_RAW_SIZE,
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28 + 7 * FPU_REG_RAW_SIZE, /* ... FP7_REGNUM. */
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0, /* FCTRL_REGNUM (16 bits). */
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4, /* FSTAT_REGNUM (16 bits). */
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8, /* FTAG_REGNUM (16 bits). */
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16, /* FISEG_REGNUM (16 bits). */
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12, /* FIOFF_REGNUM. */
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24, /* FOSEG_REGNUM. */
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20, /* FOOFF_REGNUM. */
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18 /* FOP_REGNUM (bottom 11 bits). */
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};
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#define FSAVE_ADDR(fsave, regnum) (fsave + fsave_offset[regnum - FP0_REGNUM])
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/* Fill register REGNUM in GDB's register array with the appropriate
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value from *FSAVE. This function masks off any of the reserved
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bits in *FSAVE. */
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void
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i387_supply_register (int regnum, char *fsave)
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{
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/* Most of the FPU control registers occupy only 16 bits in
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the fsave area. Give those a special treatment. */
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if (regnum >= FPC_REGNUM
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&& regnum != FIOFF_REGNUM && regnum != FOOFF_REGNUM)
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{
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unsigned int val = *(unsigned short *) (FSAVE_ADDR (fsave, regnum));
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if (regnum == FOP_REGNUM)
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{
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val &= ((1 << 11) - 1);
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supply_register (regnum, (char *) &val);
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}
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else
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supply_register (regnum, (char *) &val);
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}
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else
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supply_register (regnum, FSAVE_ADDR (fsave, regnum));
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}
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/* Fill GDB's register array with the floating-point register values
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in *FSAVE. This function masks off any of the reserved
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bits in *FSAVE. */
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void
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i387_supply_fsave (char *fsave)
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{
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int i;
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for (i = FP0_REGNUM; i < XMM0_REGNUM; i++)
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i387_supply_register (i, fsave);
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}
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/* Fill register REGNUM (if it is a floating-point register) in *FSAVE
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with the value in GDB's register array. If REGNUM is -1, do this
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for all registers. This function doesn't touch any of the reserved
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bits in *FSAVE. */
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void
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i387_fill_fsave (char *fsave, int regnum)
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{
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int i;
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for (i = FP0_REGNUM; i < XMM0_REGNUM; i++)
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if (regnum == -1 || regnum == i)
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{
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/* Most of the FPU control registers occupy only 16 bits in
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the fsave area. Give those a special treatment. */
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if (i >= FPC_REGNUM
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&& i != FIOFF_REGNUM && i != FOOFF_REGNUM)
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{
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if (i == FOP_REGNUM)
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{
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unsigned short oldval, newval;
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/* The opcode occupies only 11 bits. */
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oldval = (*(unsigned short *) (FSAVE_ADDR (fsave, i)));
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newval = *(unsigned short *) ®isters[REGISTER_BYTE (i)];
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newval &= ((1 << 11) - 1);
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newval |= oldval & ~((1 << 11) - 1);
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memcpy (FSAVE_ADDR (fsave, i), &newval, 2);
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}
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else
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memcpy (FSAVE_ADDR (fsave, i), ®isters[REGISTER_BYTE (i)], 2);
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}
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else
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memcpy (FSAVE_ADDR (fsave, i), ®isters[REGISTER_BYTE (i)],
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REGISTER_RAW_SIZE (i));
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}
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}
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/* At fxsave_offset[REGNUM] you'll find the offset to the location in
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the data structure used by the "fxsave" instruction where GDB
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register REGNUM is stored. */
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static int fxsave_offset[] =
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{
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32, /* FP0_REGNUM through ... */
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48,
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64,
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80,
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96,
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112,
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128,
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144, /* ... FP7_REGNUM (80 bits each). */
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0, /* FCTRL_REGNUM (16 bits). */
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2, /* FSTAT_REGNUM (16 bits). */
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4, /* FTAG_REGNUM (16 bits). */
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12, /* FISEG_REGNUM (16 bits). */
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8, /* FIOFF_REGNUM. */
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20, /* FOSEG_REGNUM (16 bits). */
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16, /* FOOFF_REGNUM. */
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6, /* FOP_REGNUM (bottom 11 bits). */
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160, /* XMM0_REGNUM through ... */
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176,
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192,
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208,
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224,
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240,
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256,
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272, /* ... XMM7_REGNUM (128 bits each). */
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24, /* MXCSR_REGNUM. */
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};
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#define FXSAVE_ADDR(fxsave, regnum) \
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(fxsave + fxsave_offset[regnum - FP0_REGNUM])
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static int i387_tag (unsigned char *raw);
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/* Fill GDB's register array with the floating-point and SSE register
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values in *FXSAVE. This function masks off any of the reserved
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bits in *FXSAVE. */
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void
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i387_supply_fxsave (char *fxsave)
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{
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int i;
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for (i = FP0_REGNUM; i <= MXCSR_REGNUM; i++)
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{
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/* Most of the FPU control registers occupy only 16 bits in
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the fxsave area. Give those a special treatment. */
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if (i >= FPC_REGNUM && i < XMM0_REGNUM
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&& i != FIOFF_REGNUM && i != FOOFF_REGNUM)
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{
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unsigned long val = *(unsigned short *) (FXSAVE_ADDR (fxsave, i));
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if (i == FOP_REGNUM)
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{
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val &= ((1 << 11) - 1);
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supply_register (i, (char *) &val);
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}
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else if (i== FTAG_REGNUM)
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{
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/* The fxsave area contains a simplified version of the
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tag word. We have to look at the actual 80-bit FP
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data to recreate the traditional i387 tag word. */
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unsigned long ftag = 0;
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unsigned long fstat;
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int fpreg;
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int top;
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fstat = *(unsigned short *) (FXSAVE_ADDR (fxsave, FSTAT_REGNUM));
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top = ((fstat >> 11) & 0x7);
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for (fpreg = 7; fpreg >= 0; fpreg--)
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{
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int tag;
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if (val & (1 << fpreg))
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{
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int regnum = (fpreg + 8 - top) % 8 + FP0_REGNUM;
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tag = i387_tag (FXSAVE_ADDR (fxsave, regnum));
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}
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else
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tag = 3; /* Empty */
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ftag |= tag << (2 * fpreg);
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}
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supply_register (i, (char *) &ftag);
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}
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else
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supply_register (i, (char *) &val);
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}
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else
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supply_register (i, FXSAVE_ADDR (fxsave, i));
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}
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}
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/* Fill register REGNUM (if it is a floating-point or SSE register) in
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*FXSAVE with the value in GDB's register array. If REGNUM is -1, do
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this for all registers. This function doesn't touch any of the
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reserved bits in *FXSAVE. */
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void
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i387_fill_fxsave (char *fxsave, int regnum)
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{
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int i;
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for (i = FP0_REGNUM; i <= MXCSR_REGNUM; i++)
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if (regnum == -1 || regnum == i)
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{
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/* Most of the FPU control registers occupy only 16 bits in
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the fxsave area. Give those a special treatment. */
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if (i >= FPC_REGNUM && i < XMM0_REGNUM
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&& i != FIOFF_REGNUM && i != FDOFF_REGNUM)
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{
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if (i == FOP_REGNUM)
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{
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unsigned short oldval, newval;
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/* The opcode occupies only 11 bits. */
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oldval = (*(unsigned short *) (FXSAVE_ADDR (fxsave, i)));
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newval = *(unsigned short *) ®isters[REGISTER_BYTE (i)];
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newval &= ((1 << 11) - 1);
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newval |= oldval & ~((1 << 11) - 1);
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memcpy (FXSAVE_ADDR (fxsave, i), &newval, 2);
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}
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else if (i == FTAG_REGNUM)
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{
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/* Converting back is much easier. */
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unsigned short val = 0;
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unsigned short ftag;
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int fpreg;
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ftag = *(unsigned short *) ®isters[REGISTER_BYTE (i)];
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for (fpreg = 7; fpreg >= 0; fpreg--)
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{
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int tag = (ftag >> (fpreg * 2)) & 3;
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if (tag != 3)
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val |= (1 << fpreg);
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}
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memcpy (FXSAVE_ADDR (fxsave, i), &val, 2);
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}
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else
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memcpy (FXSAVE_ADDR (fxsave, i),
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®isters[REGISTER_BYTE (i)], 2);
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}
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else
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memcpy (FXSAVE_ADDR (fxsave, i), ®isters[REGISTER_BYTE (i)],
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REGISTER_RAW_SIZE (i));
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}
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}
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/* Recreate the FTW (tag word) valid bits from the 80-bit FP data in
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*RAW. */
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static int
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i387_tag (unsigned char *raw)
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{
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int integer;
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unsigned int exponent;
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unsigned long fraction[2];
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integer = raw[7] & 0x80;
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exponent = (((raw[9] & 0x7f) << 8) | raw[8]);
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fraction[0] = ((raw[3] << 24) | (raw[2] << 16) | (raw[1] << 8) | raw[0]);
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fraction[1] = (((raw[7] & 0x7f) << 24) | (raw[6] << 16)
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| (raw[5] << 8) | raw[4]);
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if (exponent == 0x7fff)
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{
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/* Special. */
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return (2);
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}
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else if (exponent == 0x0000)
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{
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if (fraction[0] == 0x0000 && fraction[1] == 0x0000 && !integer)
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{
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/* Zero. */
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return (1);
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}
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else
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{
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/* Special. */
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return (2);
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}
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}
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else
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{
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if (integer)
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{
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/* Valid. */
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return (0);
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}
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else
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{
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/* Special. */
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return (2);
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}
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}
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}
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