d43b4baf07
* config/tc-mips.c (macro_build): Add case 'k' to handle cache instruction. (macro): Add new case M_CACHE_AB. [ opcodes/ChangeLog ] * mips-opc.c: Add macro for cache instruction. [ include/opcode/ChangeLog ] * mips.h (enum): Add macro M_CACHE_AB.
374 lines
11 KiB
Text
374 lines
11 KiB
Text
2006-05-05 Thiemo Seufer <ths@mips.com>
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David Ung <davidu@mips.com>
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* mips-opc.c: Add macro for cache instruction.
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2006-05-04 Thiemo Seufer <ths@mips.com>
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Nigel Stephens <nigel@mips.com>
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David Ung <davidu@mips.com>
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* mips-dis.c (mips_arch_choices): Add smartmips instruction
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decoding to MIPS32 and MIPS32R2. Limit DSP decoding to release
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2 ISAs. Add MIPS3D decoding to MIPS32R2. Add MT decoding to
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MIPS64R2.
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* mips-opc.c: fix random typos in comments.
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(INSN_SMARTMIPS): New defines.
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(mips_builtin_opcodes): Add paired single support for MIPS32R2.
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Move bc3f, bc3fl, bc3t, bc3tl downwards. Move flushi, flushd,
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flushid, wb upwards. Move cfc3, ctc3 downwards. Rework the
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FP_S and FP_D flags to denote single and double register
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accesses separately. Move dmfc3, dmtc3, mfc3, mtc3 downwards.
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Allow jr.hb and jalr.hb for release 1 ISAs. Allow luxc1, suxc1
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for MIPS32R2. Add SmartMIPS instructions. Add two-argument
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variants of bc2f, bc2fl, bc2t, bc2tl. Add mfhc2, mthc2 to
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release 2 ISAs.
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* mips16-opc.c (mips16_opcodes): Add sdbbp instruction.
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2006-05-03 Thiemo Seufer <ths@mips.com>
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* mips-opc.c (mips_builtin_opcodes): Fix mftr argument order.
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2006-05-02 Thiemo Seufer <ths@mips.com>
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Nigel Stephens <nigel@mips.com>
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David Ung <davidu@mips.com>
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* mips-dis.c (print_insn_args): Force mips16 to odd addresses.
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(print_mips16_insn_arg): Force mips16 to odd addresses.
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2006-04-30 Thiemo Seufer <ths@mips.com>
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David Ung <davidu@mips.com>
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* mips-opc.c (mips_builtin_opcodes): Add udi instructions
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"udi0" to "udi15".
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* mips-dis.c (print_insn_args): Adds udi argument handling.
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2006-04-28 James E Wilson <wilson@specifix.com>
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* m68k-dis.c (match_insn_m68k): Restore fprintf_func before printing
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error message.
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2006-04-28 Thiemo Seufer <ths@mips.com>
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David Ung <davidu@mips.com>
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Nigel Stephens <nigel@mips.com>
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* mips-dis.c (mips_cp0sel_names_mips3264r2): Add MT register
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names.
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2006-04-28 Thiemo Seufer <ths@mips.com>
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Nigel Stephens <nigel@mips.com>
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David Ung <davidu@mips.com>
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* mips-dis.c (print_insn_args): Add mips_opcode argument.
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(print_insn_mips): Adjust print_insn_args call.
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2006-04-28 Thiemo Seufer <ths@mips.com>
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Nigel Stephens <nigel@mips.com>
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* mips-dis.c (print_insn_args): Print $fcc only for FP
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instructions, use $cc elsewise.
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2006-04-28 Thiemo Seufer <ths@mips.com>
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Nigel Stephens <nigel@mips.com>
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* opcodes/mips-dis.c (mips16_to_32_reg_map, mips16_reg_names):
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Map MIPS16 registers to O32 names.
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(print_mips16_insn_arg): Use mips16_reg_names.
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2006-04-26 Julian Brown <julian@codesourcery.com>
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* arm-dis.c (print_insn_neon): Disassemble floating-point constant
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VMOV.
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2006-04-26 Nathan Sidwell <nathan@codesourcery.com>
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Julian Brown <julian@codesourcery.com>
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* opcodes/arm-dis.c (coprocessor_opcodes): Add %A, %B, %k, convert
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%<code>[zy] into %[zy]<code>. Expand meaning of %<bitfield>['`?].
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Add unified load/store instruction names.
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(neon_opcode_table): New.
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(arm_opcodes): Expand meaning of %<bitfield>['`?].
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(arm_decode_bitfield): New.
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(print_insn_coprocessor): Add pc argument. Add %A & %B specifiers.
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Use arm_decode_bitfield and adjust numeric specifiers. Adjust %z & %y.
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(print_insn_neon): New.
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(print_insn_arm): Adjust print_insn_coprocessor call. Call
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print_insn_neon. Use arm_decode_bitfield and adjust numeric specifiers.
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(print_insn_thumb32): Likewise.
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2006-04-19 Alan Modra <amodra@bigpond.net.au>
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* Makefile.am: Run "make dep-am".
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* Makefile.in: Regenerate.
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2006-04-19 Alan Modra <amodra@bigpond.net.au>
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* avr-dis.c (avr_operand): Warning fix.
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* configure: Regenerate.
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2006-04-16 Daniel Jacobowitz <dan@codesourcery.com>
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* po/POTFILES.in: Regenerated.
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2006-04-12 Hochstein <hochstein@algo.informatik.tu-darmstadt.de>
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PR binutils/2454
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* avr-dis.c (avr_operand): Arrange for a comment to appear before
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the symolic form of an address, so that the output of objdump -d
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can be reassembled.
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2006-04-10 DJ Delorie <dj@redhat.com>
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* m32c-asm.c: Regenerate.
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2006-04-06 Carlos O'Donell <carlos@codesourcery.com>
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* Makefile.am: Add install-html target.
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* Makefile.in: Regenerate.
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2006-04-06 Nick Clifton <nickc@redhat.com>
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* po/vi/po: Updated Vietnamese translation.
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2006-03-31 Paul Koning <ni1d@arrl.net>
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* pdp11-opc.c (pdp11_opcodes): Fix opcode for SEC instruction.
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2006-03-16 Bernd Schmidt <bernd.schmidt@analog.com>
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* bfin-dis.c (decode_dsp32shiftimm_0): Simplify and correct the
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logic to identify halfword shifts.
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2006-03-16 Paul Brook <paul@codesourcery.com>
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* arm-dis.c (arm_opcodes): Rename swi to svc.
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(thumb_opcodes): Ditto.
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2006-03-13 DJ Delorie <dj@redhat.com>
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* m32c-asm.c: Regenerate.
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* m32c-desc.c: Likewise.
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* m32c-desc.h: Likewise.
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* m32c-dis.c: Likewise.
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* m32c-ibld.c: Likewise.
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* m32c-opc.c: Likewise.
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* m32c-opc.h: Likewise.
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2006-03-10 DJ Delorie <dj@redhat.com>
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* m32c-desc.c: Regenerate with mul.l, mulu.l.
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* m32c-opc.c: Likewise.
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* m32c-opc.h: Likewise.
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2006-03-09 Nick Clifton <nickc@redhat.com>
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* po/sv.po: Updated Swedish translation.
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2006-03-07 H.J. Lu <hongjiu.lu@intel.com>
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PR binutils/2428
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* i386-dis.c (REP_Fixup): New function.
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(AL): Remove duplicate.
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(Xbr): New.
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(Xvr): Likewise.
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(Ybr): Likewise.
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(Yvr): Likewise.
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(indirDXr): Likewise.
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(ALr): Likewise.
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(eAXr): Likewise.
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(dis386): Updated entries of ins, outs, movs, lods and stos.
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2006-03-05 Nick Clifton <nickc@redhat.com>
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* cgen-ibld.in (insert_normal): Cope with attempts to insert a
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signed 32-bit value into an unsigned 32-bit field when the host is
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a 64-bit machine.
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* fr30-ibld.c: Regenerate.
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* frv-ibld.c: Regenerate.
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* ip2k-ibld.c: Regenerate.
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* iq2000-asm.c: Regenerate.
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* iq2000-ibld.c: Regenerate.
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* m32c-ibld.c: Regenerate.
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* m32r-ibld.c: Regenerate.
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* openrisc-ibld.c: Regenerate.
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* xc16x-ibld.c: Regenerate.
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* xstormy16-ibld.c: Regenerate.
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2006-03-03 Shrirang Khisti <shrirangk@kpitcummins.com)
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* xc16x-asm.c: Regenerate.
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* xc16x-dis.c: Regenerate.
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2006-02-27 Carlos O'Donell <carlos@codesourcery.com>
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* po/Make-in: Add html target.
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2006-02-27 H.J. Lu <hongjiu.lu@intel.com>
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* i386-dis.c (IS_3BYTE_OPCODE): New for 3-byte opcodes used by
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Intel Merom New Instructions.
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(THREE_BYTE_0): Likewise.
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(THREE_BYTE_1): Likewise.
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(three_byte_table): Likewise.
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(dis386_twobyte): Use THREE_BYTE_0 for entry 0x38. Use
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THREE_BYTE_1 for entry 0x3a.
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(twobyte_has_modrm): Updated.
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(twobyte_uses_SSE_prefix): Likewise.
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(print_insn): Handle 3-byte opcodes used by Intel Merom New
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Instructions.
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2006-02-24 David S. Miller <davem@sunset.davemloft.net>
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* sparc-dis.c (v9_priv_reg_names): Add "gl" entry.
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(v9_hpriv_reg_names): New table.
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(print_insn_sparc): Allow values up to 16 for '?' and '!'.
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New cases '$' and '%' for read/write hyperprivileged register.
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* sparc-opc.c (sparc_opcodes): Add new entries for UA2005
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window handling and rdhpr/wrhpr instructions.
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2006-02-24 DJ Delorie <dj@redhat.com>
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* m32c-desc.c: Regenerate with linker relaxation attributes.
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* m32c-desc.h: Likewise.
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* m32c-dis.c: Likewise.
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* m32c-opc.c: Likewise.
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2006-02-24 Paul Brook <paul@codesourcery.com>
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* arm-dis.c (arm_opcodes): Add V7 instructions.
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(thumb32_opcodes): Ditto. Handle V7M MSR/MRS variants.
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(print_arm_address): New function.
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(print_insn_arm): Use it. Add 'P' and 'U' cases.
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(psr_name): New function.
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(print_insn_thumb32): Add 'U', 'C' and 'D' cases.
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2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
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* ia64-opc-i.c (bXc): New.
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(mXc): Likewise.
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(OpX2TaTbYaXcC): Likewise.
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(TF). Likewise.
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(TFCM). Likewise.
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(ia64_opcodes_i): Add instructions for tf.
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* ia64-opc.h (IMMU5b): New.
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* ia64-asmtab.c: Regenerated.
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2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
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* ia64-gen.c: Update copyright years.
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* ia64-opc-b.c: Likewise.
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2006-02-22 H.J. Lu <hongjiu.lu@intel.com>
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* ia64-gen.c (lookup_regindex): Handle ".vm".
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(print_dependency_table): Handle '\"'.
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* ia64-ic.tbl: Updated from SDM 2.2.
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* ia64-raw.tbl: Likewise.
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* ia64-waw.tbl: Likewise.
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* ia64-asmtab.c: Regenerated.
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* ia64-opc-b.c (ia64_opcodes_b): Add vmsw.0 and vmsw.1.
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2006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
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Anil Paranjape <anilp1@kpitcummins.com>
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Shilin Shakti <shilins@kpitcummins.com>
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* xc16x-desc.h: New file
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* xc16x-desc.c: New file
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* xc16x-opc.h: New file
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* xc16x-opc.c: New file
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* xc16x-ibld.c: New file
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* xc16x-asm.c: New file
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* xc16x-dis.c: New file
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* Makefile.am: Entries for xc16x
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* Makefile.in: Regenerate
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* cofigure.in: Add xc16x target information.
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* configure: Regenerate.
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* disassemble.c: Add xc16x target information.
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2006-02-11 H.J. Lu <hongjiu.lu@intel.com>
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* i386-dis.c (dis386_twobyte): Use "movZ" for debug register
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moves.
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2006-02-11 H.J. Lu <hongjiu.lu@intel.com>
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* i386-dis.c ('Z'): Add a new macro.
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(dis386_twobyte): Use "movZ" for control register moves.
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2006-02-10 Nick Clifton <nickc@redhat.com>
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* iq2000-asm.c: Regenerate.
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2006-02-07 Nathan Sidwell <nathan@codesourcery.com>
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* m68k-dis.c (print_insn_m68k): Use bfd_m68k_mach_to_features.
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2006-01-26 David Ung <davidu@mips.com>
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* mips-opc.c: Add I33 masks to these MIPS32R2 instructions: prefx,
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ceil.l.d, ceil.l.s, cvt.d.l, cvt.l.d, cvt.l.s, cvt.s.l, floor.l.d,
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floor.l.s, ldxc1, lwxc1, madd.d, madd.s, msub.d, msub.s, nmadd.d,
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nmadd.s, nmsub.d, nmsub.s, recip.d, recip.s, round.l.d, rsqrt.d,
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rsqrt.s, sdxc1, swxc1, trunc.l.d, trunc.l.s.
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2006-01-18 Arnold Metselaar <arnoldm@sourceware.org>
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||
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* z80-dis.c (struct buffer, prt_d, prt_d_n, arit_d, ld_r_d,
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ld_d_r, pref_xd_cb): Use signed char to hold data to be
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disassembled.
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||
* z80-dis.c (TXTSIZ): Increase buffer size to 24, this fixes
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buffer overflows when disassembling instructions like
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ld (ix+123),0x23
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||
* z80-dis.c (opc_ind, pref_xd_cb): Suppress '+' in an indexed
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operand, if the offset is negative.
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||
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2006-01-17 Arnold Metselaar <arnoldm@sourceware.org>
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||
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* z80-dis.c (struct buffer, prt_d, prt_d_n, pref_xd_cb): Use
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unsigned char to hold data to be disassembled.
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2006-01-17 Andreas Schwab <schwab@suse.de>
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||
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PR binutils/1486
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* disassemble.c (disassemble_init_for_target): Set
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disassembler_needs_relocs for bfd_arch_arm.
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||
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||
2006-01-16 Paul Brook <paul@codesourcery.com>
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||
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||
* m68k-opc.c (m68k_opcodes): Fix opcodes for ColdFire f?abss,
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f?add?, and f?sub? instructions.
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||
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||
2006-01-16 Nick Clifton <nickc@redhat.com>
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||
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||
* po/zh_CN.po: New Chinese (simplified) translation.
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||
* configure.in (ALL_LINGUAS): Add "zh_CH".
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||
* configure: Regenerate.
|
||
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||
2006-01-05 Paul Brook <paul@codesourcery.com>
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||
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||
* m68k-opc.c (m68k_opcodes): Add missing ColdFire fdsqrtd entry.
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||
|
||
2006-01-06 DJ Delorie <dj@redhat.com>
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||
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||
* m32c-desc.c: Regenerate.
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||
* m32c-opc.c: Regenerate.
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||
* m32c-opc.h: Regenerate.
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||
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||
2006-01-03 DJ Delorie <dj@redhat.com>
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||
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||
* cgen-ibld.in (extract_normal): Avoid memory range errors.
|
||
* m32c-ibld.c: Regenerated.
|
||
|
||
For older changes see ChangeLog-2005
|
||
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||
Local Variables:
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||
mode: change-log
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||
left-margin: 8
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||
fill-column: 74
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||
version-control: never
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||
End:
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