ece5ef6079
* spu.h (R_SPU_PPU32, R_SPU_PPU64): Define. bfd/ * reloc.c (BFD_RELOC_SPU_PPU32, BFD_RELOC_SPU_PPU64): Define. * elf-bfd.h (struct elf_backend_data): Change return type of elf_backend_relocate_section to int. * elf32-spu.c (elf_howto_table): Add howtos for R_SPU_PPU32 and R_SPU_PPU64. (spu_elf_bfd_to_reloc_type): Convert new relocs. (spu_elf_count_relocs): New function. (elf_backend_count_relocs): Define. (spu_elf_relocate_section): Arrange to emit R_SPU_PPU32 and R_SPU_PPU64 relocs. * elflink.c (elf_link_input_bfd): Emit relocs if relocate_section returns 2. * bfd-in2.h: Regenerate. * libbfd.h: Regenerate. gas/ * config/tc-spu.c (md_pseudo_table): Add int, long, quad. Call spu_cons for word. (md_assemble): Tidy use of insn.flag. (get_imm): Likewise. Handle uppercase input too. (spu_cons): New function. * config/tc-spu.h (tc_fix_adjustable): Don't adjust SPU_PPU relocs. (TC_FORCE_RELOCATION): Don't resolve them either. binutils/ * embedspu.sh (find_prog): Prefer prog in same dir as embedspu over one found on the users path. (main): Generate .reloc for each R_SPU_PPU* reloc.
132 lines
3.8 KiB
C
132 lines
3.8 KiB
C
/* spu.h -- Assembler for spu
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Copyright 2006, 2007 Free Software Foundation, Inc.
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This file is part of GAS, the GNU Assembler.
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GAS is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2, or (at your option)
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any later version.
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GAS is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with GAS; see the file COPYING. If not, write to the Free
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Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
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02110-1301, USA. */
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#define TC_SPU
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#include "opcode/spu.h"
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#ifdef OBJ_ELF
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#define TARGET_FORMAT "elf32-spu"
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#define TARGET_ARCH bfd_arch_spu
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#define TARGET_NAME "elf32-spu"
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#endif
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#define TARGET_BYTES_BIG_ENDIAN 1
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#ifndef TARGET_NAME
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#define TARGET_NAME "coff-spu"
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#endif
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#ifndef TARGET_ARCH
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#define TARGET_ARCH bfd_arch_spu
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#endif
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#define COFF_MAGIC SPU_MAGIC
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#define BFD_ARCH bfd_arch_spu
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#define NEED_FX_R_TYPE
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#define TC_KEEP_FX_OFFSET
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/* #define TC_CONS_RELOC RELOC_32 */
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struct tc_fix_info {
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unsigned short arg_format;
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unsigned short insn_tag;
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};
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/* fixS will have a member named tc_fix_data of this type. */
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#define TC_FIX_TYPE struct tc_fix_info
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#define TC_INIT_FIX_DATA(FIXP) \
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do \
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{ \
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(FIXP)->tc_fix_data.arg_format = 0; \
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(FIXP)->tc_fix_data.insn_tag = 0; \
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} \
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while (0)
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/* Don't reduce function symbols to section symbols, and don't adjust
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references to PPU symbols. */
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#define tc_fix_adjustable(FIXP) \
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(!(S_IS_FUNCTION ((FIXP)->fx_addsy) \
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|| (FIXP)->fx_r_type == BFD_RELOC_SPU_PPU32 \
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|| (FIXP)->fx_r_type == BFD_RELOC_SPU_PPU64))
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/* Keep relocs on calls. Branches to function symbols are tail or
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sibling calls. */
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#define TC_FORCE_RELOCATION(FIXP) \
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((FIXP)->tc_fix_data.insn_tag == M_BRSL \
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|| (FIXP)->tc_fix_data.insn_tag == M_BRASL \
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|| (((FIXP)->tc_fix_data.insn_tag == M_BR \
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|| (FIXP)->tc_fix_data.insn_tag == M_BRA) \
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&& (FIXP)->fx_addsy != NULL \
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&& S_IS_FUNCTION ((FIXP)->fx_addsy)) \
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|| (FIXP)->fx_r_type == BFD_RELOC_SPU_PPU32 \
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|| (FIXP)->fx_r_type == BFD_RELOC_SPU_PPU64 \
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|| generic_force_reloc (FIXP))
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/* Values passed to md_apply_fix don't include symbol values. */
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#define MD_APPLY_SYM_VALUE(FIX) 0
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/* The spu uses pseudo-ops with no leading period. */
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#define NO_PSEUDO_DOT 1
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/* Don't warn on word overflow; it happens on %hi relocs. */
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#undef WARN_SIGNED_OVERFLOW_WORD
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#ifdef OBJ_ELF
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#define DIFF_EXPR_OK
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#endif
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#define WORKING_DOT_WORD
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#define md_number_to_chars number_to_chars_bigendian
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#define md_convert_frag(b,s,f) {as_fatal (_("spu convert_frag\n"));}
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/* We don't need to do anything special for undefined symbols. */
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#define md_undefined_symbol(s) 0
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/* We have no special operand handling. */
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#define md_operand(e)
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/* Fill in rs_align_code fragments. */
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extern void spu_handle_align PARAMS ((fragS *));
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#define HANDLE_ALIGN(frag) spu_handle_align (frag)
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#define MAX_MEM_FOR_RS_ALIGN_CODE (7 + 8)
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#ifdef SPUCOFF
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/* Whether a reloc should be output. */
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#define TC_COUNT_RELOC(fixp) ((fixp)->fx_addsy != NULL || (fixp)->fx_subsy != NULL)
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/* Get the BFD reloc type to use for a gas fixS structure. */
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#define TC_COFF_FIX2RTYPE(fixp) tc_coff_fix2rtype (fixp)
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/* No special hook needed for symbols. */
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#define tc_coff_symbol_emit_hook(s)
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/* Align sections to a four byte boundary. */
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#ifndef max
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#define max(a,b) (((a) > (b)) ? (a) : (b))
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#endif
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#define SUB_SEGMENT_ALIGN(SEG) max (section_alignment[(int) (SEG)], 4)
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#endif /* SPUCOFF */
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