9f739abdac
branch targets to compute target address using const from previous instruction if necessary. * Add `Q' operator to print out bit position field various instructions. * hppah-nat.c: #include sys/param.h, and sys/user.h. General cleanups, use new code from Utah. * (store_inferior_registers): Update to new code from Utah. * (initialize_kernel_u_addr): Re-enable decl of struct user u. * (fetch_register): Clear out priv level when reading PCs. * hppah-tdep.c: Get rid of gobs of KERNELDEBUG stuff. * Remove decl of errno, #include wait.h and target.h. * (frame_saved_pc): Check `flags' pseudo-register to see if we were inside of a kernel call. If so, then PC is in a different register. Also, mask out bottom two bits of all PCs so as not to confuse higher level code. * (push_dummy_frame): Create from #define in tm-hppa.h. * (find_dummy_frame_regs): Update from Utah. * (hp_pop_frame): Create from #define in tm-hppa.h. * (hp_restore_pc_queue): New, from Utah. * (hp_push_arguments): Big fixes from Utah. * (pa_do_registers_info, pa_print_registers): Only print out fp regs upon request. * (skip_trampoline_code): New routine to deal with stubs that live in nowhereland between callers and callees. * i860-tdep.c: Remove decl of attach_flag. * infrun.c (wait_for_inferior): Add new macro INSTRUCTION_NULLIFIED, which can tell if the instruction pointed at by PC will be nullified. If so, then step the target once more so as to avoid confusing the user. * (just before step_over_function:): Use stop_func_start, not stop_pc when checking for the existance of line number info. stop_func_start will reflect the proper address of the target routine, not of the stub that we may be traversing to get there. * tm-hppa.h: define SKIP_TRAMPOLINE_CODE and IN_SOLIB_TRAMPOLINE to deal with the stubs that PA compilers sometimes stick between callers and callees. Also, define FLAGS_REGNUM for access to the `flags' pseudo-reg. * (REGISTER_CONVERT_TO_VIRTUAL, REGISTER_CONVERT_TO_RAW): Use memcpy, not bcopy. * (CANNOT_STORE_REGISTER): New from Utah. Says that we can't write gr0, PC regs, and PSW! * (FRAME_FIND_SAVED_REGS): Bug fixes from Utah. * (PUSH_DUMMY_FRAME, POP_FRAME): Make into real routines in hppah-nat.c. * (CALL_DUMMY, FIX_CALL_DUMMY): Fixes from Utah. * Define struct unwind_table_entry. * valops.c (call_function_by_hand): Add another arg to FIX_CALL_DUMMY (under #ifdef GDB_TARGET_IS_HPPA). Why is this necessary?
426 lines
12 KiB
C
426 lines
12 KiB
C
/* Disassembler for the PA-RISC. Somewhat derived from sparc-pinsn.c.
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Copyright 1989, 1990, 1992 Free Software Foundation, Inc.
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Contributed by the Center for Software Science at the
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University of Utah (pa-gdb-bugs@cs.utah.edu).
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This file is part of GDB.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
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#include "defs.h"
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#include "symtab.h"
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#include "opcode/hppa.h"
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static char *control_reg[] =
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{ "rctr", "cr1", "cr2", "cr3", "cr4", "cr5", "cr6", "cr7",
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"pidr1", "pidr2", "ccr", "sar", "pidr3", "pidr4",
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"iva", "eiem", "itmr", "pcsq", "pcoq", "iir", "isr",
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"ior", "ipsw", "eirr", "tr0", "tr1", "tr2", "tr3",
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"tr4", "tr5", "tr6", "tr7"
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};
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static char *compare_cond_names[] =
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{ "", ",=", ",<", ",<=", ",<<", ",<<=", ",sv",
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",od", ",tr", ",<>", ",>=", ",>", ",>>=",
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",>>", ",nsv", ",ev"
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};
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static char *add_cond_names[] =
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{ "", ",=", ",<", ",<=", ",nuv", ",znv", ",sv",
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",od", ",tr", ",<>", ",>=", ",>", ",uv",
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",vnz", ",nsv", ",ev"
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};
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static char *logical_cond_names[] =
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{ "", ",=", ",<", ",<=", 0, 0, 0, ",od",
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",tr", ",<>", ",>=", ",>", 0, 0, 0, ",ev"
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};
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static char *unit_cond_names[] =
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{ "", 0, ",sbz", ",shz", ",sdc", 0, ",sbc", ",shc",
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",tr", 0, ",nbz", ",nhz", ",ndc", 0, ",nbc", ",nhc"
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};
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static char *shift_cond_names[] =
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{"", ",=", ",<", ",od", ",tr", ",<>", ",>=", ",ev"};
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static char *index_compl_names[] = {"", ",m", ",s", ",sm"};
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static char *short_ldst_compl_names[] = {"", ",ma", "", ",mb"};
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static char *short_bytes_compl_names[] = {"", ",b,m", ",e", ",e,m"};
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static char *float_format_names[] = {",sgl", ",dbl", ",quad"};
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static char *float_comp_names[] =
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{",false?", ",false", ",?", ",!<=>", ",=", ",=t", ",?=", ",!<>",
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",!?>=", ",<", ",?<", ",!>=", ",!?>", ",<=", ",?<=", ",!>",
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",!?<=", ",>", ",?>", ",!<=", ",!?<", ",>=", ",?>=", ",!<",
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",!?=", ",<>", ",!=", ",!=t", ",!?", ",<=>", ",true?", ",true"
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};
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/* For a bunch of different instructions form an index into a
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completer name table. */
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#define GET_COMPL(insn) (GET_FIELD (insn, 26, 26) | \
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GET_FIELD (insn, 18, 18) << 1)
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#define GET_COND(insn) (GET_FIELD ((insn), 16, 18) + \
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(GET_FIELD ((insn), 19, 19) ? 8 : 0))
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static void fput_reg PARAMS ((unsigned reg, FILE *stream));
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static void fput_const PARAMS ((unsigned num, FILE *stream));
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static void fput_reg_r PARAMS ((unsigned reg, FILE *stream));
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static void fput_creg PARAMS ((unsigned reg, FILE *stream));
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/* Print one instruction from MEMADDR on STREAM. */
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int
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print_insn (memaddr, stream)
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CORE_ADDR memaddr;
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FILE *stream;
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{
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unsigned int insn, i, op;
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read_memory (memaddr, &insn, sizeof (insn));
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for (i = 0; i < NUMOPCODES; ++i)
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{
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const struct pa_opcode *opcode = &pa_opcodes[i];
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if ((insn & opcode->mask) == opcode->match)
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{
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register const char *s;
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fputs_filtered (opcode->name, stream);
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if (!index ("cCY<?!@-+&U>~nZFM", opcode->args[0]))
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fputs_filtered (" ", stream);
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for (s = opcode->args; *s != '\0'; ++s)
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{
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switch (*s)
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{
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case 'x':
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fput_reg (GET_FIELD (insn, 11, 15), stream);
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break;
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case 'X':
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if (GET_FIELD (insn, 25, 25))
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fput_reg_r (GET_FIELD (insn, 11, 15), stream);
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else
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fput_reg (GET_FIELD (insn, 11, 15), stream);
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break;
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case 'b':
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fput_reg (GET_FIELD (insn, 6, 10), stream);
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break;
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case '^':
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fput_creg (GET_FIELD (insn, 6, 10), stream);
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break;
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case 'E':
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if (GET_FIELD (insn, 25, 25))
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fput_reg_r (GET_FIELD (insn, 6, 10), stream);
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else
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fput_reg (GET_FIELD (insn, 6, 10), stream);
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break;
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case 't':
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fput_reg (GET_FIELD (insn, 27, 31), stream);
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break;
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case 'v':
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if (GET_FIELD (insn, 25, 25))
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fput_reg_r (GET_FIELD (insn, 27, 31), stream);
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else
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fput_reg (GET_FIELD (insn, 27, 31), stream);
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break;
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case '4':
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fput_creg (GET_FIELD (insn, 6, 10), stream);
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break;
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case '6':
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fput_reg (GET_FIELD (insn, 11, 15), stream);
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break;
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case '7':
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fput_reg (GET_FIELD (insn, 27, 31), stream);
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break;
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case '8':
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fput_reg (GET_FIELD (insn, 16, 20), stream);
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break;
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case '9':
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fput_reg (GET_FIELD (insn, 21, 25), stream);
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break;
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case '5':
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fput_const (extract_5_load (insn), stream);
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break;
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/* case 's': */
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case 'S':
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fprintf_filtered (stream, "sr%d", extract_3 (insn));
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break;
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case 'c':
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fprintf_filtered (stream, "%s ",
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index_compl_names[GET_COMPL (insn)]);
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break;
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case 'C':
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fprintf_filtered (stream, "%s ",
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short_ldst_compl_names[GET_COMPL (insn)]);
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break;
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case 'Y':
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fprintf_filtered (stream, "%s ",
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short_bytes_compl_names[GET_COMPL (insn)]);
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break;
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/* these four conditions are for the set of instructions
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which distinguish true/false conditions by opcode rather
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than by the 'f' bit (sigh): comb, comib, addb, addib */
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case '<':
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fputs_filtered (compare_cond_names[GET_FIELD (insn, 16, 18)],
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stream);
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break;
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case '?':
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fputs_filtered (compare_cond_names[GET_FIELD (insn, 16, 18) + 8],
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stream);
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break;
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case '!':
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fputs_filtered (add_cond_names[GET_FIELD (insn, 16, 18)],
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stream);
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break;
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case '@':
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fputs_filtered (add_cond_names[GET_FIELD (insn, 16, 18) + 8],
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stream);
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break;
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case '-':
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fprintf_filtered (stream, "%s ",
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compare_cond_names[GET_COND (insn)]);
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break;
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case '+':
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fprintf_filtered (stream, "%s ",
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add_cond_names[GET_FIELD (insn, 16, 18)]);
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break;
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case '&':
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fprintf_filtered (stream, "%s ",
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logical_cond_names[GET_COND (insn)]);
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break;
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case 'U':
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fprintf_filtered (stream, "%s ",
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unit_cond_names[GET_COND (insn)]);
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break;
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case '>':
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case '~':
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fprintf_filtered (stream, "%s ",
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shift_cond_names[GET_FIELD (insn, 16, 18)]);
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break;
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case 'V':
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fput_const (extract_5_store (insn), stream);
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break;
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case 'i':
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fput_const (extract_11 (insn), stream);
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break;
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case 'j':
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fput_const (extract_14 (insn), stream);
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break;
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case 'k':
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fput_const (extract_21 (insn), stream);
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break;
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case 'n':
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if (insn & 0x2)
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fprintf_filtered (stream, ",n ");
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else
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fprintf_filtered (stream, " ");
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break;
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case 'w':
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print_address (memaddr + 8 + extract_12 (insn), stream);
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break;
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case 'W':
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op = GET_FIELD (insn, 0, 5);
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if (op == 0x38 /* be */ || op == 0x39 /* ble */)
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fput_const (extract_17 (insn), stream);
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else
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print_address (memaddr + 8 + extract_17 (insn), stream);
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break;
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case 'B':
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{
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int space;
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if (space = GET_FIELD (insn, 16, 17))
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fprintf_filtered (stream, "sr%d,", space);
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fput_reg (GET_FIELD (insn, 6, 10), stream);
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break;
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}
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case 'p':
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fprintf_filtered (stream, "%d",
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31 - GET_FIELD (insn, 22, 26));
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break;
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case 'P':
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fprintf_filtered (stream, "%d",
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GET_FIELD (insn, 22, 26));
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break;
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case 'Q':
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fprintf_filtered (stream, "%d",
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GET_FIELD (insn, 11, 15));
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break;
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case 'T':
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fprintf_filtered (stream, "%d",
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32 - GET_FIELD (insn, 27, 31));
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break;
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case 'A':
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fput_const (GET_FIELD (insn, 6, 18), stream);
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break;
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case 'Z':
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if (GET_FIELD (insn, 26, 26))
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fprintf_filtered (stream, ",m ");
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else
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fprintf_filtered (stream, " ");
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break;
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case 'D':
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fput_const (GET_FIELD (insn, 6, 31), stream);
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break;
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case 'f':
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fprintf_filtered (stream, ",%d", GET_FIELD (insn, 23, 25));
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break;
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case 'O':
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fput_const ((GET_FIELD (insn, 6,20) << 5 |
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GET_FIELD (insn, 27, 31)), stream);
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break;
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case 'o':
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fput_const (GET_FIELD (insn, 6, 20), stream);
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break;
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case '2':
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fput_const ((GET_FIELD (insn, 6, 22) << 5 |
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GET_FIELD (insn, 27, 31)), stream);
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break;
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case '1':
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fput_const ((GET_FIELD (insn, 11, 20) << 5 |
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GET_FIELD (insn, 27, 31)), stream);
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break;
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case '0':
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fput_const ((GET_FIELD (insn, 16, 20) << 5 |
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GET_FIELD (insn, 27, 31)), stream);
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break;
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case 'u':
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fprintf_filtered (stream, "%d", GET_FIELD (insn, 23, 25));
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break;
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case 'F':
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/* if no destination completer, need a space here */
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if (GET_FIELD (insn, 21, 22) == 1)
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fputs_filtered (float_format_names[GET_FIELD (insn, 19, 20)],
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stream);
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else
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fprintf_filtered (stream, "%s ",
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float_format_names[GET_FIELD
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(insn, 19, 20)]);
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break;
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case 'G':
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fprintf_filtered (stream, "%s ",
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float_format_names[GET_FIELD (insn,
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17, 18)]);
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break;
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case 'H':
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fputs_filtered (float_format_names[GET_FIELD
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(insn, 26, 26)], stream);
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break;
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case 'M':
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fputs_filtered (float_comp_names[GET_FIELD (insn, 27, 31)],
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stream);
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break;
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case '}':
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fprintf_filtered (stream, "fp%d", GET_FIELD (insn, 6, 10));
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break;
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case '|':
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fprintf_filtered (stream, "fp%d", GET_FIELD (insn, 11, 15));
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break;
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case '{':
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if (GET_FIELD (insn, 23, 25) == 0)
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fprintf_filtered (stream, "fp%d",
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GET_FIELD (insn, 27, 31));
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else
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fprintf_filtered (stream, "cp%d",
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GET_FIELD (insn, 27, 31));
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break;
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default:
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fprintf_filtered (stream, "%c", *s);
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break;
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}
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}
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/* If this is an external branch, examine the previous instruction and see if
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it was an ldil that loaded something into the same base reg. If so, then
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calculate the branch target from the constants in both instructions, and
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print it out. */
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op = GET_FIELD (insn, 0, 5);
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if (op == 0x38 /* be */ || op == 0x39 /* ble */)
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{
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CORE_ADDR target_address;
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unsigned int prev_insn;
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int basereg, basereg_prev;
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target_address = extract_17 (insn);
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basereg = GET_FIELD (insn, 6, 10);
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if (basereg != 0)
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{
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read_memory (memaddr - 4, &prev_insn, sizeof(prev_insn));
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basereg_prev = GET_FIELD (prev_insn, 6, 10);
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if ((prev_insn & 0xfc000000) == 0x20000000 /* ldil */
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&& basereg == basereg_prev)
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target_address += extract_21 (prev_insn);
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}
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fprintf_filtered (stream, "\t! ");
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print_address (target_address, stream);
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}
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return sizeof(insn);
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}
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}
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fprintf_filtered (stream, "%#8x", insn);
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return sizeof(insn);
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}
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/* Utility function to print registers */
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static void
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fput_reg (reg, stream)
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unsigned reg;
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FILE *stream;
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{
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if (reg)
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fputs_filtered (reg_names[reg], stream);
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else
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fputs_filtered ("r0", stream);
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}
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void
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fput_reg_r (reg, stream)
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unsigned reg;
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FILE *stream;
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{
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if (reg)
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fputs_filtered (reg_names[reg], stream);
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else
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fputs_filtered ("r0", stream);
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fputs_filtered ("R", stream);
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}
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void
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fput_creg (reg, stream)
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unsigned reg;
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FILE *stream;
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{
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fputs_filtered (control_reg[reg], stream);
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}
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/* print constants with sign */
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void
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fput_const (num, stream)
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unsigned num;
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FILE *stream;
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{
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if ((int)num < 0)
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fprintf_filtered (stream, "-%x", -(int)num);
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else
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fprintf_filtered (stream, "%x", num);
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}
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