887 lines
26 KiB
C
887 lines
26 KiB
C
/* Assembler interface for targets using CGEN. -*- C -*-
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CGEN: Cpu tools GENerator
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THIS FILE IS MACHINE GENERATED WITH CGEN.
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- the resultant file is machine generated, cgen-asm.in isn't
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Copyright 1996, 1997, 1998, 1999, 2000, 2001 Free Software Foundation, Inc.
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This file is part of the GNU Binutils and GDB, the GNU debugger.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2, or (at your option)
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any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software Foundation, Inc.,
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59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
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/* ??? Eventually more and more of this stuff can go to cpu-independent files.
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Keep that in mind. */
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#include "sysdep.h"
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#include <stdio.h>
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#include "ansidecl.h"
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#include "bfd.h"
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#include "symcat.h"
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#include "iq2000-desc.h"
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#include "iq2000-opc.h"
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#include "opintl.h"
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#include "xregex.h"
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#include "libiberty.h"
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#include "safe-ctype.h"
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#undef min
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#define min(a,b) ((a) < (b) ? (a) : (b))
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#undef max
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#define max(a,b) ((a) > (b) ? (a) : (b))
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static const char * parse_insn_normal
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(CGEN_CPU_DESC, const CGEN_INSN *, const char **, CGEN_FIELDS *);
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/* -- assembler routines inserted here. */
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/* -- asm.c */
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#include "safe-ctype.h"
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static int iq2000_cgen_isa_register PARAMS ((const char **));
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static const char * parse_jtargq10 PARAMS ((CGEN_CPU_DESC, const char **, int, int, enum cgen_parse_operand_result *, bfd_vma *));
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static const char * parse_mimm PARAMS ((CGEN_CPU_DESC, const char **, int, long *));
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static const char * parse_imm PARAMS ((CGEN_CPU_DESC, const char **, int, unsigned long *));
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static const char * parse_hi16 PARAMS ((CGEN_CPU_DESC, const char **, int, unsigned long *));
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static const char * parse_lo16 PARAMS ((CGEN_CPU_DESC, const char **, int, long *));
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static const char * parse_mlo16 PARAMS ((CGEN_CPU_DESC, const char **, int, long *));
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/* Special check to ensure that instruction exists for given machine */
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int
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iq2000_cgen_insn_supported (cd, insn)
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CGEN_CPU_DESC cd;
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const CGEN_INSN *insn;
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{
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int machs = cd->machs;
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return ((CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_MACH) & machs) != 0);
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}
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static int iq2000_cgen_isa_register (strp)
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const char **strp;
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{
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int len;
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int ch1, ch2;
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if (**strp == 'r' || **strp == 'R')
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{
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len = strlen (*strp);
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if (len == 2)
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{
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ch1 = (*strp)[1];
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if ('0' <= ch1 && ch1 <= '9')
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return 1;
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}
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else if (len == 3)
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{
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ch1 = (*strp)[1];
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ch2 = (*strp)[2];
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if (('1' <= ch1 && ch1 <= '2') && ('0' <= ch2 && ch2 <= '9'))
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return 1;
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if ('3' == ch1 && (ch2 == '0' || ch2 == '1'))
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return 1;
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}
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}
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if (**strp == '%' && TOLOWER((*strp)[1]) != 'l' && TOLOWER((*strp)[1]) != 'h')
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return 1;
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return 0;
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}
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/* Handle negated literal. */
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static const char *
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parse_mimm (cd, strp, opindex, valuep)
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CGEN_CPU_DESC cd;
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const char **strp;
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int opindex;
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long *valuep;
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{
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const char *errmsg;
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/* Verify this isn't a register */
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if (iq2000_cgen_isa_register (strp))
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errmsg = _("immediate value cannot be register");
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else
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{
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long value;
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errmsg = cgen_parse_signed_integer (cd, strp, opindex, & value);
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if (errmsg == NULL)
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{
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long x = (-value) & 0xFFFF0000;
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if (x != 0 && x != (long) 0xFFFF0000)
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errmsg = _("immediate value out of range");
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else
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*valuep = (-value & 0xFFFF);
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}
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}
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return errmsg;
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}
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/* Handle signed/unsigned literal. */
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static const char *
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parse_imm (cd, strp, opindex, valuep)
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CGEN_CPU_DESC cd;
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const char **strp;
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int opindex;
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unsigned long *valuep;
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{
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const char *errmsg;
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if (iq2000_cgen_isa_register (strp))
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errmsg = _("immediate value cannot be register");
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else
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{
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long value;
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errmsg = cgen_parse_signed_integer (cd, strp, opindex, & value);
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if (errmsg == NULL)
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{
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long x = value & 0xFFFF0000;
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if (x != 0 && x != (long) 0xFFFF0000)
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errmsg = _("immediate value out of range");
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else
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*valuep = (value & 0xFFFF);
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}
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}
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return errmsg;
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}
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/* Handle iq10 21-bit jmp offset. */
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static const char *
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parse_jtargq10 (cd, strp, opindex, reloc, type_addr, valuep)
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CGEN_CPU_DESC cd;
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const char **strp;
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int opindex;
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int reloc ATTRIBUTE_UNUSED;
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enum cgen_parse_operand_result *type_addr ATTRIBUTE_UNUSED;
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bfd_vma *valuep;
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{
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const char *errmsg;
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bfd_vma value;
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enum cgen_parse_operand_result result_type = CGEN_PARSE_OPERAND_RESULT_NUMBER;
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errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_IQ2000_OFFSET_21,
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&result_type, &value);
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if (errmsg == NULL && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
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{
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/* Check value is within 23-bits (remembering that 2-bit shift right will occur). */
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if (value > 0x7fffff)
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return _("21-bit offset out of range");
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}
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*valuep = (value & 0x7FFFFF);
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return errmsg;
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}
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/* Handle high(). */
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static const char *
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parse_hi16 (cd, strp, opindex, valuep)
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CGEN_CPU_DESC cd;
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const char **strp;
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int opindex;
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unsigned long *valuep;
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{
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if (strncasecmp (*strp, "%hi(", 4) == 0)
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{
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enum cgen_parse_operand_result result_type;
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bfd_vma value;
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const char *errmsg;
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*strp += 4;
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errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_HI16,
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&result_type, &value);
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if (**strp != ')')
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return _("missing `)'");
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++*strp;
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if (errmsg == NULL
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&& result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
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{
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/* if value has top-bit of %lo on, then it will
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sign-propagate and so we compensate by adding
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1 to the resultant %hi value */
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if (value & 0x8000)
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value += 0x10000;
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value >>= 16;
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}
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*valuep = value;
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return errmsg;
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}
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/* we add %uhi in case a user just wants the high 16-bits or is using
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an insn like ori for %lo which does not sign-propagate */
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if (strncasecmp (*strp, "%uhi(", 5) == 0)
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{
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enum cgen_parse_operand_result result_type;
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bfd_vma value;
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const char *errmsg;
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*strp += 5;
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errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_IQ2000_UHI16,
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&result_type, &value);
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if (**strp != ')')
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return _("missing `)'");
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++*strp;
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if (errmsg == NULL
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&& result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
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{
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value >>= 16;
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}
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*valuep = value;
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return errmsg;
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}
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return parse_imm (cd, strp, opindex, valuep);
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}
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/* Handle %lo in a signed context.
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The signedness of the value doesn't matter to %lo(), but this also
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handles the case where %lo() isn't present. */
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static const char *
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parse_lo16 (cd, strp, opindex, valuep)
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CGEN_CPU_DESC cd;
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const char **strp;
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int opindex;
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long *valuep;
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{
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if (strncasecmp (*strp, "%lo(", 4) == 0)
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{
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const char *errmsg;
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enum cgen_parse_operand_result result_type;
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bfd_vma value;
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*strp += 4;
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errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_LO16,
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&result_type, &value);
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if (**strp != ')')
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return _("missing `)'");
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++*strp;
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if (errmsg == NULL
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&& result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
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value &= 0xffff;
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*valuep = value;
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return errmsg;
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}
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return parse_imm (cd, strp, opindex, valuep);
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}
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/* Handle %lo in a negated signed context.
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The signedness of the value doesn't matter to %lo(), but this also
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handles the case where %lo() isn't present. */
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static const char *
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parse_mlo16 (cd, strp, opindex, valuep)
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CGEN_CPU_DESC cd;
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const char **strp;
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int opindex;
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long *valuep;
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{
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if (strncasecmp (*strp, "%lo(", 4) == 0)
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{
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const char *errmsg;
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enum cgen_parse_operand_result result_type;
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bfd_vma value;
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*strp += 4;
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errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_LO16,
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&result_type, &value);
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if (**strp != ')')
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return _("missing `)'");
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++*strp;
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if (errmsg == NULL
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&& result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
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value = (-value) & 0xffff;
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*valuep = value;
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return errmsg;
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}
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return parse_mimm (cd, strp, opindex, valuep);
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}
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/* -- */
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const char * iq2000_cgen_parse_operand
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PARAMS ((CGEN_CPU_DESC, int, const char **, CGEN_FIELDS *));
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/* Main entry point for operand parsing.
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This function is basically just a big switch statement. Earlier versions
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used tables to look up the function to use, but
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- if the table contains both assembler and disassembler functions then
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the disassembler contains much of the assembler and vice-versa,
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- there's a lot of inlining possibilities as things grow,
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- using a switch statement avoids the function call overhead.
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This function could be moved into `parse_insn_normal', but keeping it
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separate makes clear the interface between `parse_insn_normal' and each of
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the handlers. */
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const char *
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iq2000_cgen_parse_operand (cd, opindex, strp, fields)
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CGEN_CPU_DESC cd;
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int opindex;
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const char ** strp;
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CGEN_FIELDS * fields;
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{
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const char * errmsg = NULL;
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/* Used by scalar operands that still need to be parsed. */
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long junk ATTRIBUTE_UNUSED;
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switch (opindex)
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{
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case IQ2000_OPERAND__INDEX :
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errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND__INDEX, &fields->f_index);
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break;
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case IQ2000_OPERAND_BASE :
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errmsg = cgen_parse_keyword (cd, strp, & iq2000_cgen_opval_gr_names, & fields->f_rs);
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break;
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case IQ2000_OPERAND_BASEOFF :
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{
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bfd_vma value;
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errmsg = cgen_parse_address (cd, strp, IQ2000_OPERAND_BASEOFF, 0, NULL, & value);
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fields->f_imm = value;
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}
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break;
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case IQ2000_OPERAND_BITNUM :
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errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_BITNUM, &fields->f_rt);
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break;
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case IQ2000_OPERAND_BYTECOUNT :
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errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_BYTECOUNT, &fields->f_bytecount);
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break;
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case IQ2000_OPERAND_CAM_Y :
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errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_CAM_Y, &fields->f_cam_y);
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break;
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case IQ2000_OPERAND_CAM_Z :
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errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_CAM_Z, &fields->f_cam_z);
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break;
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case IQ2000_OPERAND_CM_3FUNC :
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errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_CM_3FUNC, &fields->f_cm_3func);
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break;
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case IQ2000_OPERAND_CM_3Z :
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errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_CM_3Z, &fields->f_cm_3z);
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break;
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case IQ2000_OPERAND_CM_4FUNC :
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errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_CM_4FUNC, &fields->f_cm_4func);
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break;
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case IQ2000_OPERAND_CM_4Z :
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errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_CM_4Z, &fields->f_cm_4z);
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break;
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case IQ2000_OPERAND_COUNT :
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errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_COUNT, &fields->f_count);
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break;
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case IQ2000_OPERAND_EXECODE :
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errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_EXECODE, &fields->f_excode);
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break;
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case IQ2000_OPERAND_HI16 :
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errmsg = parse_hi16 (cd, strp, IQ2000_OPERAND_HI16, &fields->f_imm);
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break;
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case IQ2000_OPERAND_IMM :
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errmsg = parse_imm (cd, strp, IQ2000_OPERAND_IMM, &fields->f_imm);
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break;
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case IQ2000_OPERAND_JMPTARG :
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{
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bfd_vma value;
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errmsg = cgen_parse_address (cd, strp, IQ2000_OPERAND_JMPTARG, 0, NULL, & value);
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fields->f_jtarg = value;
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}
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break;
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case IQ2000_OPERAND_JMPTARGQ10 :
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{
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bfd_vma value;
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errmsg = parse_jtargq10 (cd, strp, IQ2000_OPERAND_JMPTARGQ10, 0, NULL, & value);
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fields->f_jtargq10 = value;
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}
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break;
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case IQ2000_OPERAND_LO16 :
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errmsg = parse_lo16 (cd, strp, IQ2000_OPERAND_LO16, &fields->f_imm);
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break;
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case IQ2000_OPERAND_MASK :
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errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_MASK, &fields->f_mask);
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break;
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case IQ2000_OPERAND_MASKL :
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errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_MASKL, &fields->f_maskl);
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break;
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case IQ2000_OPERAND_MASKQ10 :
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errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_MASKQ10, &fields->f_maskq10);
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break;
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case IQ2000_OPERAND_MASKR :
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errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_MASKR, &fields->f_rs);
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break;
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case IQ2000_OPERAND_MLO16 :
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errmsg = parse_mlo16 (cd, strp, IQ2000_OPERAND_MLO16, &fields->f_imm);
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break;
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case IQ2000_OPERAND_OFFSET :
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{
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bfd_vma value;
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errmsg = cgen_parse_address (cd, strp, IQ2000_OPERAND_OFFSET, 0, NULL, & value);
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fields->f_offset = value;
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}
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break;
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case IQ2000_OPERAND_RD :
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errmsg = cgen_parse_keyword (cd, strp, & iq2000_cgen_opval_gr_names, & fields->f_rd);
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break;
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case IQ2000_OPERAND_RD_RS :
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errmsg = cgen_parse_keyword (cd, strp, & iq2000_cgen_opval_gr_names, & fields->f_rd_rs);
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break;
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case IQ2000_OPERAND_RD_RT :
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errmsg = cgen_parse_keyword (cd, strp, & iq2000_cgen_opval_gr_names, & fields->f_rd_rt);
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break;
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case IQ2000_OPERAND_RS :
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errmsg = cgen_parse_keyword (cd, strp, & iq2000_cgen_opval_gr_names, & fields->f_rs);
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break;
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case IQ2000_OPERAND_RT :
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errmsg = cgen_parse_keyword (cd, strp, & iq2000_cgen_opval_gr_names, & fields->f_rt);
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break;
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case IQ2000_OPERAND_RT_RS :
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errmsg = cgen_parse_keyword (cd, strp, & iq2000_cgen_opval_gr_names, & fields->f_rt_rs);
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break;
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case IQ2000_OPERAND_SHAMT :
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errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_SHAMT, &fields->f_shamt);
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break;
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default :
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/* xgettext:c-format */
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fprintf (stderr, _("Unrecognized field %d while parsing.\n"), opindex);
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abort ();
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}
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return errmsg;
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}
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cgen_parse_fn * const iq2000_cgen_parse_handlers[] =
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{
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parse_insn_normal,
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};
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void
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iq2000_cgen_init_asm (cd)
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CGEN_CPU_DESC cd;
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{
|
||
iq2000_cgen_init_opcode_table (cd);
|
||
iq2000_cgen_init_ibld_table (cd);
|
||
cd->parse_handlers = & iq2000_cgen_parse_handlers[0];
|
||
cd->parse_operand = iq2000_cgen_parse_operand;
|
||
}
|
||
|
||
|
||
|
||
/* Regex construction routine.
|
||
|
||
This translates an opcode syntax string into a regex string,
|
||
by replacing any non-character syntax element (such as an
|
||
opcode) with the pattern '.*'
|
||
|
||
It then compiles the regex and stores it in the opcode, for
|
||
later use by iq2000_cgen_assemble_insn
|
||
|
||
Returns NULL for success, an error message for failure. */
|
||
|
||
char *
|
||
iq2000_cgen_build_insn_regex (CGEN_INSN *insn)
|
||
{
|
||
CGEN_OPCODE *opc = (CGEN_OPCODE *) CGEN_INSN_OPCODE (insn);
|
||
const char *mnem = CGEN_INSN_MNEMONIC (insn);
|
||
char rxbuf[CGEN_MAX_RX_ELEMENTS];
|
||
char *rx = rxbuf;
|
||
const CGEN_SYNTAX_CHAR_TYPE *syn;
|
||
int reg_err;
|
||
|
||
syn = CGEN_SYNTAX_STRING (CGEN_OPCODE_SYNTAX (opc));
|
||
|
||
/* Mnemonics come first in the syntax string. */
|
||
if (! CGEN_SYNTAX_MNEMONIC_P (* syn))
|
||
return _("missing mnemonic in syntax string");
|
||
++syn;
|
||
|
||
/* Generate a case sensitive regular expression that emulates case
|
||
insensitive matching in the "C" locale. We cannot generate a case
|
||
insensitive regular expression because in Turkish locales, 'i' and 'I'
|
||
are not equal modulo case conversion. */
|
||
|
||
/* Copy the literal mnemonic out of the insn. */
|
||
for (; *mnem; mnem++)
|
||
{
|
||
char c = *mnem;
|
||
|
||
if (ISALPHA (c))
|
||
{
|
||
*rx++ = '[';
|
||
*rx++ = TOLOWER (c);
|
||
*rx++ = TOUPPER (c);
|
||
*rx++ = ']';
|
||
}
|
||
else
|
||
*rx++ = c;
|
||
}
|
||
|
||
/* Copy any remaining literals from the syntax string into the rx. */
|
||
for(; * syn != 0 && rx <= rxbuf + (CGEN_MAX_RX_ELEMENTS - 7 - 4); ++syn)
|
||
{
|
||
if (CGEN_SYNTAX_CHAR_P (* syn))
|
||
{
|
||
char c = CGEN_SYNTAX_CHAR (* syn);
|
||
|
||
switch (c)
|
||
{
|
||
/* Escape any regex metacharacters in the syntax. */
|
||
case '.': case '[': case '\\':
|
||
case '*': case '^': case '$':
|
||
|
||
#ifdef CGEN_ESCAPE_EXTENDED_REGEX
|
||
case '?': case '{': case '}':
|
||
case '(': case ')': case '*':
|
||
case '|': case '+': case ']':
|
||
#endif
|
||
*rx++ = '\\';
|
||
*rx++ = c;
|
||
break;
|
||
|
||
default:
|
||
if (ISALPHA (c))
|
||
{
|
||
*rx++ = '[';
|
||
*rx++ = TOLOWER (c);
|
||
*rx++ = TOUPPER (c);
|
||
*rx++ = ']';
|
||
}
|
||
else
|
||
*rx++ = c;
|
||
break;
|
||
}
|
||
}
|
||
else
|
||
{
|
||
/* Replace non-syntax fields with globs. */
|
||
*rx++ = '.';
|
||
*rx++ = '*';
|
||
}
|
||
}
|
||
|
||
/* Trailing whitespace ok. */
|
||
* rx++ = '[';
|
||
* rx++ = ' ';
|
||
* rx++ = '\t';
|
||
* rx++ = ']';
|
||
* rx++ = '*';
|
||
|
||
/* But anchor it after that. */
|
||
* rx++ = '$';
|
||
* rx = '\0';
|
||
|
||
CGEN_INSN_RX (insn) = xmalloc (sizeof (regex_t));
|
||
reg_err = regcomp ((regex_t *) CGEN_INSN_RX (insn), rxbuf, REG_NOSUB);
|
||
|
||
if (reg_err == 0)
|
||
return NULL;
|
||
else
|
||
{
|
||
static char msg[80];
|
||
|
||
regerror (reg_err, (regex_t *) CGEN_INSN_RX (insn), msg, 80);
|
||
regfree ((regex_t *) CGEN_INSN_RX (insn));
|
||
free (CGEN_INSN_RX (insn));
|
||
(CGEN_INSN_RX (insn)) = NULL;
|
||
return msg;
|
||
}
|
||
}
|
||
|
||
|
||
/* Default insn parser.
|
||
|
||
The syntax string is scanned and operands are parsed and stored in FIELDS.
|
||
Relocs are queued as we go via other callbacks.
|
||
|
||
??? Note that this is currently an all-or-nothing parser. If we fail to
|
||
parse the instruction, we return 0 and the caller will start over from
|
||
the beginning. Backtracking will be necessary in parsing subexpressions,
|
||
but that can be handled there. Not handling backtracking here may get
|
||
expensive in the case of the m68k. Deal with later.
|
||
|
||
Returns NULL for success, an error message for failure. */
|
||
|
||
static const char *
|
||
parse_insn_normal (CGEN_CPU_DESC cd,
|
||
const CGEN_INSN *insn,
|
||
const char **strp,
|
||
CGEN_FIELDS *fields)
|
||
{
|
||
/* ??? Runtime added insns not handled yet. */
|
||
const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn);
|
||
const char *str = *strp;
|
||
const char *errmsg;
|
||
const char *p;
|
||
const CGEN_SYNTAX_CHAR_TYPE * syn;
|
||
#ifdef CGEN_MNEMONIC_OPERANDS
|
||
/* FIXME: wip */
|
||
int past_opcode_p;
|
||
#endif
|
||
|
||
/* For now we assume the mnemonic is first (there are no leading operands).
|
||
We can parse it without needing to set up operand parsing.
|
||
GAS's input scrubber will ensure mnemonics are lowercase, but we may
|
||
not be called from GAS. */
|
||
p = CGEN_INSN_MNEMONIC (insn);
|
||
while (*p && TOLOWER (*p) == TOLOWER (*str))
|
||
++p, ++str;
|
||
|
||
if (* p)
|
||
return _("unrecognized instruction");
|
||
|
||
#ifndef CGEN_MNEMONIC_OPERANDS
|
||
if (* str && ! ISSPACE (* str))
|
||
return _("unrecognized instruction");
|
||
#endif
|
||
|
||
CGEN_INIT_PARSE (cd);
|
||
cgen_init_parse_operand (cd);
|
||
#ifdef CGEN_MNEMONIC_OPERANDS
|
||
past_opcode_p = 0;
|
||
#endif
|
||
|
||
/* We don't check for (*str != '\0') here because we want to parse
|
||
any trailing fake arguments in the syntax string. */
|
||
syn = CGEN_SYNTAX_STRING (syntax);
|
||
|
||
/* Mnemonics come first for now, ensure valid string. */
|
||
if (! CGEN_SYNTAX_MNEMONIC_P (* syn))
|
||
abort ();
|
||
|
||
++syn;
|
||
|
||
while (* syn != 0)
|
||
{
|
||
/* Non operand chars must match exactly. */
|
||
if (CGEN_SYNTAX_CHAR_P (* syn))
|
||
{
|
||
/* FIXME: While we allow for non-GAS callers above, we assume the
|
||
first char after the mnemonic part is a space. */
|
||
/* FIXME: We also take inappropriate advantage of the fact that
|
||
GAS's input scrubber will remove extraneous blanks. */
|
||
if (TOLOWER (*str) == TOLOWER (CGEN_SYNTAX_CHAR (* syn)))
|
||
{
|
||
#ifdef CGEN_MNEMONIC_OPERANDS
|
||
if (CGEN_SYNTAX_CHAR(* syn) == ' ')
|
||
past_opcode_p = 1;
|
||
#endif
|
||
++ syn;
|
||
++ str;
|
||
}
|
||
else if (*str)
|
||
{
|
||
/* Syntax char didn't match. Can't be this insn. */
|
||
static char msg [80];
|
||
|
||
/* xgettext:c-format */
|
||
sprintf (msg, _("syntax error (expected char `%c', found `%c')"),
|
||
CGEN_SYNTAX_CHAR(*syn), *str);
|
||
return msg;
|
||
}
|
||
else
|
||
{
|
||
/* Ran out of input. */
|
||
static char msg [80];
|
||
|
||
/* xgettext:c-format */
|
||
sprintf (msg, _("syntax error (expected char `%c', found end of instruction)"),
|
||
CGEN_SYNTAX_CHAR(*syn));
|
||
return msg;
|
||
}
|
||
continue;
|
||
}
|
||
|
||
/* We have an operand of some sort. */
|
||
errmsg = cd->parse_operand (cd, CGEN_SYNTAX_FIELD (*syn),
|
||
&str, fields);
|
||
if (errmsg)
|
||
return errmsg;
|
||
|
||
/* Done with this operand, continue with next one. */
|
||
++ syn;
|
||
}
|
||
|
||
/* If we're at the end of the syntax string, we're done. */
|
||
if (* syn == 0)
|
||
{
|
||
/* FIXME: For the moment we assume a valid `str' can only contain
|
||
blanks now. IE: We needn't try again with a longer version of
|
||
the insn and it is assumed that longer versions of insns appear
|
||
before shorter ones (eg: lsr r2,r3,1 vs lsr r2,r3). */
|
||
while (ISSPACE (* str))
|
||
++ str;
|
||
|
||
if (* str != '\0')
|
||
return _("junk at end of line"); /* FIXME: would like to include `str' */
|
||
|
||
return NULL;
|
||
}
|
||
|
||
/* We couldn't parse it. */
|
||
return _("unrecognized instruction");
|
||
}
|
||
|
||
/* Main entry point.
|
||
This routine is called for each instruction to be assembled.
|
||
STR points to the insn to be assembled.
|
||
We assume all necessary tables have been initialized.
|
||
The assembled instruction, less any fixups, is stored in BUF.
|
||
Remember that if CGEN_INT_INSN_P then BUF is an int and thus the value
|
||
still needs to be converted to target byte order, otherwise BUF is an array
|
||
of bytes in target byte order.
|
||
The result is a pointer to the insn's entry in the opcode table,
|
||
or NULL if an error occured (an error message will have already been
|
||
printed).
|
||
|
||
Note that when processing (non-alias) macro-insns,
|
||
this function recurses.
|
||
|
||
??? It's possible to make this cpu-independent.
|
||
One would have to deal with a few minor things.
|
||
At this point in time doing so would be more of a curiosity than useful
|
||
[for example this file isn't _that_ big], but keeping the possibility in
|
||
mind helps keep the design clean. */
|
||
|
||
const CGEN_INSN *
|
||
iq2000_cgen_assemble_insn (CGEN_CPU_DESC cd,
|
||
const char *str,
|
||
CGEN_FIELDS *fields,
|
||
CGEN_INSN_BYTES_PTR buf,
|
||
char **errmsg)
|
||
{
|
||
const char *start;
|
||
CGEN_INSN_LIST *ilist;
|
||
const char *parse_errmsg = NULL;
|
||
const char *insert_errmsg = NULL;
|
||
int recognized_mnemonic = 0;
|
||
|
||
/* Skip leading white space. */
|
||
while (ISSPACE (* str))
|
||
++ str;
|
||
|
||
/* The instructions are stored in hashed lists.
|
||
Get the first in the list. */
|
||
ilist = CGEN_ASM_LOOKUP_INSN (cd, str);
|
||
|
||
/* Keep looking until we find a match. */
|
||
start = str;
|
||
for ( ; ilist != NULL ; ilist = CGEN_ASM_NEXT_INSN (ilist))
|
||
{
|
||
const CGEN_INSN *insn = ilist->insn;
|
||
recognized_mnemonic = 1;
|
||
|
||
#ifdef CGEN_VALIDATE_INSN_SUPPORTED
|
||
/* Not usually needed as unsupported opcodes
|
||
shouldn't be in the hash lists. */
|
||
/* Is this insn supported by the selected cpu? */
|
||
if (! iq2000_cgen_insn_supported (cd, insn))
|
||
continue;
|
||
#endif
|
||
/* If the RELAXED attribute is set, this is an insn that shouldn't be
|
||
chosen immediately. Instead, it is used during assembler/linker
|
||
relaxation if possible. */
|
||
if (CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_RELAXED) != 0)
|
||
continue;
|
||
|
||
str = start;
|
||
|
||
/* Skip this insn if str doesn't look right lexically. */
|
||
if (CGEN_INSN_RX (insn) != NULL &&
|
||
regexec ((regex_t *) CGEN_INSN_RX (insn), str, 0, NULL, 0) == REG_NOMATCH)
|
||
continue;
|
||
|
||
/* Allow parse/insert handlers to obtain length of insn. */
|
||
CGEN_FIELDS_BITSIZE (fields) = CGEN_INSN_BITSIZE (insn);
|
||
|
||
parse_errmsg = CGEN_PARSE_FN (cd, insn) (cd, insn, & str, fields);
|
||
if (parse_errmsg != NULL)
|
||
continue;
|
||
|
||
/* ??? 0 is passed for `pc'. */
|
||
insert_errmsg = CGEN_INSERT_FN (cd, insn) (cd, insn, fields, buf,
|
||
(bfd_vma) 0);
|
||
if (insert_errmsg != NULL)
|
||
continue;
|
||
|
||
/* It is up to the caller to actually output the insn and any
|
||
queued relocs. */
|
||
return insn;
|
||
}
|
||
|
||
{
|
||
static char errbuf[150];
|
||
#ifdef CGEN_VERBOSE_ASSEMBLER_ERRORS
|
||
const char *tmp_errmsg;
|
||
|
||
/* If requesting verbose error messages, use insert_errmsg.
|
||
Failing that, use parse_errmsg. */
|
||
tmp_errmsg = (insert_errmsg ? insert_errmsg :
|
||
parse_errmsg ? parse_errmsg :
|
||
recognized_mnemonic ?
|
||
_("unrecognized form of instruction") :
|
||
_("unrecognized instruction"));
|
||
|
||
if (strlen (start) > 50)
|
||
/* xgettext:c-format */
|
||
sprintf (errbuf, "%s `%.50s...'", tmp_errmsg, start);
|
||
else
|
||
/* xgettext:c-format */
|
||
sprintf (errbuf, "%s `%.50s'", tmp_errmsg, start);
|
||
#else
|
||
if (strlen (start) > 50)
|
||
/* xgettext:c-format */
|
||
sprintf (errbuf, _("bad instruction `%.50s...'"), start);
|
||
else
|
||
/* xgettext:c-format */
|
||
sprintf (errbuf, _("bad instruction `%.50s'"), start);
|
||
#endif
|
||
|
||
*errmsg = errbuf;
|
||
return NULL;
|
||
}
|
||
}
|
||
|
||
#if 0 /* This calls back to GAS which we can't do without care. */
|
||
|
||
/* Record each member of OPVALS in the assembler's symbol table.
|
||
This lets GAS parse registers for us.
|
||
??? Interesting idea but not currently used. */
|
||
|
||
/* Record each member of OPVALS in the assembler's symbol table.
|
||
FIXME: Not currently used. */
|
||
|
||
void
|
||
iq2000_cgen_asm_hash_keywords (CGEN_CPU_DESC cd, CGEN_KEYWORD *opvals)
|
||
{
|
||
CGEN_KEYWORD_SEARCH search = cgen_keyword_search_init (opvals, NULL);
|
||
const CGEN_KEYWORD_ENTRY * ke;
|
||
|
||
while ((ke = cgen_keyword_search_next (& search)) != NULL)
|
||
{
|
||
#if 0 /* Unnecessary, should be done in the search routine. */
|
||
if (! iq2000_cgen_opval_supported (ke))
|
||
continue;
|
||
#endif
|
||
cgen_asm_record_register (cd, ke->name, ke->value);
|
||
}
|
||
}
|
||
|
||
#endif /* 0 */
|