603 lines
15 KiB
C
603 lines
15 KiB
C
/* Caching code.
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Copyright 1992, 1993, 1995, 1996, 1998, 1999, 2000, 2001
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Free Software Foundation, Inc.
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This file is part of GDB.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 59 Temple Place - Suite 330,
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Boston, MA 02111-1307, USA. */
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#include "defs.h"
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#include "dcache.h"
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#include "gdbcmd.h"
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#include "gdb_string.h"
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#include "gdbcore.h"
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#include "target.h"
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/* The data cache could lead to incorrect results because it doesn't
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know about volatile variables, thus making it impossible to debug
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functions which use memory mapped I/O devices. Set the nocache
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memory region attribute in those cases.
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In general the dcache speeds up performance, some speed improvement
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comes from the actual caching mechanism, but the major gain is in
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the reduction of the remote protocol overhead; instead of reading
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or writing a large area of memory in 4 byte requests, the cache
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bundles up the requests into 32 byte (actually LINE_SIZE) chunks.
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Reducing the overhead to an eighth of what it was. This is very
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obvious when displaying a large amount of data,
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eg, x/200x 0
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caching | no yes
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----------------------------
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first time | 4 sec 2 sec improvement due to chunking
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second time | 4 sec 0 sec improvement due to caching
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The cache structure is unusual, we keep a number of cache blocks
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(DCACHE_SIZE) and each one caches a LINE_SIZEed area of memory.
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Within each line we remember the address of the line (always a
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multiple of the LINE_SIZE) and a vector of bytes over the range.
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There's another vector which contains the state of the bytes.
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ENTRY_BAD means that the byte is just plain wrong, and has no
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correspondence with anything else (as it would when the cache is
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turned on, but nothing has been done to it.
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ENTRY_DIRTY means that the byte has some data in it which should be
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written out to the remote target one day, but contains correct
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data.
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ENTRY_OK means that the data is the same in the cache as it is in
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remote memory.
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The ENTRY_DIRTY state is necessary because GDB likes to write large
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lumps of memory in small bits. If the caching mechanism didn't
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maintain the DIRTY information, then something like a two byte
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write would mean that the entire cache line would have to be read,
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the two bytes modified and then written out again. The alternative
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would be to not read in the cache line in the first place, and just
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write the two bytes directly into target memory. The trouble with
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that is that it really nails performance, because of the remote
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protocol overhead. This way, all those little writes are bundled
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up into an entire cache line write in one go, without having to
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read the cache line in the first place.
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*/
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/* NOTE: Interaction of dcache and memory region attributes
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As there is no requirement that memory region attributes be aligned
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to or be a multiple of the dcache page size, dcache_read_line() and
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dcache_write_line() must break up the page by memory region. If a
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chunk does not have the cache attribute set, an invalid memory type
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is set, etc., then the chunk is skipped. Those chunks are handled
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in target_xfer_memory() (or target_xfer_memory_partial()).
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This doesn't occur very often. The most common occurance is when
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the last bit of the .text segment and the first bit of the .data
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segment fall within the same dcache page with a ro/cacheable memory
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region defined for the .text segment and a rw/non-cacheable memory
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region defined for the .data segment. */
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/* This value regulates the number of cache blocks stored.
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Smaller values reduce the time spent searching for a cache
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line, and reduce memory requirements, but increase the risk
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of a line not being in memory */
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#define DCACHE_SIZE 64
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/* This value regulates the size of a cache line. Smaller values
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reduce the time taken to read a single byte, but reduce overall
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throughput. */
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#define LINE_SIZE_POWER (5)
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#define LINE_SIZE (1 << LINE_SIZE_POWER)
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/* Each cache block holds LINE_SIZE bytes of data
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starting at a multiple-of-LINE_SIZE address. */
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#define LINE_SIZE_MASK ((LINE_SIZE - 1))
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#define XFORM(x) ((x) & LINE_SIZE_MASK)
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#define MASK(x) ((x) & ~LINE_SIZE_MASK)
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#define ENTRY_BAD 0 /* data at this byte is wrong */
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#define ENTRY_DIRTY 1 /* data at this byte needs to be written back */
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#define ENTRY_OK 2 /* data at this byte is same as in memory */
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struct dcache_block
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{
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struct dcache_block *p; /* next in list */
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CORE_ADDR addr; /* Address for which data is recorded. */
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char data[LINE_SIZE]; /* bytes at given address */
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unsigned char state[LINE_SIZE]; /* what state the data is in */
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/* whether anything in state is dirty - used to speed up the
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dirty scan. */
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int anydirty;
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int refs;
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};
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/* FIXME: dcache_struct used to have a cache_has_stuff field that was
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used to record whether the cache had been accessed. This was used
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to invalidate the cache whenever caching was (re-)enabled (if the
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cache was disabled and later re-enabled, it could contain stale
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data). This was not needed because the cache is write through and
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the code that enables, disables, and deletes memory region all
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invalidate the cache.
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This is overkill, since it also invalidates cache lines from
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unrelated regions. One way this could be addressed by adding a
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new function that takes an address and a length and invalidates
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only those cache lines that match. */
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struct dcache_struct
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{
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/* free list */
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struct dcache_block *free_head;
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struct dcache_block *free_tail;
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/* in use list */
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struct dcache_block *valid_head;
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struct dcache_block *valid_tail;
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/* The cache itself. */
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struct dcache_block *the_cache;
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};
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static int dcache_poke_byte (DCACHE *dcache, CORE_ADDR addr, char *ptr);
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static int dcache_peek_byte (DCACHE *dcache, CORE_ADDR addr, char *ptr);
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static struct dcache_block *dcache_hit (DCACHE *dcache, CORE_ADDR addr);
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static int dcache_write_line (DCACHE *dcache, struct dcache_block *db);
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static int dcache_read_line (DCACHE *dcache, struct dcache_block *db);
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static struct dcache_block *dcache_alloc (DCACHE *dcache, CORE_ADDR addr);
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static int dcache_writeback (DCACHE *dcache);
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static void dcache_info (char *exp, int tty);
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void _initialize_dcache (void);
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static int dcache_enabled_p = 0;
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DCACHE *last_cache; /* Used by info dcache */
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/* Free all the data cache blocks, thus discarding all cached data. */
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void
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dcache_invalidate (DCACHE *dcache)
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{
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int i;
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dcache->valid_head = 0;
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dcache->valid_tail = 0;
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dcache->free_head = 0;
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dcache->free_tail = 0;
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for (i = 0; i < DCACHE_SIZE; i++)
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{
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struct dcache_block *db = dcache->the_cache + i;
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if (!dcache->free_head)
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dcache->free_head = db;
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else
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dcache->free_tail->p = db;
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dcache->free_tail = db;
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db->p = 0;
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}
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return;
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}
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/* If addr is present in the dcache, return the address of the block
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containing it. */
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static struct dcache_block *
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dcache_hit (DCACHE *dcache, CORE_ADDR addr)
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{
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register struct dcache_block *db;
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/* Search all cache blocks for one that is at this address. */
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db = dcache->valid_head;
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while (db)
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{
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if (MASK (addr) == db->addr)
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{
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db->refs++;
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return db;
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}
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db = db->p;
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}
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return NULL;
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}
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/* Make sure that anything in this line which needs to
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be written is. */
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static int
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dcache_write_line (DCACHE *dcache, register struct dcache_block *db)
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{
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CORE_ADDR memaddr;
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char *myaddr;
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int len;
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int res;
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int reg_len;
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struct mem_region *region;
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if (!db->anydirty)
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return 1;
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len = LINE_SIZE;
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memaddr = db->addr;
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myaddr = db->data;
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while (len > 0)
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{
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int s;
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int e;
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int dirty_len;
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region = lookup_mem_region(memaddr);
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if (memaddr + len < region->hi)
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reg_len = len;
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else
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reg_len = region->hi - memaddr;
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if (!region->attrib.cache || region->attrib.mode == MEM_RO)
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{
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memaddr += reg_len;
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myaddr += reg_len;
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len -= reg_len;
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continue;
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}
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while (reg_len > 0)
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{
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s = XFORM(memaddr);
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while (reg_len > 0) {
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if (db->state[s] == ENTRY_DIRTY)
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break;
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s++;
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reg_len--;
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memaddr++;
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myaddr++;
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len--;
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}
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e = s;
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while (reg_len > 0) {
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if (db->state[e] != ENTRY_DIRTY)
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break;
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e++;
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reg_len--;
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}
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dirty_len = e - s;
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while (dirty_len > 0)
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{
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res = do_xfer_memory(memaddr, myaddr, dirty_len, 1,
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®ion->attrib);
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if (res <= 0)
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return 0;
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memset (&db->state[XFORM(memaddr)], ENTRY_OK, res);
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memaddr += res;
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myaddr += res;
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len -= res;
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dirty_len -= res;
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}
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}
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}
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db->anydirty = 0;
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return 1;
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}
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/* Read cache line */
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static int
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dcache_read_line (DCACHE *dcache, struct dcache_block *db)
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{
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CORE_ADDR memaddr;
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char *myaddr;
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int len;
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int res;
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int reg_len;
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struct mem_region *region;
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/* If there are any dirty bytes in the line, it must be written
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before a new line can be read */
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if (db->anydirty)
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{
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if (!dcache_write_line (dcache, db))
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return 0;
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}
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len = LINE_SIZE;
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memaddr = db->addr;
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myaddr = db->data;
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while (len > 0)
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{
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region = lookup_mem_region(memaddr);
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if (memaddr + len < region->hi)
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reg_len = len;
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else
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reg_len = region->hi - memaddr;
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if (!region->attrib.cache || region->attrib.mode == MEM_WO)
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{
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memaddr += reg_len;
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myaddr += reg_len;
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len -= reg_len;
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continue;
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}
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while (reg_len > 0)
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{
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res = do_xfer_memory (memaddr, myaddr, reg_len, 0,
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®ion->attrib);
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if (res <= 0)
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return 0;
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memaddr += res;
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myaddr += res;
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len -= res;
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reg_len -= res;
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}
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}
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memset (db->state, ENTRY_OK, sizeof (db->data));
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db->anydirty = 0;
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return 1;
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}
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/* Get a free cache block, put or keep it on the valid list,
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and return its address. */
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static struct dcache_block *
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dcache_alloc (DCACHE *dcache, CORE_ADDR addr)
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{
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register struct dcache_block *db;
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/* Take something from the free list */
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db = dcache->free_head;
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if (db)
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{
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dcache->free_head = db->p;
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}
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else
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{
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/* Nothing left on free list, so grab one from the valid list */
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db = dcache->valid_head;
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if (!dcache_write_line (dcache, db))
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return NULL;
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dcache->valid_head = db->p;
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}
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db->addr = MASK(addr);
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db->refs = 0;
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db->anydirty = 0;
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memset (db->state, ENTRY_BAD, sizeof (db->data));
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/* append this line to end of valid list */
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if (!dcache->valid_head)
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dcache->valid_head = db;
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else
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dcache->valid_tail->p = db;
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dcache->valid_tail = db;
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db->p = 0;
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return db;
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}
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/* Writeback any dirty lines. */
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static int
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dcache_writeback (DCACHE *dcache)
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{
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struct dcache_block *db;
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db = dcache->valid_head;
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while (db)
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{
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if (!dcache_write_line (dcache, db))
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return 0;
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db = db->p;
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}
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return 1;
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}
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/* Using the data cache DCACHE return the contents of the byte at
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address ADDR in the remote machine.
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Returns 0 on error. */
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static int
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dcache_peek_byte (DCACHE *dcache, CORE_ADDR addr, char *ptr)
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{
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register struct dcache_block *db = dcache_hit (dcache, addr);
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if (!db)
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{
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db = dcache_alloc (dcache, addr);
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if (!db)
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return 0;
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}
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if (db->state[XFORM (addr)] == ENTRY_BAD)
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{
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if (!dcache_read_line(dcache, db))
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return 0;
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}
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*ptr = db->data[XFORM (addr)];
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return 1;
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}
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/* Write the byte at PTR into ADDR in the data cache.
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Return zero on write error.
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*/
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static int
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dcache_poke_byte (DCACHE *dcache, CORE_ADDR addr, char *ptr)
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{
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register struct dcache_block *db = dcache_hit (dcache, addr);
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if (!db)
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{
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db = dcache_alloc (dcache, addr);
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if (!db)
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return 0;
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}
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db->data[XFORM (addr)] = *ptr;
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db->state[XFORM (addr)] = ENTRY_DIRTY;
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db->anydirty = 1;
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return 1;
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}
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/* Initialize the data cache. */
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DCACHE *
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dcache_init (void)
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{
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int csize = sizeof (struct dcache_block) * DCACHE_SIZE;
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DCACHE *dcache;
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dcache = (DCACHE *) xmalloc (sizeof (*dcache));
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dcache->the_cache = (struct dcache_block *) xmalloc (csize);
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memset (dcache->the_cache, 0, csize);
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dcache_invalidate (dcache);
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last_cache = dcache;
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return dcache;
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}
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/* Free a data cache */
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void
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dcache_free (DCACHE *dcache)
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{
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if (last_cache == dcache)
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last_cache = NULL;
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xfree (dcache->the_cache);
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xfree (dcache);
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}
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/* Read or write LEN bytes from inferior memory at MEMADDR, transferring
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to or from debugger address MYADDR. Write to inferior if SHOULD_WRITE is
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nonzero.
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Returns length of data written or read; 0 for error.
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This routine is indended to be called by remote_xfer_ functions. */
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int
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dcache_xfer_memory (DCACHE *dcache, CORE_ADDR memaddr, char *myaddr, int len,
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int should_write)
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{
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int i;
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int (*xfunc) (DCACHE *dcache, CORE_ADDR addr, char *ptr);
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xfunc = should_write ? dcache_poke_byte : dcache_peek_byte;
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for (i = 0; i < len; i++)
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{
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if (!xfunc (dcache, memaddr + i, myaddr + i))
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return 0;
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}
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/* FIXME: There may be some benefit from moving the cache writeback
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to a higher layer, as it could occur after a sequence of smaller
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writes have been completed (as when a stack frame is constructed
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for an inferior function call). Note that only moving it up one
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level to target_xfer_memory() (also target_xfer_memory_partial())
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is not sufficent, since we want to coalesce memory transfers that
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are "logically" connected but not actually a single call to one
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of the memory transfer functions. */
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if (should_write)
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dcache_writeback (dcache);
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return len;
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}
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static void
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dcache_info (char *exp, int tty)
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{
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struct dcache_block *p;
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printf_filtered ("Dcache line width %d, depth %d\n",
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LINE_SIZE, DCACHE_SIZE);
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if (last_cache)
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{
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printf_filtered ("Cache state:\n");
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for (p = last_cache->valid_head; p; p = p->p)
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{
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int j;
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printf_filtered ("Line at %s, referenced %d times\n",
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paddr (p->addr), p->refs);
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for (j = 0; j < LINE_SIZE; j++)
|
|
printf_filtered ("%02x", p->data[j] & 0xFF);
|
|
printf_filtered ("\n");
|
|
|
|
for (j = 0; j < LINE_SIZE; j++)
|
|
printf_filtered ("%2x", p->state[j]);
|
|
printf_filtered ("\n");
|
|
}
|
|
}
|
|
}
|
|
|
|
void
|
|
_initialize_dcache (void)
|
|
{
|
|
add_show_from_set
|
|
(add_set_cmd ("remotecache", class_support, var_boolean,
|
|
(char *) &dcache_enabled_p,
|
|
"\
|
|
Set cache use for remote targets.\n\
|
|
When on, use data caching for remote targets. For many remote targets\n\
|
|
this option can offer better throughput for reading target memory.\n\
|
|
Unfortunately, gdb does not currently know anything about volatile\n\
|
|
registers and thus data caching will produce incorrect results with\n\
|
|
volatile registers are in use. By default, this option is off.",
|
|
&setlist),
|
|
&showlist);
|
|
|
|
add_info ("dcache", dcache_info,
|
|
"Print information on the dcache performance.");
|
|
|
|
}
|