8e394ffc7a
2015-09-25 Andrew Bennett <andrew.bennett@imgtec.com>
Ali Lown <ali.lown@imgtec.com>
sim/common/
* sim-bits.h (EXTEND6): New macro.
(EXTEND12): New macro.
(EXTEND25): New macro.
sim/mips/
* Makefile.in (tmp-micromips): New rule.
(tmp-mach-multi): Add support for micromips.
* configure.ac (mips*-sde-elf* | mips*-mti-elf*): Made a multi sim
that works for both mips64 and micromips64.
(mipsisa32r2*-*-*): Made a multi sim that works for mips32 and
micromips32.
Add build support for micromips.
* dsp.igen (do_ph_s_absq, do_w_s_absq, do_qb_s_absq, do_addsc,
do_addwc, do_bitrev, do_extpv, do_extrv, do_extrv_s_h, do_insv,
do_lxx do_modsub, do_mthlip, do_mulsaq_s_w_ph, do_ph_packrl, do_qb_pick
do_ph_pick, do_qb_ph_precequ, do_qb_ph_preceu, do_w_preceq
do_w_ph_precrq, do_ph_qb_precrq, do_w_ph_rs_precrq do_qb_w_raddu,
do_rddsp, do_repl, do_shilov, do_ph_shl, do_qb_shl do_w_s_shllv,
do_ph_shrlv, do_w_r_shrav, do_wrdsp, do_qb_shrav, do_append,
do_balign, do_ph_w_mulsa, do_ph_qb_precr, do_prepend): New functions.
Refactored instruction code to use these functions.
* dsp2.igen: Refactored instruction code to use the new functions.
* interp.c (decode_coproc): Refactored to work with any instruction
encoding.
(isa_mode): New variable
(RSVD_INSTRUCTION): Changed to 0x00000039.
* m16.igen (BREAK16): Refactored instruction to use do_break16.
(JALX32): Add mips32, mips64, mips32r2 and mips64r2 models.
* micromips.dc: New file.
* micromips.igen: New file.
* micromips16.dc: New file.
* micromipsdsp.igen: New file.
* micromipsrun.c: New file.
* mips.igen (do_swc1): Changed to work with any instruction encoding.
(do_add do_addi do_andi do_dadd do_daddi do_dsll32 do_dsra32
do_dsrl32, do_dsub, do_break, do_break16, do_clo, do_clz, do_dclo
do_dclz, do_lb, do_lh, do_lwr, do_lwl, do_lwc, do_lw, do_lwu, do_lhu
do_ldc, do_lbu, do_ll, do_lld, do_lui, do_madd, do_dsp_madd, do_maddu
do_dsp_maddu, do_dsp_mfhi, do_dsp_mflo, do_movn, do_movz, do_msub
do_dsp_msub, do_msubu, do_dsp_msubu, do_mthi, do_dsp_mthi, do_mtlo
do_dsp_mtlo, do_mul, do_dsp_mult, do_dsp_multu, do_pref, do_sc, do_scd
do_sub, do_sw, do_teq, do_teqi, do_tge, do_tgei, do_tgeiu, do_tgeu, do_tlt
do_tlti, do_tltiu, do_tltu, do_tne, do_tnei, do_abs_fmt, do_add_fmt
do_alnv_ps, do_c_cond_fmt, do_ceil_fmt, do_cfc1, do_ctc1, do_cvt_d_fmt
do_cvt_l_fmt, do_cvt_ps_s, do_cvt_s_fmt, do_cvt_s_pl, do_cvt_s_pu
do_cvt_w_fmt, do_div_fmt, do_dmfc1b, do_dmtc1b, do_floor_fmt, do_luxc1_32
do_luxc1_64, do_lwc1, do_lwxc1, do_madd_fmt, do_mfc1b, do_mov_fmt, do_movtf
do_movtf_fmt, do_movn_fmt, do_movz_fmt, do_msub_fmt, do_mtc1b, do_mul_fmt
do_neg_fmt, do_nmadd_fmt, do_nmsub_fmt, do_pll_ps, do_plu_ps, do_pul_ps
do_puu_ps, do_recip_fmt, do_round_fmt, do_rsqrt_fmt, do_prefx, do_sdc1
do_suxc1_32, do_suxc1_64, do_sqrt_fmt, do_sub_fmt, do_swc1, do_swxc1
do_trunc_fmt): New functions, refactored from existing instructions.
Refactored instruction code to use these functions.
(RSVD): Changed to use new reserved instruction.
(loadstore_ea, not_word_value, unpredictable, check_mt_hilo, check_mf_hilo,
check_mult_hilo, check_div_hilo, check_u64, do_luxc1_32, do_sdc1, do_suxc1_32,
check_fmt_p, check_fpu, do_load_double, do_store_double): Added micromips32
and micromips64 models.
Added include for micromips.igen and micromipsdsp.igen
Add micromips32 and micromips64 models.
(DecodeCoproc): Updated to use new macro definition.
* mips3264r2.igen (do_dsbh, do_dshd, do_dext, do_dextm, do_dextu, do_di,
do_dins, do_dinsm, do_ei, do_ext, do_mfhc1, do_mthc1, do_ins, do_dinsu,
do_seb, do_seh do_rdhwr, do_wsbh): New functions.
Refactored instruction code to use these functions.
* sim-main.h (CP0_operation): New enum.
(DecodeCoproc): Updated macro.
(IMEM32_MICROMIPS, IMEM16_MICROMIPS, MICROMIPS_MINOR_OPCODE,
MICROMIPS_DELAYSLOT_SIZE_ANY, MICROMIPS_DELAYSLOT_SIZE_16, MICROMIPS_DELAYSLOT_SIZE_32,
ISA_MODE_MIPS32 and ISA_MODE_MICROMIPS): New defines.
(sim_state): Add isa_mode field.
sim/testsuite/sim/mips/
* basic.exp (run_micromips_test, run_sim_tests): New functions
Add support for micromips tests.
* hilo-hazard-4.s: New file.
* testutils.inc (_dowrite): Changed reserved instruction encoding.
(writemsg): Moved the la and li instructions before the data they are
assigned to, which prevents a bug where MIPS32 relocations are used instead
of micromips relocations when building for micromips.
611 lines
19 KiB
C
611 lines
19 KiB
C
/* The common simulator framework for GDB, the GNU Debugger.
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Copyright 2002-2015 Free Software Foundation, Inc.
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Contributed by Andrew Cagney and Red Hat.
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This file is part of GDB.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>. */
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#ifndef SIM_BITS_H
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#define SIM_BITS_H
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/* Bit manipulation routines:
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Bit numbering: The bits are numbered according to the target ISA's
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convention. That being controlled by WITH_TARGET_WORD_MSB. For
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the PowerPC (WITH_TARGET_WORD_MSB == 0) the numbering is 0..31
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while for the MIPS (WITH_TARGET_WORD_MSB == 31) it is 31..0.
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Size convention: Each macro is in three forms - <MACRO>32 which
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operates in 32bit quantity (bits are numbered 0..31); <MACRO>64
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which operates using 64bit quantites (and bits are numbered 0..63);
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and <MACRO> which operates using the bit size of the target
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architecture (bits are still numbered 0..63), with 32bit
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architectures ignoring the first 32bits leaving bit 32 as the most
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significant.
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NB: Use EXTRACTED, MSEXTRACTED and LSEXTRACTED as a guideline for
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naming. LSMASK and LSMASKED are wrong.
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BIT*(POS): `*' bit constant with just 1 bit set.
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LSBIT*(OFFSET): `*' bit constant with just 1 bit set - LS bit is
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zero.
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MSBIT*(OFFSET): `*' bit constant with just 1 bit set - MS bit is
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zero.
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MASK*(FIRST, LAST): `*' bit constant with bits [FIRST .. LAST]
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set. The <MACRO> (no size) version permits FIRST >= LAST and
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generates a wrapped bit mask vis ([0..LAST] | [FIRST..LSB]).
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LSMASK*(FIRST, LAST): Like MASK - LS bit is zero.
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MSMASK*(FIRST, LAST): Like MASK - LS bit is zero.
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MASKED*(VALUE, FIRST, LAST): Masks out all but bits [FIRST
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.. LAST].
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LSMASKED*(VALUE, FIRST, LAST): Like MASKED - LS bit is zero.
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MSMASKED*(VALUE, FIRST, LAST): Like MASKED - MS bit is zero.
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EXTRACTED*(VALUE, FIRST, LAST): Masks out bits [FIRST .. LAST] but
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also right shifts the masked value so that bit LAST becomes the
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least significant (right most).
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LSEXTRACTED*(VALUE, FIRST, LAST): Same as extracted - LS bit is
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zero.
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MSEXTRACTED*(VALUE, FIRST, LAST): Same as extracted - MS bit is
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zero.
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SHUFFLED**(VALUE, OLD, NEW): Mask then move a single bit from OLD
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new NEW.
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MOVED**(VALUE, OLD_FIRST, OLD_LAST, NEW_FIRST, NEW_LAST): Moves
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things around so that bits OLD_FIRST..OLD_LAST are masked then
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moved to NEW_FIRST..NEW_LAST.
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INSERTED*(VALUE, FIRST, LAST): Takes VALUE and `inserts' the (LAST
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- FIRST + 1) least significant bits into bit positions [ FIRST
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.. LAST ]. This is almost the complement to EXTRACTED.
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IEA_MASKED(SHOULD_MASK, ADDR): Convert the address to the targets
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natural size. If in 32bit mode, discard the high 32bits.
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EXTEND*(VALUE): Convert the `*' bit value to the targets natural
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word size. Sign extend the value if needed.
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ALIGN_*(VALUE): Round the value upwards so that it is aligned to a
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`_*' byte boundary.
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FLOOR_*(VALUE): Truncate the value so that it is aligned to a `_*'
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byte boundary.
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ROT*(VALUE, NR_BITS): Return the `*' bit VALUE rotated by NR_BITS
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right (positive) or left (negative).
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ROTL*(VALUE, NR_BITS): Return the `*' bit value rotated by NR_BITS
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left. 0 <= NR_BITS <= `*'.
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ROTR*(VALUE, NR_BITS): Return the `*' bit value rotated by NR_BITS
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right. 0 <= NR_BITS <= N.
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SEXT*(VALUE, SIGN_BIT): Treat SIGN_BIT as VALUEs sign, extend it ti
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`*' bits.
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Note: Only the BIT* and MASK* macros return a constant that can be
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used in variable declarations.
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*/
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/* compute the number of bits between START and STOP */
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#if (WITH_TARGET_WORD_MSB == 0)
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#define _MAKE_WIDTH(START, STOP) (STOP - START + 1)
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#else
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#define _MAKE_WIDTH(START, STOP) (START - STOP + 1)
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#endif
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/* compute the number shifts required to move a bit between LSB (MSB)
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and POS */
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#if (WITH_TARGET_WORD_MSB == 0)
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#define _LSB_SHIFT(WIDTH, POS) (WIDTH - 1 - POS)
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#else
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#define _LSB_SHIFT(WIDTH, POS) (POS)
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#endif
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#if (WITH_TARGET_WORD_MSB == 0)
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#define _MSB_SHIFT(WIDTH, POS) (POS)
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#else
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#define _MSB_SHIFT(WIDTH, POS) (WIDTH - 1 - POS)
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#endif
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/* compute the absolute bit position given the OFFSET from the MSB(LSB)
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NB: _MAKE_xxx_POS (WIDTH, _MAKE_xxx_SHIFT (WIDTH, POS)) == POS */
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#if (WITH_TARGET_WORD_MSB == 0)
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#define _MSB_POS(WIDTH, SHIFT) (SHIFT)
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#else
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#define _MSB_POS(WIDTH, SHIFT) (WIDTH - 1 - SHIFT)
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#endif
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#if (WITH_TARGET_WORD_MSB == 0)
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#define _LSB_POS(WIDTH, SHIFT) (WIDTH - 1 - SHIFT)
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#else
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#define _LSB_POS(WIDTH, SHIFT) (SHIFT)
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#endif
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/* convert a 64 bit position into a corresponding 32bit position. MSB
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pos handles the posibility that the bit lies beyond the 32bit
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boundary */
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#if (WITH_TARGET_WORD_MSB == 0)
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#define _MSB_32(START, STOP) (START <= STOP \
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? (START < 32 ? 0 : START - 32) \
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: (STOP < 32 ? 0 : STOP - 32))
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#define _MSB_16(START, STOP) (START <= STOP \
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? (START < 48 ? 0 : START - 48) \
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: (STOP < 48 ? 0 : STOP - 48))
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#else
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#define _MSB_32(START, STOP) (START >= STOP \
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? (START >= 32 ? 31 : START) \
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: (STOP >= 32 ? 31 : STOP))
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#define _MSB_16(START, STOP) (START >= STOP \
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? (START >= 16 ? 15 : START) \
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: (STOP >= 16 ? 15 : STOP))
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#endif
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#if (WITH_TARGET_WORD_MSB == 0)
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#define _LSB_32(START, STOP) (START <= STOP \
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? (STOP < 32 ? 0 : STOP - 32) \
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: (START < 32 ? 0 : START - 32))
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#define _LSB_16(START, STOP) (START <= STOP \
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? (STOP < 48 ? 0 : STOP - 48) \
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: (START < 48 ? 0 : START - 48))
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#else
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#define _LSB_32(START, STOP) (START >= STOP \
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? (STOP >= 32 ? 31 : STOP) \
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: (START >= 32 ? 31 : START))
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#define _LSB_16(START, STOP) (START >= STOP \
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? (STOP >= 16 ? 15 : STOP) \
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: (START >= 16 ? 15 : START))
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#endif
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#if (WITH_TARGET_WORD_MSB == 0)
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#define _MSB(START, STOP) (START <= STOP ? START : STOP)
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#else
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#define _MSB(START, STOP) (START >= STOP ? START : STOP)
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#endif
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#if (WITH_TARGET_WORD_MSB == 0)
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#define _LSB(START, STOP) (START <= STOP ? STOP : START)
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#else
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#define _LSB(START, STOP) (START >= STOP ? STOP : START)
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#endif
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/* LS/MS Bit operations */
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#define LSBIT8(POS) ((unsigned8) 1 << (POS))
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#define LSBIT16(POS) ((unsigned16)1 << (POS))
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#define LSBIT32(POS) ((unsigned32)1 << (POS))
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#define LSBIT64(POS) ((unsigned64)1 << (POS))
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#if (WITH_TARGET_WORD_BITSIZE == 64)
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#define LSBIT(POS) LSBIT64 (POS)
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#endif
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#if (WITH_TARGET_WORD_BITSIZE == 32)
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#define LSBIT(POS) ((unsigned32)((POS) >= 32 \
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? 0 \
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: (1 << ((POS) >= 32 ? 0 : (POS)))))
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#endif
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#if (WITH_TARGET_WORD_BITSIZE == 16)
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#define LSBIT(POS) ((unsigned16)((POS) >= 16 \
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? 0 \
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: (1 << ((POS) >= 16 ? 0 : (POS)))))
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#endif
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#define MSBIT8(POS) ((unsigned8) 1 << ( 8 - 1 - (POS)))
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#define MSBIT16(POS) ((unsigned16)1 << (16 - 1 - (POS)))
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#define MSBIT32(POS) ((unsigned32)1 << (32 - 1 - (POS)))
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#define MSBIT64(POS) ((unsigned64)1 << (64 - 1 - (POS)))
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#if (WITH_TARGET_WORD_BITSIZE == 64)
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#define MSBIT(POS) MSBIT64 (POS)
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#endif
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#if (WITH_TARGET_WORD_BITSIZE == 32)
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#define MSBIT(POS) ((unsigned32)((POS) < 32 \
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? 0 \
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: (1 << ((POS) < 32 ? 0 : (64 - 1) - (POS)))))
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#endif
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#if (WITH_TARGET_WORD_BITSIZE == 16)
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#define MSBIT(POS) ((unsigned16)((POS) < 48 \
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? 0 \
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: (1 << ((POS) < 48 ? 0 : (64 - 1) - (POS)))))
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#endif
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/* Bit operations */
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#define BIT4(POS) (1 << _LSB_SHIFT (4, (POS)))
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#define BIT5(POS) (1 << _LSB_SHIFT (5, (POS)))
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#define BIT10(POS) (1 << _LSB_SHIFT (10, (POS)))
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#if (WITH_TARGET_WORD_MSB == 0)
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#define BIT8 MSBIT8
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#define BIT16 MSBIT16
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#define BIT32 MSBIT32
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#define BIT64 MSBIT64
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#define BIT MSBIT
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#else
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#define BIT8 LSBIT8
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#define BIT16 LSBIT16
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#define BIT32 LSBIT32
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#define BIT64 LSBIT64
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#define BIT LSBIT
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#endif
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/* multi bit mask */
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/* 111111 -> mmll11 -> mm11ll */
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#define _MASKn(WIDTH, START, STOP) (((unsigned##WIDTH)(-1) \
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>> (_MSB_SHIFT (WIDTH, START) \
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+ _LSB_SHIFT (WIDTH, STOP))) \
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<< _LSB_SHIFT (WIDTH, STOP))
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#if (WITH_TARGET_WORD_MSB == 0)
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#define _POS_LE(START, STOP) (START <= STOP)
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#else
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#define _POS_LE(START, STOP) (STOP <= START)
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#endif
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#if (WITH_TARGET_WORD_BITSIZE == 64)
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#define MASK(START, STOP) \
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(_POS_LE ((START), (STOP)) \
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? _MASKn(64, \
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_MSB ((START), (STOP)), \
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_LSB ((START), (STOP)) ) \
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: (_MASKn(64, _MSB_POS (64, 0), (STOP)) \
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| _MASKn(64, (START), _LSB_POS (64, 0))))
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#endif
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#if (WITH_TARGET_WORD_BITSIZE == 32)
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#define MASK(START, STOP) \
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(_POS_LE ((START), (STOP)) \
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? (_POS_LE ((STOP), _MSB_POS (64, 31)) \
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? 0 \
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: _MASKn (32, \
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_MSB_32 ((START), (STOP)), \
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_LSB_32 ((START), (STOP)))) \
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: (_MASKn (32, \
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_LSB_32 ((START), (STOP)), \
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_LSB_POS (32, 0)) \
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| (_POS_LE ((STOP), _MSB_POS (64, 31)) \
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? 0 \
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: _MASKn (32, \
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_MSB_POS (32, 0), \
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_MSB_32 ((START), (STOP))))))
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#endif
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#if (WITH_TARGET_WORD_BITSIZE == 16)
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#define MASK(START, STOP) \
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(_POS_LE ((START), (STOP)) \
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? (_POS_LE ((STOP), _MSB_POS (64, 15)) \
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? 0 \
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: _MASKn (16, \
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_MSB_16 ((START), (STOP)), \
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_LSB_16 ((START), (STOP)))) \
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: (_MASKn (16, \
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_LSB_16 ((START), (STOP)), \
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_LSB_POS (16, 0)) \
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| (_POS_LE ((STOP), _MSB_POS (64, 15)) \
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? 0 \
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: _MASKn (16, \
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_MSB_POS (16, 0), \
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_MSB_16 ((START), (STOP))))))
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#endif
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#if !defined (MASK)
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#error "MASK never undefined"
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#endif
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/* Multi-bit mask on least significant bits */
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#define _LSMASKn(WIDTH, FIRST, LAST) _MASKn (WIDTH, \
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_LSB_POS (WIDTH, FIRST), \
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_LSB_POS (WIDTH, LAST))
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#define LSMASK8(FIRST, LAST) _LSMASKn ( 8, (FIRST), (LAST))
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#define LSMASK16(FIRST, LAST) _LSMASKn (16, (FIRST), (LAST))
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#define LSMASK32(FIRST, LAST) _LSMASKn (32, (FIRST), (LAST))
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#define LSMASK64(FIRST, LAST) _LSMASKn (64, (FIRST), (LAST))
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#define LSMASK(FIRST, LAST) (MASK (_LSB_POS (64, FIRST), _LSB_POS (64, LAST)))
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/* Multi-bit mask on most significant bits */
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#define _MSMASKn(WIDTH, FIRST, LAST) _MASKn (WIDTH, \
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_MSB_POS (WIDTH, FIRST), \
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_MSB_POS (WIDTH, LAST))
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#define MSMASK8(FIRST, LAST) _MSMASKn ( 8, (FIRST), (LAST))
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#define MSMASK16(FIRST, LAST) _MSMASKn (16, (FIRST), (LAST))
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#define MSMASK32(FIRST, LAST) _MSMASKn (32, (FIRST), (LAST))
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#define MSMASK64(FIRST, LAST) _MSMASKn (64, (FIRST), (LAST))
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#define MSMASK(FIRST, LAST) (MASK (_MSB_POS (64, FIRST), _MSB_POS (64, LAST)))
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#if (WITH_TARGET_WORD_MSB == 0)
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#define MASK8 MSMASK8
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#define MASK16 MSMASK16
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#define MASK32 MSMASK32
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#define MASK64 MSMASK64
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#else
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#define MASK8 LSMASK8
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#define MASK16 LSMASK16
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#define MASK32 LSMASK32
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#define MASK64 LSMASK64
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#endif
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/* mask the required bits, leaving them in place */
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INLINE_SIM_BITS(unsigned8) LSMASKED8 (unsigned8 word, int first, int last);
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INLINE_SIM_BITS(unsigned16) LSMASKED16 (unsigned16 word, int first, int last);
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INLINE_SIM_BITS(unsigned32) LSMASKED32 (unsigned32 word, int first, int last);
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INLINE_SIM_BITS(unsigned64) LSMASKED64 (unsigned64 word, int first, int last);
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INLINE_SIM_BITS(unsigned_word) LSMASKED (unsigned_word word, int first, int last);
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INLINE_SIM_BITS(unsigned8) MSMASKED8 (unsigned8 word, int first, int last);
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INLINE_SIM_BITS(unsigned16) MSMASKED16 (unsigned16 word, int first, int last);
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INLINE_SIM_BITS(unsigned32) MSMASKED32 (unsigned32 word, int first, int last);
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INLINE_SIM_BITS(unsigned64) MSMASKED64 (unsigned64 word, int first, int last);
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INLINE_SIM_BITS(unsigned_word) MSMASKED (unsigned_word word, int first, int last);
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#if (WITH_TARGET_WORD_MSB == 0)
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#define MASKED8 MSMASKED8
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#define MASKED16 MSMASKED16
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#define MASKED32 MSMASKED32
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#define MASKED64 MSMASKED64
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#define MASKED MSMASKED
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#else
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#define MASKED8 LSMASKED8
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#define MASKED16 LSMASKED16
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#define MASKED32 LSMASKED32
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#define MASKED64 LSMASKED64
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#define MASKED LSMASKED
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#endif
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/* extract the required bits aligning them with the lsb */
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INLINE_SIM_BITS(unsigned8) LSEXTRACTED8 (unsigned8 val, int start, int stop);
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INLINE_SIM_BITS(unsigned16) LSEXTRACTED16 (unsigned16 val, int start, int stop);
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INLINE_SIM_BITS(unsigned32) LSEXTRACTED32 (unsigned32 val, int start, int stop);
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INLINE_SIM_BITS(unsigned64) LSEXTRACTED64 (unsigned64 val, int start, int stop);
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INLINE_SIM_BITS(unsigned_word) LSEXTRACTED (unsigned_word val, int start, int stop);
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INLINE_SIM_BITS(unsigned8) MSEXTRACTED8 (unsigned8 val, int start, int stop);
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INLINE_SIM_BITS(unsigned16) MSEXTRACTED16 (unsigned16 val, int start, int stop);
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INLINE_SIM_BITS(unsigned32) MSEXTRACTED32 (unsigned32 val, int start, int stop);
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INLINE_SIM_BITS(unsigned64) MSEXTRACTED64 (unsigned64 val, int start, int stop);
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INLINE_SIM_BITS(unsigned_word) MSEXTRACTED (unsigned_word val, int start, int stop);
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#if (WITH_TARGET_WORD_MSB == 0)
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#define EXTRACTED8 MSEXTRACTED8
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#define EXTRACTED16 MSEXTRACTED16
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#define EXTRACTED32 MSEXTRACTED32
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#define EXTRACTED64 MSEXTRACTED64
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#define EXTRACTED MSEXTRACTED
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#else
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#define EXTRACTED8 LSEXTRACTED8
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#define EXTRACTED16 LSEXTRACTED16
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#define EXTRACTED32 LSEXTRACTED32
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#define EXTRACTED64 LSEXTRACTED64
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#define EXTRACTED LSEXTRACTED
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#endif
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/* move a single bit around */
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/* NB: the wierdness (N>O?N-O:0) is to stop a warning from GCC */
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#define _SHUFFLEDn(N, WORD, OLD, NEW) \
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((OLD) < (NEW) \
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? (((unsigned##N)(WORD) \
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>> (((NEW) > (OLD)) ? ((NEW) - (OLD)) : 0)) \
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& MASK32((NEW), (NEW))) \
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: (((unsigned##N)(WORD) \
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<< (((OLD) > (NEW)) ? ((OLD) - (NEW)) : 0)) \
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& MASK32((NEW), (NEW))))
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#define SHUFFLED32(WORD, OLD, NEW) _SHUFFLEDn (32, WORD, OLD, NEW)
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#define SHUFFLED64(WORD, OLD, NEW) _SHUFFLEDn (64, WORD, OLD, NEW)
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#define SHUFFLED(WORD, OLD, NEW) _SHUFFLEDn (_word, WORD, OLD, NEW)
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/* Insert a group of bits into a bit position */
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INLINE_SIM_BITS(unsigned8) LSINSERTED8 (unsigned8 val, int start, int stop);
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INLINE_SIM_BITS(unsigned16) LSINSERTED16 (unsigned16 val, int start, int stop);
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INLINE_SIM_BITS(unsigned32) LSINSERTED32 (unsigned32 val, int start, int stop);
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INLINE_SIM_BITS(unsigned64) LSINSERTED64 (unsigned64 val, int start, int stop);
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INLINE_SIM_BITS(unsigned_word) LSINSERTED (unsigned_word val, int start, int stop);
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INLINE_SIM_BITS(unsigned8) MSINSERTED8 (unsigned8 val, int start, int stop);
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INLINE_SIM_BITS(unsigned16) MSINSERTED16 (unsigned16 val, int start, int stop);
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INLINE_SIM_BITS(unsigned32) MSINSERTED32 (unsigned32 val, int start, int stop);
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INLINE_SIM_BITS(unsigned64) MSINSERTED64 (unsigned64 val, int start, int stop);
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INLINE_SIM_BITS(unsigned_word) MSINSERTED (unsigned_word val, int start, int stop);
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#if (WITH_TARGET_WORD_MSB == 0)
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#define INSERTED8 MSINSERTED8
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#define INSERTED16 MSINSERTED16
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#define INSERTED32 MSINSERTED32
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#define INSERTED64 MSINSERTED64
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#define INSERTED MSINSERTED
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#else
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#define INSERTED8 LSINSERTED8
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#define INSERTED16 LSINSERTED16
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#define INSERTED32 LSINSERTED32
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#define INSERTED64 LSINSERTED64
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#define INSERTED LSINSERTED
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#endif
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/* MOVE bits from one loc to another (combination of extract/insert) */
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#define MOVED8(VAL,OH,OL,NH,NL) INSERTED8 (EXTRACTED8 ((VAL), OH, OL), NH, NL)
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#define MOVED16(VAL,OH,OL,NH,NL) INSERTED16(EXTRACTED16((VAL), OH, OL), NH, NL)
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#define MOVED32(VAL,OH,OL,NH,NL) INSERTED32(EXTRACTED32((VAL), OH, OL), NH, NL)
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#define MOVED64(VAL,OH,OL,NH,NL) INSERTED64(EXTRACTED64((VAL), OH, OL), NH, NL)
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#define MOVED(VAL,OH,OL,NH,NL) INSERTED (EXTRACTED ((VAL), OH, OL), NH, NL)
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|
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/* Sign extend the quantity to the targets natural word size */
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|
|
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#define EXTEND4(X) (LSSEXT ((X), 3))
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#define EXTEND5(X) (LSSEXT ((X), 4))
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#define EXTEND6(X) (LSSEXT ((X), 5))
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|
#define EXTEND8(X) ((signed_word)(signed8)(X))
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|
#define EXTEND11(X) (LSSEXT ((X), 10))
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#define EXTEND12(X) (LSSEXT ((X), 11))
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#define EXTEND15(X) (LSSEXT ((X), 14))
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#define EXTEND16(X) ((signed_word)(signed16)(X))
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|
#define EXTEND24(X) (LSSEXT ((X), 23))
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|
#define EXTEND25(X) (LSSEXT ((X), 24))
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|
#define EXTEND32(X) ((signed_word)(signed32)(X))
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|
#define EXTEND64(X) ((signed_word)(signed64)(X))
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|
|
|
/* depending on MODE return a 64bit or 32bit (sign extended) value */
|
|
#if (WITH_TARGET_WORD_BITSIZE == 64)
|
|
#define EXTENDED(X) ((signed64)(signed32)(X))
|
|
#endif
|
|
#if (WITH_TARGET_WORD_BITSIZE == 32)
|
|
#define EXTENDED(X) (X)
|
|
#endif
|
|
#if (WITH_TARGET_WORD_BITSIZE == 16)
|
|
#define EXTENDED(X) (X)
|
|
#endif
|
|
|
|
|
|
/* memory alignment macro's */
|
|
#define _ALIGNa(A,X) (((X) + ((A) - 1)) & ~((A) - 1))
|
|
#define _FLOORa(A,X) ((X) & ~((A) - 1))
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|
|
|
#define ALIGN_8(X) _ALIGNa (8, X)
|
|
#define ALIGN_16(X) _ALIGNa (16, X)
|
|
|
|
#define ALIGN_PAGE(X) _ALIGNa (0x1000, X)
|
|
#define FLOOR_PAGE(X) ((X) & ~(0x1000 - 1))
|
|
|
|
|
|
/* bit bliting macro's */
|
|
#define BLIT32(V, POS, BIT) \
|
|
do { \
|
|
if (BIT) \
|
|
V |= BIT32 (POS); \
|
|
else \
|
|
V &= ~BIT32 (POS); \
|
|
} while (0)
|
|
#define MBLIT32(V, LO, HI, VAL) \
|
|
do { \
|
|
(V) = (((V) & ~MASK32 ((LO), (HI))) \
|
|
| INSERTED32 (VAL, LO, HI)); \
|
|
} while (0)
|
|
|
|
|
|
|
|
/* some rotate functions. The generic macro's ROT, ROTL, ROTR are
|
|
intentionally omited. */
|
|
|
|
|
|
INLINE_SIM_BITS(unsigned8) ROT8 (unsigned8 val, int shift);
|
|
INLINE_SIM_BITS(unsigned16) ROT16 (unsigned16 val, int shift);
|
|
INLINE_SIM_BITS(unsigned32) ROT32 (unsigned32 val, int shift);
|
|
INLINE_SIM_BITS(unsigned64) ROT64 (unsigned64 val, int shift);
|
|
|
|
|
|
INLINE_SIM_BITS(unsigned8) ROTL8 (unsigned8 val, int shift);
|
|
INLINE_SIM_BITS(unsigned16) ROTL16 (unsigned16 val, int shift);
|
|
INLINE_SIM_BITS(unsigned32) ROTL32 (unsigned32 val, int shift);
|
|
INLINE_SIM_BITS(unsigned64) ROTL64 (unsigned64 val, int shift);
|
|
|
|
|
|
INLINE_SIM_BITS(unsigned8) ROTR8 (unsigned8 val, int shift);
|
|
INLINE_SIM_BITS(unsigned16) ROTR16 (unsigned16 val, int shift);
|
|
INLINE_SIM_BITS(unsigned32) ROTR32 (unsigned32 val, int shift);
|
|
INLINE_SIM_BITS(unsigned64) ROTR64 (unsigned64 val, int shift);
|
|
|
|
|
|
|
|
/* Sign extension operations */
|
|
|
|
INLINE_SIM_BITS(unsigned8) LSSEXT8 (signed8 val, int sign_bit);
|
|
INLINE_SIM_BITS(unsigned16) LSSEXT16 (signed16 val, int sign_bit);
|
|
INLINE_SIM_BITS(unsigned32) LSSEXT32 (signed32 val, int sign_bit);
|
|
INLINE_SIM_BITS(unsigned64) LSSEXT64 (signed64 val, int sign_bit);
|
|
INLINE_SIM_BITS(unsigned_word) LSSEXT (signed_word val, int sign_bit);
|
|
|
|
INLINE_SIM_BITS(unsigned8) MSSEXT8 (signed8 val, int sign_bit);
|
|
INLINE_SIM_BITS(unsigned16) MSSEXT16 (signed16 val, int sign_bit);
|
|
INLINE_SIM_BITS(unsigned32) MSSEXT32 (signed32 val, int sign_bit);
|
|
INLINE_SIM_BITS(unsigned64) MSSEXT64 (signed64 val, int sign_bit);
|
|
INLINE_SIM_BITS(unsigned_word) MSSEXT (signed_word val, int sign_bit);
|
|
|
|
#if (WITH_TARGET_WORD_MSB == 0)
|
|
#define SEXT8 MSSEXT8
|
|
#define SEXT16 MSSEXT16
|
|
#define SEXT32 MSSEXT32
|
|
#define SEXT64 MSSEXT64
|
|
#define SEXT MSSEXT
|
|
#else
|
|
#define SEXT8 LSSEXT8
|
|
#define SEXT16 LSSEXT16
|
|
#define SEXT32 LSSEXT32
|
|
#define SEXT64 LSSEXT64
|
|
#define SEXT LSSEXT
|
|
#endif
|
|
|
|
|
|
|
|
#if H_REVEALS_MODULE_P (SIM_BITS_INLINE)
|
|
#include "sim-bits.c"
|
|
#endif
|
|
|
|
#endif /* SIM_BITS_H */
|