fc0c78a1d9
* ld-frv/fdpic-shared-6.d: Likewise. * ld-frv/tls-dynamic-1.d: Update for symbol changes. * ld-frv/tls-dynamic-2.d: Likewise. * ld-frv/tls-dynamic-3.d: Likewise. * ld-frv/tls-initial-shared-2.d: Likewise. * ld-frv/tls-pie-1.d: Likewise. * ld-frv/tls-pie-3.d: Likewise. * ld-frv/tls-relax-dynamic-1.d: Likewise. * ld-frv/tls-relax-dynamic-2.d: Likewise. * ld-frv/tls-relax-dynamic-3.d: Likewise. * ld-frv/tls-relax-initial-shared-2.d: Likewise. * ld-frv/tls-relax-pie-1.d: Likewise. * ld-frv/tls-relax-pie-3.d: Likewise. * ld-frv/tls-relax-shared-1.d: Likewise. * ld-frv/tls-relax-shared-2.d: Likewise. * ld-frv/tls-relax-shared-3.d: Likewise. * ld-frv/tls-relax-static-3.d: Likewise. * ld-frv/tls-shared-1.d: Likewise. * ld-frv/tls-shared-2.d: Likewise. * ld-frv/tls-shared-3.d: Likewise. * ld-frv/tls-static-1.d: Likewise. * ld-frv/tls-static-3.d: Likewise.
73 lines
2.3 KiB
Makefile
73 lines
2.3 KiB
Makefile
#name: FRV uClinux PIC relocs to weak undefined symbols, shared linking
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#source: fdpic6.s
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#objdump: -DR -j .text -j .data -j .got -j .plt
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#ld: -shared --defsym WD1=D6 --version-script fdpic6.ldv
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.*: file format elf.*frv.*
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Disassembly of section \.plt:
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[0-9a-f ]+<\.plt>:
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[0-9a-f ]+: 00 00 00 08 add\.p gr0,gr8,gr0
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[0-9a-f ]+: c0 1a 00 06 bra [0-9a-f]+ <F6-0x10>
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[0-9a-f ]+: 00 00 00 00 add\.p gr0,gr0,gr0
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[0-9a-f ]+: c0 1a 00 04 bra [0-9a-f]+ <F6-0x10>
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[0-9a-f ]+: 00 00 00 10 add\.p gr0,gr16,gr0
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[0-9a-f ]+: c0 1a 00 02 bra [0-9a-f]+ <F6-0x10>
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[0-9a-f ]+: 00 00 00 18 add\.p gr0,gr24,gr0
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[0-9a-f ]+: 88 08 f1 40 ldd @\(gr15,gr0\),gr4
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[0-9a-f ]+: 80 30 40 00 jmpl @\(gr4,gr0\)
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[0-9a-f ]+: 9c cc ff f0 lddi @\(gr15,-16\),gr14
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[0-9a-f ]+: 80 30 e0 00 jmpl @\(gr14,gr0\)
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Disassembly of section \.text:
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[0-9a-f ]+<F6>:
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[0-9a-f ]+: fe 3f ff fe call [0-9a-f]+ <F6-0x8>
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[0-9a-f ]+: 80 40 f0 0c addi gr15,12,gr0
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[0-9a-f ]+: 80 fc 00 24 setlos 0x24,gr0
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[0-9a-f ]+: 80 f4 00 20 setlo 0x20,gr0
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[0-9a-f ]+: 80 f8 00 00 sethi hi\(0x0\),gr0
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[0-9a-f ]+: 80 40 f0 10 addi gr15,16,gr0
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[0-9a-f ]+: 80 fc 00 18 setlos 0x18,gr0
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[0-9a-f ]+: 80 f4 00 1c setlo 0x1c,gr0
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[0-9a-f ]+: 80 f8 00 00 sethi hi\(0x0\),gr0
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[0-9a-f ]+: 80 40 ff f8 addi gr15,-8,gr0
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[0-9a-f ]+: 80 fc ff e8 setlos 0xf*ffffffe8,gr0
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[0-9a-f ]+: 80 f4 ff e0 setlo 0xffe0,gr0
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[0-9a-f ]+: 80 f8 ff ff sethi 0xffff,gr0
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[0-9a-f ]+: 80 f4 ff d0 setlo 0xffd0,gr0
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[0-9a-f ]+: 80 f8 ff ff sethi 0xffff,gr0
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[0-9a-f ]+: 80 f4 00 14 setlo 0x14,gr0
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[0-9a-f ]+: 80 f8 00 00 sethi hi\(0x0\),gr0
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Disassembly of section \.dat[0-9a-f ]+:
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[0-9a-f ]+<D6>:
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\.\.\.
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[0-9a-f ]+: R_FRV_32 WD0
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[0-9a-f ]+: R_FRV_FUNCDESC WFb
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[0-9a-f ]+: R_FRV_32 WFb
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Disassembly of section \.got:
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[0-9a-f ]+<_GLOBAL_OFFSET_TABLE_-0x20>:
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[0-9a-f ]+: 00 00 03 60 .*
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[0-9a-f ]+: R_FRV_FUNCDESC_VALUE WF9
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[0-9a-f ]+: 00 00 00 00 .*
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[0-9a-f ]+: 00 00 03 58 .*
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[0-9a-f ]+: R_FRV_FUNCDESC_VALUE WF8
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[0-9a-f ]+: 00 00 00 00 .*
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[0-9a-f ]+: 00 00 03 50 .*
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[0-9a-f ]+: R_FRV_FUNCDESC_VALUE WF0
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[0-9a-f ]+: 00 00 00 00 .*
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[0-9a-f ]+: 00 00 03 48 .*
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[0-9a-f ]+: R_FRV_FUNCDESC_VALUE WF7
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[0-9a-f ]+: 00 00 00 00 .*
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[0-9a-f ]+<_GLOBAL_OFFSET_TABLE_>:
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\.\.\.
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[0-9a-f ]+: R_FRV_32 WF1
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[0-9a-f ]+: R_FRV_FUNCDESC WF4
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[0-9a-f ]+: R_FRV_32 WD2
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[0-9a-f ]+: R_FRV_FUNCDESC WF5
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[0-9a-f ]+: R_FRV_FUNCDESC WF6
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[0-9a-f ]+: R_FRV_32 WF3
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[0-9a-f ]+: R_FRV_32 WF2
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