4d18591be9
Nowadays, get_next_pcs in linux_target_ops has two parameters PC and REGCACHE. Parameter PC looks redundant because it can be go from REGCACHE. The patch is to remove PC from the arguments for various functions. gdb: 2016-01-26 Yao Qi <yao.qi@linaro.org> * arch/arm-get-next-pcs.c (thumb_deal_with_atomic_sequence_raw): Remove argument pc. Get pc by regcache_read_pc. Callers updated. (arm_deal_with_atomic_sequence_raw): Likewise. (thumb_get_next_pcs_raw): Likewise. (arm_get_next_pcs_raw): Likewise. (arm_get_next_pcs): Remove argument pc. Callers updated. * arch/arm-get-next-pcs.h (arm_get_next_pcs): Update declaration. gdb/gdbserver: 2016-01-26 Yao Qi <yao.qi@linaro.org> * linux-arm-low.c (arm_gdbserver_get_next_pcs): Remove argument pc. * linux-low.c (install_software_single_step_breakpoints): Don't call regcache_read_pc. * linux-low.h (struct linux_target_ops) <get_next_pcs>: Remove argument pc.
62 lines
2.1 KiB
C
62 lines
2.1 KiB
C
/* Common code for ARM software single stepping support.
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Copyright (C) 1988-2016 Free Software Foundation, Inc.
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This file is part of GDB.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>. */
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#ifndef ARM_GET_NEXT_PCS_H
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#define ARM_GET_NEXT_PCS_H 1
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/* Forward declaration. */
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struct arm_get_next_pcs;
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/* get_next_pcs operations. */
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struct arm_get_next_pcs_ops
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{
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ULONGEST (*read_mem_uint) (CORE_ADDR memaddr, int len, int byte_order);
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CORE_ADDR (*syscall_next_pc) (struct arm_get_next_pcs *self, CORE_ADDR pc);
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CORE_ADDR (*addr_bits_remove) (struct arm_get_next_pcs *self, CORE_ADDR val);
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int (*is_thumb) (struct arm_get_next_pcs *self);
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};
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/* Context for a get_next_pcs call on ARM. */
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struct arm_get_next_pcs
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{
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/* Operations implementations. */
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struct arm_get_next_pcs_ops *ops;
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/* Byte order for data. */
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int byte_order;
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/* Byte order for code. */
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int byte_order_for_code;
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/* Whether the target has 32-bit thumb-2 breakpoint defined or
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not. */
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int has_thumb2_breakpoint;
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/* Registry cache. */
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struct regcache *regcache;
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};
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/* Initialize arm_get_next_pcs. */
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void arm_get_next_pcs_ctor (struct arm_get_next_pcs *self,
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struct arm_get_next_pcs_ops *ops,
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int byte_order,
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int byte_order_for_code,
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int has_thumb2_breakpoint,
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struct regcache *regcache);
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/* Find the next possible PCs after the current instruction executes. */
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VEC (CORE_ADDR) *arm_get_next_pcs (struct arm_get_next_pcs *self);
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#endif /* ARM_GET_NEXT_PCS_H */
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