23f5dfcb86
correctly for all 16 bit relocs. Return BFD_RELOC_NONE if reloc isn't recognized, not BFD_RELOC_XC16X_SOF. testsuite: * gas/xc16x/shlrol.s: Specify constant shift amount. * gas/xc16x/xc16x.exp (do_xc16x_shlrol): Update expected output.
349 lines
8.2 KiB
C
349 lines
8.2 KiB
C
/* tc-xc16x.c -- Assembler for the Infineon XC16X.
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Copyright 2006, 2007, 2009 Free Software Foundation, Inc.
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Contributed by KPIT Cummins Infosystems
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This file is part of GAS, the GNU Assembler.
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GAS is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3, or (at your option)
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any later version.
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GAS is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with GAS; see the file COPYING. If not, write to the Free
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Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
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02110-1301, USA. */
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#include "as.h"
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#include "safe-ctype.h"
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#include "subsegs.h"
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#include "symcat.h"
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#include "opcodes/xc16x-desc.h"
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#include "opcodes/xc16x-opc.h"
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#include "cgen.h"
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#include "dwarf2dbg.h"
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#ifdef OBJ_ELF
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#include "elf/xc16x.h"
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#endif
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/* Structure to hold all of the different components describing
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an individual instruction. */
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typedef struct
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{
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const CGEN_INSN * insn;
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const CGEN_INSN * orig_insn;
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CGEN_FIELDS fields;
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#if CGEN_INT_INSN_P
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CGEN_INSN_INT buffer [1];
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#define INSN_VALUE(buf) (*(buf))
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#else
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unsigned char buffer [CGEN_MAX_INSN_SIZE];
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#define INSN_VALUE(buf) (buf)
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#endif
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char * addr;
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fragS * frag;
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int num_fixups;
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fixS * fixups [GAS_CGEN_MAX_FIXUPS];
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int indices [MAX_OPERAND_INSTANCES];
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}
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xc16x_insn;
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const char comment_chars[] = ";";
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const char line_comment_chars[] = "#";
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const char line_separator_chars[] = "";
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const char EXP_CHARS[] = "eE";
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const char FLT_CHARS[] = "dD";
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#define XC16X_SHORTOPTS ""
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const char * md_shortopts = XC16X_SHORTOPTS;
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struct option md_longopts[] =
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{
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{NULL, no_argument, NULL, 0}
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};
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size_t md_longopts_size = sizeof (md_longopts);
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static void
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xc16xlmode (int arg ATTRIBUTE_UNUSED)
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{
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if (stdoutput != NULL)
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if (!bfd_set_arch_mach (stdoutput, bfd_arch_xc16x, bfd_mach_xc16xl))
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as_warn (_("could not set architecture and machine"));
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}
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static void
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xc16xsmode (int arg ATTRIBUTE_UNUSED)
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{
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if (!bfd_set_arch_mach (stdoutput, bfd_arch_xc16x, bfd_mach_xc16xs))
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as_warn (_("could not set architecture and machine"));
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}
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static void
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xc16xmode (int arg ATTRIBUTE_UNUSED)
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{
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if (!bfd_set_arch_mach (stdoutput, bfd_arch_xc16x, bfd_mach_xc16x))
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as_warn (_("could not set architecture and machine"));
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}
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/* The target specific pseudo-ops which we support. */
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const pseudo_typeS md_pseudo_table[] =
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{
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{ "word", cons, 2 },
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{"xc16xl", xc16xlmode, 0},
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{"xc16xs", xc16xsmode, 0},
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{"xc16x", xc16xmode, 0},
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{ NULL, NULL, 0 }
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};
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void
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md_begin (void)
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{
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/* Initialize the `cgen' interface. */
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/* Set the machine number and endian. */
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gas_cgen_cpu_desc = xc16x_cgen_cpu_open (CGEN_CPU_OPEN_MACHS, 0,
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CGEN_CPU_OPEN_ENDIAN,
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CGEN_ENDIAN_LITTLE,
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CGEN_CPU_OPEN_END);
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xc16x_cgen_init_asm (gas_cgen_cpu_desc);
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/* This is a callback from cgen to gas to parse operands. */
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cgen_set_parse_operand_fn (gas_cgen_cpu_desc, gas_cgen_parse_operand);
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}
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void
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md_assemble (char *str)
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{
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xc16x_insn insn;
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char *errmsg;
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/* Initialize GAS's cgen interface for a new instruction. */
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gas_cgen_init_parse ();
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insn.insn = xc16x_cgen_assemble_insn
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(gas_cgen_cpu_desc, str, & insn.fields, insn.buffer, & errmsg);
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if (!insn.insn)
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{
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as_bad ("%s", errmsg);
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return;
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}
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/* Doesn't really matter what we pass for RELAX_P here. */
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gas_cgen_finish_insn (insn.insn, insn.buffer,
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CGEN_FIELDS_BITSIZE (& insn.fields), 1, NULL);
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}
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/* Return the bfd reloc type for OPERAND of INSN at fixup FIXP.
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Returns BFD_RELOC_NONE if no reloc type can be found.
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*FIXP may be modified if desired. */
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bfd_reloc_code_real_type
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md_cgen_lookup_reloc (const CGEN_INSN *insn ATTRIBUTE_UNUSED,
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const CGEN_OPERAND *operand,
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fixS *fixP)
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{
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switch (operand->type)
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{
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case XC16X_OPERAND_REL:
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/* ??? Adjust size? */
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fixP->fx_where += 1;
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fixP->fx_pcrel = 1;
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return BFD_RELOC_8_PCREL;
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case XC16X_OPERAND_CADDR:
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fixP->fx_size = 2;
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fixP->fx_where += 2;
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return BFD_RELOC_16;
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case XC16X_OPERAND_UIMM7:
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/* ??? Adjust size? */
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fixP->fx_where += 1;
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fixP->fx_pcrel = 1;
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return BFD_RELOC_8_PCREL;
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case XC16X_OPERAND_UIMM16:
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case XC16X_OPERAND_MEMORY:
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fixP->fx_size = 2;
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fixP->fx_where += 2;
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return BFD_RELOC_16;
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case XC16X_OPERAND_UPOF16:
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fixP->fx_size = 2;
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fixP->fx_where += 2;
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return BFD_RELOC_XC16X_POF;
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case XC16X_OPERAND_UPAG16:
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fixP->fx_size = 2;
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fixP->fx_where += 2;
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return BFD_RELOC_XC16X_PAG;
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case XC16X_OPERAND_USEG8:
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/* ??? This is an 8 bit field, why the 16 bit reloc? */
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fixP->fx_where += 1;
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return BFD_RELOC_XC16X_SEG;
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case XC16X_OPERAND_USEG16:
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case XC16X_OPERAND_USOF16:
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fixP->fx_size = 2;
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fixP->fx_where += 2;
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return BFD_RELOC_XC16X_SOF;
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default : /* Avoid -Wall warning. */
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break;
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}
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return BFD_RELOC_NONE;
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}
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/* Write a value out to the object file, using the appropriate endianness. */
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void
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md_number_to_chars (char * buf, valueT val, int n)
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{
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number_to_chars_littleendian (buf, val, n);
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}
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void
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md_show_usage (FILE * stream)
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{
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fprintf (stream, _(" XC16X specific command line options:\n"));
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}
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int
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md_parse_option (int c ATTRIBUTE_UNUSED,
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char *arg ATTRIBUTE_UNUSED)
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{
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return 0;
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}
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char *
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md_atof (int type, char *litP, int *sizeP)
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{
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return ieee_md_atof (type, litP, sizeP, FALSE);
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}
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valueT
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md_section_align (segT segment, valueT size)
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{
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int align = bfd_get_section_alignment (stdoutput, segment);
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return ((size + (1 << align) - 1) & (-1 << align));
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}
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symbolS *
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md_undefined_symbol (char *name ATTRIBUTE_UNUSED)
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{
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return NULL;
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}
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int
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md_estimate_size_before_relax (fragS *fragP ATTRIBUTE_UNUSED,
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segT segment_type ATTRIBUTE_UNUSED)
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{
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printf (_("call to md_estimate_size_before_relax \n"));
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abort ();
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}
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long
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md_pcrel_from (fixS *fixP)
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{
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long temp_val;
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temp_val=fixP->fx_size + fixP->fx_where + fixP->fx_frag->fr_address;
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return temp_val;
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}
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long
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md_pcrel_from_section (fixS *fixP, segT sec)
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{
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if (fixP->fx_addsy != (symbolS *) NULL
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&& (! S_IS_DEFINED (fixP->fx_addsy)
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|| S_GET_SEGMENT (fixP->fx_addsy) != sec
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|| S_IS_EXTERNAL (fixP->fx_addsy)
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|| S_IS_WEAK (fixP->fx_addsy)))
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{
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return 0;
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}
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return md_pcrel_from (fixP);
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}
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arelent *
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tc_gen_reloc (asection *section ATTRIBUTE_UNUSED, fixS *fixp)
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{
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arelent *rel;
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bfd_reloc_code_real_type r_type;
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if (fixp->fx_addsy && fixp->fx_subsy)
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{
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if ((S_GET_SEGMENT (fixp->fx_addsy) != S_GET_SEGMENT (fixp->fx_subsy))
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|| S_GET_SEGMENT (fixp->fx_addsy) == undefined_section)
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{
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as_bad_where (fixp->fx_file, fixp->fx_line,
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_("Difference of symbols in different sections is not supported"));
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return NULL;
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}
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}
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rel = xmalloc (sizeof (arelent));
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rel->sym_ptr_ptr = xmalloc (sizeof (asymbol *));
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*rel->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
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rel->address = fixp->fx_frag->fr_address + fixp->fx_where;
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rel->addend = fixp->fx_offset;
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r_type = fixp->fx_r_type;
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#define DEBUG 0
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#if DEBUG
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fprintf (stderr, "%s\n", bfd_get_reloc_code_name (r_type));
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fflush (stderr);
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#endif
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rel->howto = bfd_reloc_type_lookup (stdoutput, r_type);
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if (rel->howto == NULL)
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{
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as_bad_where (fixp->fx_file, fixp->fx_line,
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_("Cannot represent relocation type %s"),
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bfd_get_reloc_code_name (r_type));
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return NULL;
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}
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return rel;
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}
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void
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md_apply_fix (fixS *fixP, valueT *valP, segT seg ATTRIBUTE_UNUSED)
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{
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if (!strstr (seg->name,".debug"))
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{
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if (*valP < 128)
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*valP /= 2;
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if (*valP>268435455)
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{
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*valP = *valP * (-1);
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*valP /= 2;
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*valP = 256 - (*valP);
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}
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}
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gas_cgen_md_apply_fix (fixP, valP, seg);
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return;
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}
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void
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md_convert_frag (bfd *headers ATTRIBUTE_UNUSED,
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segT seg ATTRIBUTE_UNUSED,
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fragS *fragP ATTRIBUTE_UNUSED)
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{
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printf (_("call to md_convert_frag \n"));
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abort ();
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}
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