74541ad4c0
* elf-bfd.h (struct elf_link_hash_table): Reorder. Add
text_index_section and data_index_section.
(struct elf_backend_data): Add elf_backend_init_index_section.
(_bfd_elf_init_1_index_section): Declare.
(_bfd_elf_init_2_index_sections): Declare.
* elfxx-target.h (elf_backend_init_index_section): Define.
(elfNN_bed): Init new field.
* elflink.c (_bfd_elf_link_omit_section_dynsym): Keep first tls
section and text_index_section plus data_index_section.
(_bfd_elf_link_renumber_dynsyms): Clear dynindx on omitted sections.
(_bfd_elf_init_1_index_section): New function.
(_bfd_elf_init_2_index_sections): New function.
(bfd_elf_size_dynsym_hash_dynstr): Call elf_backend_init_index_section.
(elf_link_input_bfd): When emitting relocs, use text_index_section
and data_index_section for removed sections.
* elf-m10300.c (elf_backend_omit_section_dynsym): Define.
* elf32-i386.c: Likewise.
* elf32-m32r.c: Likewise.
* elf32-sh.c: Likewise.
* elf32-xstormy16.c: Likewise.
* elf32-xtensa.c: Likewise.
* elf64-alpha.c: Likewise.
* elf64-hppa.c: Likewise.
* elf64-mmix.c: Likewise.
* elf64-sh64.c: Likewise.
* elfxx-ia64.c: Likewise.
* elf32-arm.c (elf32_arm_final_link_relocate): Use text_index_section
and data_index_section sym for relocs against sections with no dynamic
section sym.
(elf_backend_init_index_section): Define.
* elf32-cris.c: Similarly.
* elf32-hppa.c: Similarly.
* elf32-i370.c: Similarly.
* elf32-m68k.c: Similarly.
* elf32-mips.c: Similarly.
* elf32-ppc.c: Similarly.
* elf32-s390.c: Similarly.
* elf32-sparc.c: Similarly.
* elf32-vax.c: Similarly.
* elf64-mips.c: Similarly.
* elf64-ppc.c: Similarly.
* elf64-s390.c: Similarly.
* elf64-sparc.c: Similarly.
* elf64-x86-64.c: Similarly.
* elfn32-mips.c: Similarly.
* elfxx-mips.c: Similarly.
* elfxx-sparc.c: Similarly.
* linker.c (fix_syms): Base symbols in removed sections on
previous section in preference to using absolute section.
ld/
* ldlang.c (strip_excluded_output_sections): Do strip sections
that define syms, but don't ignore them.
* ld.texinfo (Output Section Discarding): Revise.
* emultempl/armcoff.em (gld${EMULATION_NAME}_finish): Always call
finish_default.
ld/testsuite/
Update for section sym changes.
46 lines
1.3 KiB
Makefile
46 lines
1.3 KiB
Makefile
#source: tls32.s
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#as: -a32
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#ld: -shared -melf32ppc
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#objdump: -dr
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#target: powerpc*-*-*
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.*: +file format elf32-powerpc
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Disassembly of section \.text:
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.* <_start>:
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.*: 38 7f ff e8 addi r3,r31,-24
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.*: 48 00 00 01 bl .*
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.*: 38 7f ff e0 addi r3,r31,-32
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.*: 48 00 00 01 bl .*
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.*: 38 7f ff f0 addi r3,r31,-16
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.*: 48 01 01 95 bl .*<__tls_get_addr@plt>
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.*: 38 7f ff e0 addi r3,r31,-32
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.*: 48 01 01 8d bl .*<__tls_get_addr@plt>
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.*: 39 23 80 20 addi r9,r3,-32736
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.*: 3d 23 00 00 addis r9,r3,0
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.*: 81 49 80 24 lwz r10,-32732\(r9\)
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.*: 81 3f ff f8 lwz r9,-8\(r31\)
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.*: 7d 49 12 2e lhzx r10,r9,r2
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.*: 89 42 00 00 lbz r10,0\(r2\)
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.*: 3d 22 00 00 addis r9,r2,0
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.*: 99 49 00 00 stb r10,0\(r9\)
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.*: 38 7e ff d8 addi r3,r30,-40
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.*: 48 00 00 01 bl .*
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.*: 38 7e ff e0 addi r3,r30,-32
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.*: 48 00 00 01 bl .*
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.*: 91 43 80 04 stw r10,-32764\(r3\)
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.*: 3d 23 00 00 addis r9,r3,0
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.*: 91 49 80 08 stw r10,-32760\(r9\)
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.*: 81 3e ff f8 lwz r9,-8\(r30\)
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.*: 7d 49 13 2e sthx r10,r9,r2
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.*: a1 42 00 00 lhz r10,0\(r2\)
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.*: 3d 22 00 00 addis r9,r2,0
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.*: a9 49 00 00 lha r10,0\(r9\)
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Disassembly of section \.got:
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.* <\.got>:
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\.\.\.
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.*: 4e 80 00 21 blrl
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.*: 00 01 03 ec .*
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\.\.\.
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