712 lines
17 KiB
C
712 lines
17 KiB
C
/* HP PA-RISC SOM object file format: definitions internal to BFD.
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Copyright (C) 1990, 91, 92, 93, 94, 95, 96, 98, 99, 2000
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Free Software Foundation, Inc.
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Contributed by the Center for Software Science at the
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University of Utah (pa-gdb-bugs@cs.utah.edu).
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This file is part of BFD, the Binary File Descriptor library.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
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#ifndef _HPPA_H
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#define _HPPA_H
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#define BYTES_IN_WORD 4
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#define PA_PAGESIZE 0x1000
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#ifndef INLINE
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#ifdef __GNUC__
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#define INLINE inline
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#else
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#define INLINE
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#endif /* GNU C? */
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#endif /* INLINE */
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/* The PA instruction set variants. */
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enum pa_arch {pa10 = 10, pa11 = 11, pa20 = 20, pa20w = 25};
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/* HP PA-RISC relocation types */
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enum hppa_reloc_field_selector_type
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{
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R_HPPA_FSEL = 0x0,
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R_HPPA_LSSEL = 0x1,
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R_HPPA_RSSEL = 0x2,
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R_HPPA_LSEL = 0x3,
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R_HPPA_RSEL = 0x4,
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R_HPPA_LDSEL = 0x5,
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R_HPPA_RDSEL = 0x6,
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R_HPPA_LRSEL = 0x7,
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R_HPPA_RRSEL = 0x8,
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R_HPPA_NSEL = 0x9,
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R_HPPA_NLSEL = 0xa,
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R_HPPA_NLRSEL = 0xb,
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R_HPPA_PSEL = 0xc,
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R_HPPA_LPSEL = 0xd,
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R_HPPA_RPSEL = 0xe,
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R_HPPA_TSEL = 0xf,
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R_HPPA_LTSEL = 0x10,
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R_HPPA_RTSEL = 0x11,
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R_HPPA_LTPSEL = 0x12,
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R_HPPA_RTPSEL = 0x13
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};
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/* /usr/include/reloc.h defines these to constants. We want to use
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them in enums, so #undef them before we start using them. We might
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be able to fix this another way by simply managing not to include
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/usr/include/reloc.h, but currently GDB picks up these defines
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somewhere. */
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#undef e_fsel
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#undef e_lssel
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#undef e_rssel
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#undef e_lsel
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#undef e_rsel
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#undef e_ldsel
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#undef e_rdsel
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#undef e_lrsel
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#undef e_rrsel
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#undef e_nsel
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#undef e_nlsel
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#undef e_nlrsel
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#undef e_psel
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#undef e_lpsel
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#undef e_rpsel
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#undef e_tsel
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#undef e_ltsel
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#undef e_rtsel
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#undef e_one
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#undef e_two
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#undef e_pcrel
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#undef e_con
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#undef e_plabel
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#undef e_abs
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/* for compatibility */
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enum hppa_reloc_field_selector_type_alt
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{
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e_fsel = R_HPPA_FSEL,
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e_lssel = R_HPPA_LSSEL,
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e_rssel = R_HPPA_RSSEL,
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e_lsel = R_HPPA_LSEL,
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e_rsel = R_HPPA_RSEL,
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e_ldsel = R_HPPA_LDSEL,
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e_rdsel = R_HPPA_RDSEL,
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e_lrsel = R_HPPA_LRSEL,
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e_rrsel = R_HPPA_RRSEL,
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e_nsel = R_HPPA_NSEL,
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e_nlsel = R_HPPA_NLSEL,
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e_nlrsel = R_HPPA_NLRSEL,
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e_psel = R_HPPA_PSEL,
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e_lpsel = R_HPPA_LPSEL,
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e_rpsel = R_HPPA_RPSEL,
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e_tsel = R_HPPA_TSEL,
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e_ltsel = R_HPPA_LTSEL,
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e_rtsel = R_HPPA_RTSEL,
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e_ltpsel = R_HPPA_LTPSEL,
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e_rtpsel = R_HPPA_RTPSEL
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};
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enum hppa_reloc_expr_type
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{
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R_HPPA_E_ONE = 0,
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R_HPPA_E_TWO = 1,
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R_HPPA_E_PCREL = 2,
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R_HPPA_E_CON = 3,
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R_HPPA_E_PLABEL = 7,
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R_HPPA_E_ABS = 18
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};
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/* for compatibility */
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enum hppa_reloc_expr_type_alt
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{
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e_one = R_HPPA_E_ONE,
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e_two = R_HPPA_E_TWO,
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e_pcrel = R_HPPA_E_PCREL,
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e_con = R_HPPA_E_CON,
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e_plabel = R_HPPA_E_PLABEL,
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e_abs = R_HPPA_E_ABS
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};
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/* Relocations for function calls must be accompanied by parameter
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relocation bits. These bits describe exactly where the caller has
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placed the function's arguments and where it expects to find a return
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value.
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Both ELF and SOM encode this information within the addend field
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of the call relocation. (Note this could break very badly if one
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was to make a call like bl foo + 0x12345678).
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The high order 10 bits contain parameter relocation information,
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the low order 22 bits contain the constant offset. */
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#define HPPA_R_ARG_RELOC(a) \
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(((a) >> 22) & 0x3ff)
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#define HPPA_R_CONSTANT(a) \
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((((bfd_signed_vma)(a)) << (BFD_ARCH_SIZE-22)) >> (BFD_ARCH_SIZE-22))
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#define HPPA_R_ADDEND(r, c) \
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(((r) << 22) + ((c) & 0x3fffff))
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#define HPPA_WIDE (0) /* PSW W-bit, need to check! FIXME */
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/* These macros get bit fields using HP's numbering (MSB = 0),
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* but note that "MASK" assumes that the LSB bits are what's
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* wanted.
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*/
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#ifndef GET_FIELD
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#define GET_FIELD(X, FROM, TO) \
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((X) >> (31 - (TO)) & ((1 << ((TO) - (FROM) + 1)) - 1))
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#endif
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#define GET_BIT(X, WHICH) \
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GET_FIELD (X, WHICH, WHICH)
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#define MASK(SIZE) \
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(~((-1) << SIZE))
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#define CATENATE(X, XSIZE, Y, YSIZE) \
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(((X & MASK (XSIZE)) << YSIZE) | (Y & MASK (YSIZE)))
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#define ELEVEN(X) \
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CATENATE (GET_BIT (X, 10), 1, GET_FIELD (X, 0, 9), 10)
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/* Some functions to manipulate PA instructions. */
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/* NOTE: these use the HP convention that f{0} is the _left_ most
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* bit (MSB) of f; they sometimes have to impose an assumption
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* about the size of a field; and as far as I can tell, most
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* aren't used.
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*/
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#if __GNUC__ > 2 || (__GNUC__ == 2 && __GNUC_MINOR__ >= 7)
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/* Declare the functions with the unused attribute to avoid warnings. */
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static INLINE unsigned int sign_extend (unsigned int, unsigned int)
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__attribute__ ((__unused__));
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static INLINE unsigned int low_sign_extend (unsigned int, unsigned int)
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__attribute__ ((__unused__));
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static INLINE unsigned int assemble_3 (unsigned int)
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__attribute__ ((__unused__));
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static INLINE unsigned int assemble_6 (unsigned int, unsigned int)
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__attribute__ ((__unused__));
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static INLINE unsigned int assemble_12 (unsigned int, unsigned int)
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__attribute__ ((__unused__));
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static INLINE unsigned int assemble_16 (unsigned int, unsigned int)
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__attribute__ ((__unused__));
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static INLINE unsigned int assemble_16a (unsigned int, unsigned int,
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unsigned int)
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__attribute__ ((__unused__));
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static INLINE unsigned int assemble_17 (unsigned int, unsigned int,
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unsigned int)
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__attribute__ ((__unused__));
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static INLINE unsigned int assemble_21 (unsigned int)
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__attribute ((__unused__));
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static INLINE unsigned int sign_unext (unsigned int, unsigned int)
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__attribute__ ((__unused__));
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static INLINE unsigned int low_sign_unext (unsigned int, unsigned int)
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__attribute__ ((__unused__));
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static INLINE unsigned int re_assemble_3 (unsigned int, unsigned int)
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__attribute__ ((__unused__));
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static INLINE unsigned int re_assemble_12 (unsigned int, unsigned int)
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__attribute__ ((__unused__));
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static INLINE unsigned int re_assemble_16 (unsigned int, unsigned int, int)
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__attribute__ ((__unused__));
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static INLINE unsigned int re_assemble_17 (unsigned int, unsigned int)
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__attribute__ ((__unused__));
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static INLINE unsigned int re_assemble_22 (unsigned int, unsigned int)
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__attribute__ ((__unused__));
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static INLINE unsigned int re_assemble_21 (unsigned int, unsigned int)
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__attribute__ ((__unused__));
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static INLINE bfd_signed_vma hppa_field_adjust (bfd_signed_vma, bfd_signed_vma,
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enum hppa_reloc_field_selector_type_alt)
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__attribute__ ((__unused__));
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static INLINE int bfd_hppa_insn2fmt (unsigned int)
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__attribute__ ((__unused__));
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static INLINE unsigned int hppa_rebuild_insn (bfd *, unsigned int,
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unsigned int, unsigned int)
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__attribute__ ((__unused__));
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#endif /* gcc 2.7 or higher */
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/* The *sign_extend and assemble_* functions are used to assemble
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various bitfields taken from an instruction and return the
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resulting immediate value. They correspond to functions by the
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same name in HP's PA-RISC 2.0 Architecture Reference Manual. */
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static INLINE unsigned int
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sign_extend (x, len)
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unsigned int x, len;
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{
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unsigned int signbit = (1 << (len - 1));
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unsigned int mask = (signbit << 1) - 1;
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return ((x & mask) ^ signbit) - signbit;
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}
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static INLINE unsigned int
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low_sign_extend (x, len)
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unsigned int x, len;
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{
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return (x >> 1) - ((x & 1) << (len - 1));
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}
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static INLINE unsigned int
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assemble_3 (x)
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unsigned int x;
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{
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return CATENATE (GET_BIT (x, 2), 1, GET_FIELD (x, 0, 1), 2);
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}
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static INLINE unsigned int
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assemble_6 (x, y)
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unsigned int x, y;
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{
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return (((x & 1) << 5) + (32 - (y & 0x1f)));
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}
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static INLINE unsigned int
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assemble_12 (x, y)
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unsigned int x, y;
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{
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return CATENATE (CATENATE (y, 1, GET_BIT (x, 10), 1), 2,
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GET_FIELD (x, 0, 9), 9);
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}
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static INLINE unsigned int
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assemble_16 (x, y)
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unsigned int x, y;
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{
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/* Depends on PSW W-bit !*/
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unsigned int temp;
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if (HPPA_WIDE)
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temp = CATENATE (CATENATE (GET_BIT (y, 13), 1,
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(GET_BIT (y, 13) ^ GET_BIT (x, 0)), 1), 2,
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CATENATE ((GET_BIT (y, 13) ^ GET_BIT (x, 1)), 1,
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GET_FIELD (y, 0, 12), 13), 14);
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else
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temp = CATENATE (CATENATE (GET_BIT (y, 13), 1, GET_BIT (y, 13), 1), 2,
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CATENATE (GET_BIT (y, 13), 1, GET_FIELD (y, 0, 12), 13), 14);
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return sign_extend (temp, 16);
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}
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static INLINE unsigned int
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assemble_16a (x, y, z)
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unsigned int x, y, z;
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{
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/* Depends on PSW W-bit !*/
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unsigned int temp;
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if (HPPA_WIDE)
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temp = CATENATE (CATENATE (z, 1, (z ^ GET_BIT (x, 0)), 1), 2,
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CATENATE ((z ^ GET_BIT (x, 1)), 1, y, 11), 12);
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else
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temp = CATENATE (CATENATE (z, 1, z, 1), 2, CATENATE (z, 1, y, 11), 12);
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return sign_extend ((temp << 2), 16);
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}
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static INLINE unsigned int
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assemble_17 (x, y, z)
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unsigned int x, y, z;
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{
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unsigned int temp;
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temp = CATENATE (CATENATE (z, 1, x, 5), 6,
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CATENATE (GET_BIT (y, 10), 1, GET_FIELD (y, 0, 9), 10), 11);
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return temp;
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}
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static INLINE unsigned int
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assemble_21 (x)
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unsigned int x;
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{
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unsigned int temp;
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temp = (( (x & 0x000001) << 20)
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| ((x & 0x000ffe) << 8)
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| ((x & 0x003000) >> 12)
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| ((x & 0x00c000) >> 7)
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| ((x & 0x1f0000) >> 14));
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return temp;
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}
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static INLINE unsigned int
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assemble_22 (a,b,c,d)
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unsigned int a,b,c,d;
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{
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unsigned int temp;
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temp = CATENATE (CATENATE (d, 1, a, 5), 6,
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CATENATE (b, 5, ELEVEN (c), 11), 16);
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return sign_extend (temp, 22);
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}
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/* The re_assemble_* functions splice together an opcode and an
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immediate value. pa-risc uses all sorts of weird bitfields in the
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instruction to hold the value. */
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static INLINE unsigned int
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sign_unext (x, len)
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unsigned int x, len;
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{
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unsigned int len_ones;
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len_ones = ((unsigned int) 1 << len) - 1;
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return x & len_ones;
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}
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static INLINE unsigned int
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low_sign_unext (x, len)
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unsigned int x, len;
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{
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unsigned int temp;
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unsigned int sign;
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sign = (x >> (len-1)) & 1;
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temp = sign_unext (x, len-1);
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return (temp << 1) | sign;
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}
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static INLINE unsigned int
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re_assemble_3 (insn, as3)
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unsigned int insn;
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unsigned int as3;
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{
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return ((insn & ~ (7 << 13))
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| ((as3 & 4) << (13-2))
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| ((as3 & 3) << (13+1)));
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}
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static INLINE unsigned int
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re_assemble_12 (insn, as12)
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unsigned int insn;
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unsigned int as12;
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{
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return ((insn & ~ 0x1ffd)
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| ((as12 & 0x800) >> 11)
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| ((as12 & 0x400) >> (10 - 2))
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| ((as12 & 0x3ff) << (1 + 2)));
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}
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static INLINE unsigned int
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re_assemble_16 (insn, as16, wide)
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unsigned int insn;
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unsigned int as16;
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int wide;
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{
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unsigned int s, t;
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if (wide)
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{
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/* Unusual 16-bit encoding. */
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t = (as16 << 1) & 0xffff;
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s = (as16 & 0x8000);
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return (insn & ~ 0xffff) | (t ^ s ^ (s >> 1)) | (s >> 15);
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}
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else
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{
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/* Standard 14-bit encoding. */
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t = (as16 << 1) & 0x3fff;
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s = (as16 & 0x2000);
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return (insn & ~ 0xffff) | t | (s >> 13);
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}
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}
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static INLINE unsigned int
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re_assemble_17 (insn, as17)
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unsigned int insn;
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unsigned int as17;
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{
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return ((insn & ~ 0x1f1ffd)
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| ((as17 & 0x10000) >> 16)
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| ((as17 & 0x0f800) << (16 - 11))
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| ((as17 & 0x00400) >> (10 - 2))
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| ((as17 & 0x003ff) << (1 + 2)));
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}
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static INLINE unsigned int
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re_assemble_21 (insn, as21)
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unsigned int insn;
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unsigned int as21;
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{
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return ((insn & ~ 0x1fffff)
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| ((as21 & 0x100000) >> 20)
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| ((as21 & 0x0ffe00) >> 8)
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| ((as21 & 0x000180) << 7)
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| ((as21 & 0x00007c) << 14)
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| ((as21 & 0x000003) << 12));
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}
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static INLINE unsigned int
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re_assemble_22 (insn, as22)
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unsigned int insn;
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unsigned int as22;
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{
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return ((insn & ~ 0x3ff1ffd)
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| ((as22 & 0x200000) >> 21)
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| ((as22 & 0x1f0000) << (21 - 16))
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| ((as22 & 0x00f800) << (16 - 11))
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| ((as22 & 0x000400) >> (10 - 2))
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| ((as22 & 0x0003ff) << (1 + 2)));
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}
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/* Handle field selectors for PA instructions.
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The L and R (and LS, RS etc.) selectors are used in pairs to form a
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full 32 bit address. eg.
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LDIL L'start,%r1 ; put left part into r1
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LDW R'start(%r1),%r2 ; add r1 and right part to form address
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This function returns sign extended values in all cases.
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*/
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static INLINE bfd_signed_vma
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hppa_field_adjust (sym_val, addend, r_field)
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bfd_signed_vma sym_val;
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bfd_signed_vma addend;
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enum hppa_reloc_field_selector_type_alt r_field;
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{
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bfd_signed_vma value;
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value = sym_val + addend;
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switch (r_field)
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{
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case e_fsel:
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case e_nsel:
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/* F: No change. */
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break;
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case e_lsel:
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case e_nlsel:
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/* L: Select top 21 bits. */
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value = value >> 11;
|
|
break;
|
|
|
|
case e_rsel:
|
|
/* R: Select bottom 11 bits. */
|
|
value = value & 0x7ff;
|
|
break;
|
|
|
|
case e_lssel:
|
|
/* LS: Round to nearest multiple of 2048 then select top 21 bits. */
|
|
value = value + 0x400;
|
|
value = value >> 11;
|
|
break;
|
|
|
|
case e_rssel:
|
|
/* RS: Select bottom 11 bits for LS.
|
|
We need to return a value such that 2048 * LS'x + RS'x == x.
|
|
ie. RS'x = x - ((x + 0x400) & -0x800)
|
|
this is just a sign extension from bit 21. */
|
|
value = ((value & 0x7ff) ^ 0x400) - 0x400;
|
|
break;
|
|
|
|
case e_ldsel:
|
|
/* LD: Round to next multiple of 2048 then select top 21 bits.
|
|
Yes, if we are already on a multiple of 2048, we go up to the
|
|
next one. RD in this case will be -2048. */
|
|
value = value + 0x800;
|
|
value = value >> 11;
|
|
break;
|
|
|
|
case e_rdsel:
|
|
/* RD: Set bits 0-20 to one. */
|
|
value = value | -0x800;
|
|
break;
|
|
|
|
case e_lrsel:
|
|
case e_nlrsel:
|
|
/* LR: L with rounding of the addend to nearest 8k. */
|
|
value = sym_val + ((addend + 0x1000) & -0x2000);
|
|
value = value >> 11;
|
|
break;
|
|
|
|
case e_rrsel:
|
|
/* RR: R with rounding of the addend to nearest 8k.
|
|
We need to return a value such that 2048 * LR'x + RR'x == x
|
|
ie. RR'x = s+a - (s + (((a + 0x1000) & -0x2000) & -0x800))
|
|
. = s+a - ((s & -0x800) + ((a + 0x1000) & -0x2000))
|
|
. = (s & 0x7ff) + a - ((a + 0x1000) & -0x2000) */
|
|
value = (sym_val & 0x7ff) + (((addend & 0x1fff) ^ 0x1000) - 0x1000);
|
|
break;
|
|
|
|
default:
|
|
abort ();
|
|
}
|
|
return value;
|
|
}
|
|
|
|
/* PA-RISC OPCODES */
|
|
#define get_opcode(insn) (((insn) >> 26) & 0x3f)
|
|
|
|
/* FIXME: this list is incomplete. It should also be an enumerated
|
|
type rather than #defines. */
|
|
|
|
#define LDO 0x0d
|
|
#define LDB 0x10
|
|
#define LDH 0x11
|
|
#define LDW 0x12
|
|
#define LDWM 0x13
|
|
#define STB 0x18
|
|
#define STH 0x19
|
|
#define STW 0x1a
|
|
#define STWM 0x1b
|
|
#define COMICLR 0x24
|
|
#define SUBI 0x25
|
|
#define SUBIO 0x25
|
|
#define ADDIT 0x2c
|
|
#define ADDITO 0x2c
|
|
#define ADDI 0x2d
|
|
#define ADDIO 0x2d
|
|
#define LDIL 0x08
|
|
#define ADDIL 0x0a
|
|
|
|
#define MOVB 0x32
|
|
#define MOVIB 0x33
|
|
#define COMBT 0x20
|
|
#define COMBF 0x22
|
|
#define COMIBT 0x21
|
|
#define COMIBF 0x23
|
|
#define ADDBT 0x28
|
|
#define ADDBF 0x2a
|
|
#define ADDIBT 0x29
|
|
#define ADDIBF 0x2b
|
|
#define BVB 0x30
|
|
#define BB 0x31
|
|
|
|
#define BL 0x3a
|
|
#define BLE 0x39
|
|
#define BE 0x38
|
|
|
|
#define CMPBDT 0x27
|
|
#define CMPBDF 0x2f
|
|
#define CMPIBD 0x3b
|
|
#define LDD 0x14
|
|
#define STD 0x1c
|
|
#define LDWL 0x17
|
|
#define STWL 0x1f
|
|
#define FLDW 0x16
|
|
#define FSTW 0x1e
|
|
|
|
/* Given a machine instruction, return its format.
|
|
|
|
FIXME: opcodes which do not map to a known format
|
|
should return an error of some sort. */
|
|
|
|
static INLINE int
|
|
bfd_hppa_insn2fmt (insn)
|
|
unsigned int insn;
|
|
{
|
|
unsigned char op = get_opcode (insn);
|
|
|
|
switch (op)
|
|
{
|
|
case ADDI:
|
|
case ADDIT:
|
|
case SUBI:
|
|
return 11;
|
|
|
|
case MOVB:
|
|
case MOVIB:
|
|
case COMBT:
|
|
case COMBF:
|
|
case COMIBT:
|
|
case COMIBF:
|
|
case ADDBT:
|
|
case ADDBF:
|
|
case ADDIBT:
|
|
case ADDIBF:
|
|
case BVB:
|
|
case BB:
|
|
case CMPBDT:
|
|
case CMPBDF:
|
|
case CMPIBD:
|
|
return 12;
|
|
|
|
case LDO:
|
|
case LDB:
|
|
case LDH:
|
|
case LDW:
|
|
case LDWM:
|
|
case STB:
|
|
case STH:
|
|
case STW:
|
|
case STWM:
|
|
return 14;
|
|
|
|
case LDWL:
|
|
case STWL:
|
|
case FLDW:
|
|
case FSTW:
|
|
/* This is a hack. Unfortunately, format 11 is already taken
|
|
and we're using integers rather than an enum, so it's hard
|
|
to describe the 11a format. */
|
|
return -11;
|
|
|
|
case LDD:
|
|
case STD:
|
|
return 10;
|
|
|
|
case BL:
|
|
case BE:
|
|
case BLE:
|
|
if ((insn & 0x00008000) != 0)
|
|
return 22;
|
|
return 17;
|
|
|
|
case LDIL:
|
|
case ADDIL:
|
|
return 21;
|
|
|
|
default:
|
|
break;
|
|
}
|
|
return 32;
|
|
}
|
|
|
|
|
|
/* Insert VALUE into INSN using R_FORMAT to determine exactly what
|
|
bits to change. */
|
|
|
|
static INLINE unsigned int
|
|
hppa_rebuild_insn (abfd, insn, value, r_format)
|
|
bfd *abfd ATTRIBUTE_UNUSED;
|
|
unsigned int insn;
|
|
unsigned int value;
|
|
unsigned int r_format;
|
|
{
|
|
switch (r_format)
|
|
{
|
|
case 11: return (insn & ~ 0x7ff) | low_sign_unext (value, 11);
|
|
case 12: return re_assemble_12 (insn, value);
|
|
case 14: return (insn & ~ 0x3fff) | low_sign_unext (value, 14);
|
|
case 17: return re_assemble_17 (insn, value);
|
|
case 21: return re_assemble_21 (insn, value);
|
|
case 32: return value;
|
|
|
|
default:
|
|
abort ();
|
|
}
|
|
return insn;
|
|
}
|
|
|
|
#endif /* _HPPA_H */
|