f8b447819b
When building a shared lib from non-PIC objects, we'll get dynamic text relocations. These need to move with any insns we move. Otherwise the dynamic reloc will modify the branch, resulting in crashes and other unpleasant behaviour. Also, ld -r --ppc476-workaround used with sufficiently aligned PIC objects needs a fix for emitted REL16 relocs. bfd/ * elf64-ppc.c (ppc_elf_relocate_section): Move dynamic text relocs with insns moved by --ppc476-workaround. Correct output of REL16 relocs. ld/testsuite/ * ld-powerpc/ppc476-shared.s, * ld-powerpc/ppc476-shared.lnk, * ld-powerpc/ppc476-shared.d, * ld-powerpc/ppc476-shared2.d: New tests. * ld-powerpc/powerpc.exp: Run them.
30 lines
1.1 KiB
Makefile
30 lines
1.1 KiB
Makefile
#source: ppc476-shared.s
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#as: -a32
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#ld: -melf32ppc -q -shared --ppc476-workaround -T ppc476-shared.lnk
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#objdump: -dr
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#target: powerpc*-*-*
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.*: file format .*
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Disassembly of section \.text:
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0+fffc <\.text>:
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fffc: (48 01 00 04|04 00 01 48) b 20000 .*
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10000: (38 63 00 00|00 00 63 38) addi r3,r3,0
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1000[02]: R_PPC_ADDR16_LO .bss
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\.\.\.
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1fff0: (42 9f 00 05|05 00 9f 42) bcl .*
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1fff4: (7d 28 02 a6|a6 02 28 7d) mflr r9
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1fff8: (3d 29 00 00|00 00 29 3d) addis r9,r9,0
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1fff[8a]: R_PPC_REL16_HA .bss\+0x[46]
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1fffc: (48 00 00 14|14 00 00 48) b 20010 .*
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20000: (3c 60 00 00|00 00 60 3c) lis r3,0
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2000[02]: R_PPC_ADDR16_HA .bss
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20004: (4b fe ff fc|fc ff fe 4b) b 10000 .*
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20008: (48 00 00 02|02 00 00 48) ba 0 .*
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2000c: (48 00 00 02|02 00 00 48) ba 0 .*
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20010: (39 29 01 00|00 01 29 39) addi r9,r9,256
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2001[02]: R_PPC_REL16_LO .bss\+0x1[ce]
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20014: (4b ff ff ec|ec ff ff 4b) b 20000 .*
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20018: (48 00 00 02|02 00 00 48) ba 0 .*
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2001c: (48 00 00 02|02 00 00 48) ba 0 .*
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