old-cross-binutils/sim/mips
Gavin Romig-Koch dd15abd5a6 * vr4320.igen: New file.
* Makefile.in (vr4320.igen) : Added.
	* configure.in (mips64vr4320-*-*): Added.
	* configure : Rebuilt.
	* mips.igen : Correct the bfd-names in the mips-ISA model entries.
	Add the vr4320 model entry and mark the vr4320 insn as necessary.
1998-03-03 17:03:57 +00:00
..
.Sanitize add sky-gdb.c to sky_files 1998-03-02 14:43:52 +00:00
ChangeLog * vr4320.igen: New file. 1998-03-03 17:03:57 +00:00
config.in Get configure to define RETSIGTYPE 1997-04-07 05:58:59 +00:00
configure sim-main.h: Re-arange r5900 registers so that they have their own 1998-02-23 16:55:38 +00:00
configure.in * vr4320.igen: New file. 1998-03-03 17:03:57 +00:00
gencode.c * mips.igen (MSUB): Fix to work like MADD. 1997-12-11 00:11:04 +00:00
interp.c Add generic sim-info.c:sim_info() function using module mechanism. 1998-02-28 02:51:06 +00:00
m16.dc New files, update .Sanitize 1998-02-05 22:08:33 +00:00
m16.igen Separate r5900 specifoc and mips16 instructions. 1997-10-27 07:55:24 +00:00
Makefile.in sky-gdb.c: new file - temporary demo version of the sim interface 1998-03-01 14:41:38 +00:00
mdmx.igen Add generic sim-info.c:sim_info() function using module mechanism. 1998-02-28 02:51:06 +00:00
mips.dc MIPS/IGEN checkpoint - doesn't build. 1997-10-08 04:16:01 +00:00
mips.igen Fix DIV, DIV1 (wrong check for overflow) and DIVU1 (shouldn't check 1998-03-03 05:39:49 +00:00
README.Cygnus Document existence of old (gencode) and new (igen) MIPS ISA simulators. 1998-01-16 01:09:15 +00:00
sim-main.h Fix DIV, DIV1 (wrong check for overflow) and DIVU1 (shouldn't check 1998-03-03 05:39:49 +00:00
sky-pke.c * Major endianness fixes on sky code today. The milestone sample and existing 1998-02-27 21:52:40 +00:00
sky-pke.h * Major endianness fixes on sky code today. The milestone sample and existing 1998-02-27 21:52:40 +00:00
sky-vu0.c * Major endianness fixes on sky code today. The milestone sample and existing 1998-02-27 21:52:40 +00:00
sky-vu0.h * Added VU0_CIA register #define. 1998-02-16 22:09:57 +00:00
sky-vu1.c * Continuing PKE sim unit tests. Found little bugs in VU instead. 1998-03-03 00:00:09 +00:00
sky-vu1.h * Add magic VU1_CIA register. 1998-02-16 22:07:11 +00:00
tconfig.in * Makefile.in: Delete stuff moved to ../common/Make-common.in. 1996-11-20 10:00:42 +00:00
vr4320.igen * vr4320.igen: New file. 1998-03-03 17:03:57 +00:00
vr5400.igen For MADD et.al. instructions sign extend 32 bit result assigned to a 1997-12-13 04:23:31 +00:00

This directory contains two very different simulators:

	o	gencode (old)

		Gencode.c outputs a single monolithic file that is
		#included by interp.c

	o	igen (new)

		The *.igen files are used as inputs to ../igen/igen.
		A number of separate, fairly modula files, are created.

The new simulator has a number of advantages:

	o	builtin support for multi-simming (single simulator
		image supporting a number of different instruction
		set architectures).

	o	Easier maintenance. The input files are not confused
		by an intermixing with the generator code.

gencode continues to exist so that old architectures can be emulated.
*.igen should be used when adding new architectures or adding
instructions to an existing ISA.

Known bugs?

A mips16 simulator cannot be built using igen.  A custom mips16
engine.c needs to be written.

In mips.igen, the semantics for many of the instructions were created
using code generated by gencode.  Those semantic segments could be
greatly simplified.


----

Old README.Cygnus ...

> README.Cygnus
-------------------------------------------------------------------------------

The following are the main reasons for constructing the simulator as a
generator:

1) Avoid large fixed decode source file, with lots of #ifs controlling
   the compilation. i.e. keep the source cleaner, smaller and easier
   to parse.

2) Allow optimum code to be created, without run-time checks on
   instruction types. Ensure that the simulator engine only includes
   code for the architecture being targetted. e.g. This avoids
   run-time checks on ISA conformance, aswell as increasing
   throughput.

3) Allow updates to the instruction sets to be added quickly. Having a
   table means that the information is together, and is easier to
   manipulate. Having the table generate the engine, rather than the
   run-time parse the table gives higher performance at simulation
   time.

4) Keep all the similar simulation code together. i.e. have a single
   place where, for example, the addition code is held. This ensures that
   updates to the simulation are not spread over a large flat source
   file maintained by the developer.

-------------------------------------------------------------------------------

To keep the simulator simple (and to avoid the slight chance of
mis-matched files) the manifests describing an engine, and the
simulator engine itself, are held in the same source file.

This means that the engine must be included twice, with the first pass
controlled by the SIM_MANIFESTS definition.

-------------------------------------------------------------------------------
> EOF README.Cygnus