26d97720ed
* config/tc-arm.c (parse_address_main): Handle -0 offsets. (encode_arm_addr_mode_2): Set default sign of zero here ... (encode_arm_addr_mode_3): ... and here. (encode_arm_cp_address): ... and here. (md_apply_fix): Use default sign of zero here. gas/testsuite/ * gas/arm/inst.d: Adjust for signed zero offsets. * gas/arm/ldst-offset0.d: New test. * gas/arm/ldst-offset0.s: New test. * gas/arm/offset-1.d: New test. * gas/arm/offset-1.s: New test. ld/testsuite/ Adjust tests for zero offset formatting. * ld-arm/cortex-a8-fix-bcc-plt.d: Adjust. * ld-arm/farcall-arm-arm-pic-veneer.d: Adjust. * ld-arm/farcall-arm-thumb.d: Adjust. * ld-arm/farcall-group-size2.d: Adjust. * ld-arm/farcall-group.d: Adjust. * ld-arm/farcall-mix.d: Adjust. * ld-arm/farcall-mix2.d: Adjust. * ld-arm/farcall-mixed-lib-v4t.d: Adjust. * ld-arm/farcall-mixed-lib.d: Adjust. * ld-arm/farcall-thumb-arm-blx-pic-veneer.d: Adjust. * ld-arm/farcall-thumb-arm-pic-veneer.d: Adjust. * ld-arm/farcall-thumb-thumb.d: Adjust. * ld-arm/ifunc-10.dd: Adjust. * ld-arm/ifunc-3.dd: Adjust. * ld-arm/ifunc-4.dd: Adjust. * ld-arm/ifunc-5.dd: Adjust. * ld-arm/ifunc-6.dd: Adjust. * ld-arm/ifunc-7.dd: Adjust. * ld-arm/ifunc-8.dd: Adjust. * ld-arm/jump-reloc-veneers-long.d: Adjust. * ld-arm/tls-longplt-lib.d: Adjust. * ld-arm/tls-thumb1.d: Adjust. opcodes/ * arm-dis.c (print_insn_coprocessor): Explicitly print #-0 as address offset. (print_arm_address): Likewise. Elide positive #0 appropriately. (print_insn_arm): Likewise.
56 lines
1.3 KiB
Makefile
56 lines
1.3 KiB
Makefile
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.*: file format .*
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Disassembly of section .text:
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00001000 <_start>:
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1000: eb00000c bl 1038 <__bar_from_arm>
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1004: eb00000e bl 1044 <__bar2_veneer>
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00001008 <myfunc>:
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1008: eb000008 bl 1030 <__bar3_veneer>
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100c: eb000004 bl 1024 <__bar4_from_arm>
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1010: eb000000 bl 1018 <__bar5_from_arm>
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1014: 00000000 andeq r0, r0, r0
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00001018 <__bar5_from_arm>:
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1018: e59fc000 ldr ip, \[pc\] ; 1020 <__bar5_from_arm\+0x8>
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101c: e12fff1c bx ip
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1020: 0200302f .word 0x0200302f
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00001024 <__bar4_from_arm>:
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1024: e59fc000 ldr ip, \[pc\] ; 102c <__bar4_from_arm\+0x8>
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1028: e12fff1c bx ip
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102c: 0200302d .word 0x0200302d
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00001030 <__bar3_veneer>:
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1030: e51ff004 ldr pc, \[pc, #-4\] ; 1034 <__bar3_veneer\+0x4>
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1034: 02003028 .word 0x02003028
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00001038 <__bar_from_arm>:
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1038: e59fc000 ldr ip, \[pc\] ; 1040 <__bar_from_arm\+0x8>
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103c: e12fff1c bx ip
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1040: 02003021 .word 0x02003021
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00001044 <__bar2_veneer>:
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1044: e51ff004 ldr pc, \[pc, #-4\] ; 1048 <__bar2_veneer\+0x4>
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1048: 02003024 .word 0x02003024
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...
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Disassembly of section .foo:
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02003020 <bar>:
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2003020: 4770 bx lr
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...
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02003024 <bar2>:
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2003024: e12fff1e bx lr
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02003028 <bar3>:
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2003028: e12fff1e bx lr
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0200302c <bar4>:
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200302c: 4770 bx lr
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0200302e <bar5>:
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200302e: 4770 bx lr
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