256 lines
9.8 KiB
C
256 lines
9.8 KiB
C
/* Definitions to target GDB to GNU/Linux on an ia64 architecture.
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Copyright 1992, 1993, 2000 Free Software Foundation, Inc.
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This file is part of GDB.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 59 Temple Place - Suite 330,
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Boston, MA 02111-1307, USA. */
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#ifndef TM_IA64_H
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#define TM_IA64_H
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#if !defined(GDBSERVER)
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#define GDB_MULTI_ARCH 1
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#else /* defines needed for GDBSERVER */
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/* ia64 is little endian by default */
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#define TARGET_BYTE_ORDER LITTLE_ENDIAN
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/* Say how long (ordinary) registers are. This is a piece of bogosity
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used in push_word and a few other places; REGISTER_RAW_SIZE is the
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real way to know how big a register is. */
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#define REGISTER_SIZE 8
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#undef NUM_REGS
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#define NUM_REGS 590
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/* Some pseudo register numbers */
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#define PC_REGNUM IA64_IP_REGNUM
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#define SP_REGNUM IA64_GR12_REGNUM
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#define FP_REGNUM IA64_VFP_REGNUM
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/* Total amount of space needed to store our copies of the machine's
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register state, the array `registers'. On the ia64, all registers
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fit in 64 bits except for the floating point registers which require
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84 bits. But 84 isn't a nice number, so we'll just allocate 128
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bits for each of these. The expression below says that we
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need 8 bytes for each register, plus an additional 8 bytes for each
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of the 128 floating point registers. */
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#define REGISTER_BYTES (NUM_REGS*8+128*8)
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/* Index within `registers' of the first byte of the space for
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register N. */
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#define REGISTER_BYTE(N) (((N) * 8) \
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+ ((N) <= IA64_FR0_REGNUM ? 0 : 8 * (((N) > IA64_FR127_REGNUM) ? 128 : (N) - IA64_FR0_REGNUM)))
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/* Number of bytes of storage in the actual machine representation
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for register N. */
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#define REGISTER_RAW_SIZE(N) \
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((IA64_FR0_REGNUM <= (N) && (N) <= IA64_FR127_REGNUM) ? 16 : 8)
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/* Largest value REGISTER_RAW_SIZE can have. */
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#define MAX_REGISTER_RAW_SIZE 16
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#define GDBSERVER_RESUME_REGS { IA64_IP_REGNUM, IA64_PSR_REGNUM, SP_REGNUM, IA64_BSP_REGNUM, IA64_CFM_REGNUM }
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#endif /* GDBSERVER */
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/* Register numbers of various important registers */
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/* General registers; there are 128 of these 64 bit wide registers. The
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first 32 are static and the last 96 are stacked. */
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#define IA64_GR0_REGNUM 0
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#define IA64_GR1_REGNUM (IA64_GR0_REGNUM+1)
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#define IA64_GR2_REGNUM (IA64_GR0_REGNUM+2)
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#define IA64_GR3_REGNUM (IA64_GR0_REGNUM+3)
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#define IA64_GR4_REGNUM (IA64_GR0_REGNUM+4)
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#define IA64_GR5_REGNUM (IA64_GR0_REGNUM+5)
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#define IA64_GR6_REGNUM (IA64_GR0_REGNUM+6)
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#define IA64_GR7_REGNUM (IA64_GR0_REGNUM+7)
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#define IA64_GR8_REGNUM (IA64_GR0_REGNUM+8)
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#define IA64_GR9_REGNUM (IA64_GR0_REGNUM+9)
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#define IA64_GR10_REGNUM (IA64_GR0_REGNUM+10)
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#define IA64_GR11_REGNUM (IA64_GR0_REGNUM+11)
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#define IA64_GR12_REGNUM (IA64_GR0_REGNUM+12)
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#define IA64_GR31_REGNUM (IA64_GR0_REGNUM+31)
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#define IA64_GR32_REGNUM (IA64_GR0_REGNUM+32)
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#define IA64_GR127_REGNUM (IA64_GR0_REGNUM+127)
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/* Floating point registers; 128 82-bit wide registers */
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#define IA64_FR0_REGNUM 128
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#define IA64_FR1_REGNUM (IA64_FR0_REGNUM+1)
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#define IA64_FR2_REGNUM (IA64_FR0_REGNUM+2)
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#define IA64_FR8_REGNUM (IA64_FR0_REGNUM+8)
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#define IA64_FR9_REGNUM (IA64_FR0_REGNUM+9)
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#define IA64_FR10_REGNUM (IA64_FR0_REGNUM+10)
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#define IA64_FR11_REGNUM (IA64_FR0_REGNUM+11)
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#define IA64_FR12_REGNUM (IA64_FR0_REGNUM+12)
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#define IA64_FR13_REGNUM (IA64_FR0_REGNUM+13)
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#define IA64_FR14_REGNUM (IA64_FR0_REGNUM+14)
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#define IA64_FR15_REGNUM (IA64_FR0_REGNUM+15)
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#define IA64_FR16_REGNUM (IA64_FR0_REGNUM+16)
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#define IA64_FR31_REGNUM (IA64_FR0_REGNUM+31)
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#define IA64_FR32_REGNUM (IA64_FR0_REGNUM+32)
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#define IA64_FR127_REGNUM (IA64_FR0_REGNUM+127)
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/* Predicate registers; There are 64 of these one bit registers.
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It'd be more convenient (implementation-wise) to use a single
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64 bit word with all of these register in them. Note that there's
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also a IA64_PR_REGNUM below which contains all the bits and is used for
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communicating the actual values to the target. */
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#define IA64_PR0_REGNUM 256
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#define IA64_PR1_REGNUM (IA64_PR0_REGNUM+1)
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#define IA64_PR2_REGNUM (IA64_PR0_REGNUM+2)
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#define IA64_PR3_REGNUM (IA64_PR0_REGNUM+3)
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#define IA64_PR4_REGNUM (IA64_PR0_REGNUM+4)
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#define IA64_PR5_REGNUM (IA64_PR0_REGNUM+5)
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#define IA64_PR6_REGNUM (IA64_PR0_REGNUM+6)
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#define IA64_PR7_REGNUM (IA64_PR0_REGNUM+7)
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#define IA64_PR8_REGNUM (IA64_PR0_REGNUM+8)
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#define IA64_PR9_REGNUM (IA64_PR0_REGNUM+9)
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#define IA64_PR10_REGNUM (IA64_PR0_REGNUM+10)
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#define IA64_PR11_REGNUM (IA64_PR0_REGNUM+11)
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#define IA64_PR12_REGNUM (IA64_PR0_REGNUM+12)
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#define IA64_PR13_REGNUM (IA64_PR0_REGNUM+13)
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#define IA64_PR14_REGNUM (IA64_PR0_REGNUM+14)
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#define IA64_PR15_REGNUM (IA64_PR0_REGNUM+15)
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#define IA64_PR16_REGNUM (IA64_PR0_REGNUM+16)
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#define IA64_PR17_REGNUM (IA64_PR0_REGNUM+17)
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#define IA64_PR18_REGNUM (IA64_PR0_REGNUM+18)
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#define IA64_PR19_REGNUM (IA64_PR0_REGNUM+19)
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#define IA64_PR20_REGNUM (IA64_PR0_REGNUM+20)
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#define IA64_PR21_REGNUM (IA64_PR0_REGNUM+21)
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#define IA64_PR22_REGNUM (IA64_PR0_REGNUM+22)
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#define IA64_PR23_REGNUM (IA64_PR0_REGNUM+23)
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#define IA64_PR24_REGNUM (IA64_PR0_REGNUM+24)
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#define IA64_PR25_REGNUM (IA64_PR0_REGNUM+25)
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#define IA64_PR26_REGNUM (IA64_PR0_REGNUM+26)
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#define IA64_PR27_REGNUM (IA64_PR0_REGNUM+27)
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#define IA64_PR28_REGNUM (IA64_PR0_REGNUM+28)
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#define IA64_PR29_REGNUM (IA64_PR0_REGNUM+29)
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#define IA64_PR30_REGNUM (IA64_PR0_REGNUM+30)
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#define IA64_PR31_REGNUM (IA64_PR0_REGNUM+31)
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#define IA64_PR32_REGNUM (IA64_PR0_REGNUM+32)
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#define IA64_PR33_REGNUM (IA64_PR0_REGNUM+33)
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#define IA64_PR34_REGNUM (IA64_PR0_REGNUM+34)
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#define IA64_PR35_REGNUM (IA64_PR0_REGNUM+35)
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#define IA64_PR36_REGNUM (IA64_PR0_REGNUM+36)
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#define IA64_PR37_REGNUM (IA64_PR0_REGNUM+37)
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#define IA64_PR38_REGNUM (IA64_PR0_REGNUM+38)
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#define IA64_PR39_REGNUM (IA64_PR0_REGNUM+39)
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#define IA64_PR40_REGNUM (IA64_PR0_REGNUM+40)
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#define IA64_PR41_REGNUM (IA64_PR0_REGNUM+41)
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#define IA64_PR42_REGNUM (IA64_PR0_REGNUM+42)
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#define IA64_PR43_REGNUM (IA64_PR0_REGNUM+43)
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#define IA64_PR44_REGNUM (IA64_PR0_REGNUM+44)
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#define IA64_PR45_REGNUM (IA64_PR0_REGNUM+45)
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#define IA64_PR46_REGNUM (IA64_PR0_REGNUM+46)
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#define IA64_PR47_REGNUM (IA64_PR0_REGNUM+47)
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#define IA64_PR48_REGNUM (IA64_PR0_REGNUM+48)
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#define IA64_PR49_REGNUM (IA64_PR0_REGNUM+49)
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#define IA64_PR50_REGNUM (IA64_PR0_REGNUM+50)
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#define IA64_PR51_REGNUM (IA64_PR0_REGNUM+51)
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#define IA64_PR52_REGNUM (IA64_PR0_REGNUM+52)
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#define IA64_PR53_REGNUM (IA64_PR0_REGNUM+53)
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#define IA64_PR54_REGNUM (IA64_PR0_REGNUM+54)
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#define IA64_PR55_REGNUM (IA64_PR0_REGNUM+55)
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#define IA64_PR56_REGNUM (IA64_PR0_REGNUM+56)
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#define IA64_PR57_REGNUM (IA64_PR0_REGNUM+57)
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#define IA64_PR58_REGNUM (IA64_PR0_REGNUM+58)
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#define IA64_PR59_REGNUM (IA64_PR0_REGNUM+59)
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#define IA64_PR60_REGNUM (IA64_PR0_REGNUM+60)
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#define IA64_PR61_REGNUM (IA64_PR0_REGNUM+61)
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#define IA64_PR62_REGNUM (IA64_PR0_REGNUM+62)
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#define IA64_PR63_REGNUM (IA64_PR0_REGNUM+63)
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/* Branch registers: 8 64-bit registers for holding branch targets */
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#define IA64_BR0_REGNUM 320
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#define IA64_BR1_REGNUM (IA64_BR0_REGNUM+1)
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#define IA64_BR2_REGNUM (IA64_BR0_REGNUM+2)
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#define IA64_BR3_REGNUM (IA64_BR0_REGNUM+3)
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#define IA64_BR4_REGNUM (IA64_BR0_REGNUM+4)
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#define IA64_BR5_REGNUM (IA64_BR0_REGNUM+5)
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#define IA64_BR6_REGNUM (IA64_BR0_REGNUM+6)
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#define IA64_BR7_REGNUM (IA64_BR0_REGNUM+7)
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/* Virtual frame pointer; this matches IA64_FRAME_POINTER_REGNUM in
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gcc/config/ia64/ia64.h. */
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#define IA64_VFP_REGNUM 328
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/* Virtual return address pointer; this matches IA64_RETURN_ADDRESS_POINTER_REGNUM
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in gcc/config/ia64/ia64.h. */
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#define IA64_VRAP_REGNUM 329
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/* Predicate registers: There are 64 of these 1-bit registers. We
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define a single register which is used to communicate these values
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to/from the target. We will somehow contrive to make it appear that
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IA64_PR0_REGNUM thru IA64_PR63_REGNUM hold the actual values. */
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#define IA64_PR_REGNUM 330
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/* Instruction pointer: 64 bits wide */
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#define IA64_IP_REGNUM 331
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/* Process Status Register */
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#define IA64_PSR_REGNUM 332
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/* Current Frame Marker (Raw form may be the cr.ifs) */
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#define IA64_CFM_REGNUM 333
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/* Application registers; 128 64-bit wide registers possible, but some
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of them are reserved */
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#define IA64_AR0_REGNUM 334
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#define IA64_KR0_REGNUM (IA64_AR0_REGNUM+0)
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#define IA64_KR7_REGNUM (IA64_KR0_REGNUM+7)
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#define IA64_RSC_REGNUM (IA64_AR0_REGNUM+16)
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#define IA64_BSP_REGNUM (IA64_AR0_REGNUM+17)
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#define IA64_BSPSTORE_REGNUM (IA64_AR0_REGNUM+18)
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#define IA64_RNAT_REGNUM (IA64_AR0_REGNUM+19)
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#define IA64_FCR_REGNUM (IA64_AR0_REGNUM+21)
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#define IA64_EFLAG_REGNUM (IA64_AR0_REGNUM+24)
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#define IA64_CSD_REGNUM (IA64_AR0_REGNUM+25)
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#define IA64_SSD_REGNUM (IA64_AR0_REGNUM+26)
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#define IA64_CFLG_REGNUM (IA64_AR0_REGNUM+27)
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#define IA64_FSR_REGNUM (IA64_AR0_REGNUM+28)
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#define IA64_FIR_REGNUM (IA64_AR0_REGNUM+29)
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#define IA64_FDR_REGNUM (IA64_AR0_REGNUM+30)
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#define IA64_CCV_REGNUM (IA64_AR0_REGNUM+32)
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#define IA64_UNAT_REGNUM (IA64_AR0_REGNUM+36)
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#define IA64_FPSR_REGNUM (IA64_AR0_REGNUM+40)
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#define IA64_ITC_REGNUM (IA64_AR0_REGNUM+44)
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#define IA64_PFS_REGNUM (IA64_AR0_REGNUM+64)
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#define IA64_LC_REGNUM (IA64_AR0_REGNUM+65)
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#define IA64_EC_REGNUM (IA64_AR0_REGNUM+66)
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/* NAT (Not A Thing) Bits for the general registers; there are 128 of these */
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#define IA64_NAT0_REGNUM 462
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#define IA64_NAT31_REGNUM (IA64_NAT0_REGNUM+31)
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#define IA64_NAT32_REGNUM (IA64_NAT0_REGNUM+32)
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#define IA64_NAT127_REGNUM (IA64_NAT0_REGNUM+127)
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#endif /* TM_IA64_H */
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