d2cd120565
* config/tc-arm.c (parse_psr): Add LHS argument. Improve support
for *APSR bitmasks.
(operand_parse_code): Replace OP_PSR with OP_wPSR and OP_rPSR.
Remove OP_RVC_PSR.
(parse_operands): Likewise.
(do_mrs): Tweak error message for constraint.
(do_t_mrs): Update constraints for changes to APSR support.
(do_t_msr): Likewise. Don't set PSR_f flag here.
(psrs): Remove "g", "nzcvq", "nzcvqg".
(insns): Tweak entries for msr and mrs instructions.
opcodes/
* arm-dis.c (psr_name): Fix typo for BASEPRI_MAX.
(print_insn_thumb32): Add APSR bitmask support.
gas/testsuite/
* gas/arm/mrs-msr-thumb-v7-m.s: New.
* gas/arm/mrs-msr-thumb-v7-m.d: New.
* gas/arm/mrs-msr-thumb-v7-m-bad.d: New.
* gas/arm/mrs-msr-thumb-v7-m-bad.l: New.
* gas/arm/mrs-msr-thumb-v7-m-bad.s: New.
* gas/arm/mrs-msr-thumb-v7e-m.d: New.
* gas/arm/mrs-msr-thumb-v7e-m.s: New.
* gas/arm/mrs-msr-arm-v7-a-bad.d: New.
* gas/arm/mrs-msr-arm-v7-a-bad.l: New.
* gas/arm/mrs-msr-arm-v7-a-bad.s: New.
* gas/arm/mrs-msr-arm-v7-a.d: New.
* gas/arm/mrs-msr-arm-v7-a.s: New.
* gas/arm/mrs-msr-arm-v6.d: New.
* gas/arm/mrs-msr-arm-v6.s: New.
* gas/arm/mrs-msr-thumb-v6t2.d: New.
* gas/arm/mrs-msr-thumb-v6t2.s: New.
* gas/arm/arch7.d: Fix typo in disassembly for BASEPRI_MAX,
bitmasks for IAPSR etc.
* gas/arm/arch7.s: Specify bitmask for APSR writes.
* gas/arm/archv6m.s: Likewise.
* msr-imm-bad.l: Tweak expected disassembly in error message.
* msr-reg-bad.l: Likewise.
* msr-imm.d: Tweak expected disassembly.
* msr-reg.d: Likewise.
* msr-reg-thumb.d: Likewise.
* msr-imm.s: Specify bitmask on APSR writes.
* msr-reg.s: Add comment about deprecated usage.
220 lines
6.5 KiB
Text
220 lines
6.5 KiB
Text
2011-04-11 Julian Brown <julian@codesourcery.com>
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* arm-dis.c (psr_name): Fix typo for BASEPRI_MAX.
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(print_insn_thumb32): Add APSR bitmask support.
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2011-04-07 Paul Carroll<pcarroll@codesourcery.com>
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* arm-dis.c (print_insn): init vars moved into private_data structure.
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2011-03-24 Mike Frysinger <vapier@gentoo.org>
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* bfin-dis.c (decode_dsp32mac_0): Move MM zeroing down to MAC0 logic.
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2011-03-22 Eric B. Weddington <eric.weddington@atmel.com>
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* avr-dis.c (avr_operand): Add opcode_str parameter. Check for
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post-increment to support LPM Z+ instruction. Add support for 'E'
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constraint for DES instruction.
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(print_insn_avr): Adjust calls to avr_operand. Rename variable.
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2011-03-14 Richard Sandiford <richard.sandiford@linaro.org>
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* arm-dis.c (get_sym_code_type): Treat STT_GNU_IFUNCs as code.
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2011-03-14 Richard Sandiford <richard.sandiford@linaro.org>
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* arm-dis.c (get_sym_code_type): Don't check for STT_ARM_TFUNC.
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Use branch types instead.
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(print_insn): Likewise.
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2011-02-28 Maciej W. Rozycki <macro@codesourcery.com>
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* mips-opc.c (mips_builtin_opcodes): Correct register use
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annotation of "alnv.ps".
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2011-02-28 Maciej W. Rozycki <macro@codesourcery.com>
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* mips-opc.c (mips_builtin_opcodes): Add "pref" macro.
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2011-02-22 Mike Frysinger <vapier@gentoo.org>
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* bfin-dis.c (OUTS): Remove p NULL check and txt NUL check.
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2011-02-22 Mike Frysinger <vapier@gentoo.org>
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* bfin-dis.c (print_insn_bfin): Change outf->fprintf_func to OUTS.
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2011-02-19 Mike Frysinger <vapier@gentoo.org>
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* bfin-dis.c (saved_state): Mark static. Change a[01]x to ax[] and
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a[01]w to aw[]. Delete ac0, ac0_copy, ac1, an, aq, av0, av0s, av1,
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av1s, az, cc, v, v_copy, vs, rnd_mod, v_internal, pc, ticks, insts,
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exception, end_of_registers, msize, memory, bfd_mach.
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(CCREG, PCREG, A0XREG, A0WREG, A1XREG, A1WREG, LC0REG, LT0REG,
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LB0REG, LC1REG, LT1REG, LB1REG): Delete
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(AXREG, AWREG, LCREG, LTREG, LBREG): Define.
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(get_allreg): Change to new defines. Fallback to abort().
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2011-02-14 Mike Frysinger <vapier@gentoo.org>
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* bfin-dis.c: Add whitespace/parenthesis where needed.
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2011-02-14 Mike Frysinger <vapier@gentoo.org>
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* bfin-dis.c (decode_LoopSetup_0): Return when reg is greater
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than 7.
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2011-02-13 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
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* configure: Regenerate.
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2011-02-13 Mike Frysinger <vapier@gentoo.org>
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* bfin-dis.c (decode_dsp32alu_0): Fix typo with A1 reg.
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2011-02-13 Mike Frysinger <vapier@gentoo.org>
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* bfin-dis.c (decode_dsp32mult_0): Add 1 to dst for mac1. Output
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dregs only when P is set, and dregs_lo otherwise.
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2011-02-13 Mike Frysinger <vapier@gentoo.org>
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* bfin-dis.c (decode_dsp32alu_0): Delete BYTEOP2M code.
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2011-02-12 Mike Frysinger <vapier@gentoo.org>
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* bfin-dis.c (decode_pseudoDEBUG_0): Add space after PRNT.
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2011-02-12 Mike Frysinger <vapier@gentoo.org>
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* bfin-dis.c (machine_registers): Delete REG_GP.
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(reg_names): Delete "GP".
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(decode_allregs): Change REG_GP to REG_LASTREG.
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2011-02-12 Mike Frysinger <vapier@gentoo.org>
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* bfin-dis.c (M_S2RND, M_T, M_W32, M_FU, M_TFU, M_IS, M_ISS2,
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M_IH, M_IU): Delete.
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2011-02-11 Mike Frysinger <vapier@gentoo.org>
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* bfin-dis.c (reg_names): Add const.
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(decode_dregs_lo, decode_dregs_hi, decode_dregs, decode_dregs_byte,
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decode_pregs, decode_iregs, decode_mregs, decode_dpregs, decode_gregs,
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decode_regs, decode_regs_lo, decode_regs_hi, decode_statbits,
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decode_counters, decode_allregs): Likewise.
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2011-02-09 Michael Snyder <msnyder@vmware.com>
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* i386-dis.c (OP_J): Parenthesize expression to prevent
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truncated addresses.
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(print_insn): Fix indentation off-by-one.
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2011-02-01 Nick Clifton <nickc@redhat.com>
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* po/da.po: Updated Danish translation.
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2011-01-21 Dave Murphy <davem@devkitpro.org>
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* ppc-opc.c (NON32, NO371): Remove PPC_OPCODE_PPCPS.
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2011-01-18 H.J. Lu <hongjiu.lu@intel.com>
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* i386-dis.c (sIbT): New.
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(b_T_mode): Likewise.
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(dis386): Replace sIb with sIbT on "pushT".
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(x86_64_table): Replace sIb with Ib on "aam" and "aad".
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(OP_sI): Handle b_T_mode. Properly sign-extend byte.
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2011-01-18 Jan Kratochvil <jan.kratochvil@redhat.com>
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* i386-init.h: Regenerated.
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* i386-tbl.h: Regenerated
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2011-01-17 Quentin Neill <quentin.neill@amd.com>
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* i386-dis.c (REG_XOP_TBM_01): New.
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(REG_XOP_TBM_02): New.
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(reg_table): Add REG_XOP_TBM_01 and REG_XOP_TBM_02 tables.
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(xop_table): Redirect to REG_XOP_TBM_01 and REG_XOP_TBM_02
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entries, and add bextr instruction.
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* i386-gen.c (cpu_flag_init): Add CPU_TBM_FLAGS, CpuTBM.
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(cpu_flags): Add CpuTBM.
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* i386-opc.h (CpuTBM) New.
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(i386_cpu_flags): Add bit cputbm.
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* i386-opc.tbl: Add bextr, blcfill, blci, blcic, blcmsk,
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blcs, blsfill, blsic, t1mskc, and tzmsk.
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2011-01-12 DJ Delorie <dj@redhat.com>
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* rx-dis.c (print_insn_rx): Support RX_Operand_TwoReg.
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2011-01-11 Mingjie Xing <mingjie.xing@gmail.com>
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* mips-dis.c (print_insn_args): Adjust the value to print the real
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offset for "+c" argument.
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2011-01-10 Nick Clifton <nickc@redhat.com>
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* po/da.po: Updated Danish translation.
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2011-01-05 Nathan Sidwell <nathan@codesourcery.com>
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* arm-dis.c (thumb32_opcodes): BLX must have bit zero clear.
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2011-01-04 H.J. Lu <hongjiu.lu@intel.com>
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* i386-dis.c (REG_VEX_38F3): New.
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(PREFIX_0FBC): Likewise.
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(PREFIX_VEX_38F2): Likewise.
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(PREFIX_VEX_38F3_REG_1): Likewise.
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(PREFIX_VEX_38F3_REG_2): Likewise.
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(PREFIX_VEX_38F3_REG_3): Likewise.
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(PREFIX_VEX_38F7): Likewise.
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(VEX_LEN_38F2_P_0): Likewise.
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(VEX_LEN_38F3_R_1_P_0): Likewise.
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(VEX_LEN_38F3_R_2_P_0): Likewise.
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(VEX_LEN_38F3_R_3_P_0): Likewise.
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(VEX_LEN_38F7_P_0): Likewise.
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(dis386_twobyte): Use PREFIX_0FBC.
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(reg_table): Add REG_VEX_38F3.
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(prefix_table): Add PREFIX_0FBC, PREFIX_VEX_38F2,
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PREFIX_VEX_38F3_REG_1, PREFIX_VEX_38F3_REG_2,
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PREFIX_VEX_38F3_REG_3 and PREFIX_VEX_38F7.
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(vex_table): Use PREFIX_VEX_38F2, REG_VEX_38F3 and
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PREFIX_VEX_38F7.
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(vex_len_table): Add VEX_LEN_38F2_P_0, VEX_LEN_38F3_R_1_P_0,
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VEX_LEN_38F3_R_2_P_0, VEX_LEN_38F3_R_3_P_0 and
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VEX_LEN_38F7_P_0.
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* i386-gen.c (cpu_flag_init): Add CPU_BMI_FLAGS.
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(cpu_flags): Add CpuBMI.
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* i386-opc.h (CpuBMI): New.
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(i386_cpu_flags): Add cpubmi.
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* i386-opc.tbl: Add andn, bextr, blsi, blsmsk, blsr and tzcnt.
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* i386-init.h: Regenerated.
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* i386-tbl.h: Likewise.
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2011-01-04 H.J. Lu <hongjiu.lu@intel.com>
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* i386-dis.c (VexGdq): New.
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(OP_VEX): Handle dq_mode.
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2011-01-01 H.J. Lu <hongjiu.lu@intel.com>
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* i386-gen.c (process_copyright): Update copyright to 2011.
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For older changes see ChangeLog-2010
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Local Variables:
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mode: change-log
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left-margin: 8
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fill-column: 74
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version-control: never
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End:
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