01860b7ed1
* core.h: Rename to corefile.h * inline.c: Include corefile.h, renamed from core.h. * cpu.h: Include corefile.h, renamed from core.h * vm.c: Include corefile.h, renamed from core.h * Makefile.in (CPU_H): Change core.h to corefile.h (vm.o): Change dependency to corefile.h (LIB_SRC): Change core.c to corefile.c. (LIB_OBJ): Change core.o to corefile.o. (corefile.o): Change dependencies to corefile.c, corefile.h. * corefile.c: Include corefile.h rather than core.h * README.psim (KNOWN PROBLEMS): Change core.* references to corefile.* references.
295 lines
8.2 KiB
Text
295 lines
8.2 KiB
Text
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PSIM
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Copyright (C) 1994-1995, Andrew Cagney <cagney@highland.com.au>
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This directory contains the program PSIM that models the PowerPC(tm -
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IBM) architecture. It can either be run stand alone (psim or run) or
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used as part of GDB.
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KNOWN FEATURES
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SMP: A Symetric Multi-Processor configuration is suported. This
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includes modeling of the PowerPC load word and reserve instructions
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(if intending to use this feature you are well advised to read the the
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source code for the reservation instructions so that you are aware of
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any potential limitations in the model). The number of processors is
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selected during startup.
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DUAL-ENDIAN: Both little and big endian models are suported. The
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execution of instruction sequences that switch between the two modes,
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however, is not. The endianess is selected during startup.
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UIEA, VEA and OEA: The PowerPC architecture defines three levels of
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the PowerPC architecture. This simulator, to a reasonable degree, is
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capable of modeling all three. That is the User Instruction Set
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Architecture, the Virtual Environment Architecture and finally the
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Operating Environment Architecture. The environment is selected
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during startup. The OEA model is still under development.
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HARDWARE DEVICE TREE: In the OEA, the model of the target machines
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hardware is built from a tree of devices (bit like Open Boot).
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Included in this is the ability to model bus hierachies and
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runtime-configurable devices (eg PCI). The device tree used to create
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the hardware model is created during startup. This device tree is
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still under development.
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VEA SYSTEM CALLS: In user mode, basic system calls (read, write, open,
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close ...) are emulated. Under NetBSD (simply because that is what my
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machine at home runs) the list is more extensive.
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PEDANTIC VEA MEMORY MODEL: This model implements the break (brk, sbrk)
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system calls. Further, the user model has very strict memory access
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controls. User programs can not assume that they can stray off the
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end of valid memory areas. This model defines valid memory addresses
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in strict accordance to the executable and does not page allign their
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values. At first this was a bug but since then has turned up several
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problems in user code so it is now described as a feature.
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PROFILING: The simulation is able to count the number and type of
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instructions issued and the number of loads and stores. This feature
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is still under development.
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PERFORMANCE: In its default configuration PSIM is constructed so that
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it will compile fast and run slow. Through the enabling of more
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agressive compile options (and the disabling of unwanted features) the
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build can be changed to compile slow and run fast.
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FLOATING POINT: Preliminary suport for floating point is included.
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Real kernels don't need floating point.
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BUILDING PSIM:
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To build PSIM you will need the following:
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gdb-4.15.tar.gz From your favorite GNU ftp site
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ftp://ftp.ci.com.au/pub/clayton/gdb-4.15+psim-951016.diff.gz
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This contains a few minor patches to
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gdb-4.15 so that will include psim
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when it is built.
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ftp://ftp.ci.com.au/pub/clayton/gdb-4.15+psim-951016.tar.gz
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This contains the psim files propper.
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ftp://ftp.ci.com.au/pub/clayton/psim-test-951016.tar.gz
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(Optional) A scattering of pre-compiled
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programs that run under the simulator.
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gcc Again available from your favorite
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GNU ftp site.
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patch Sun's patch behaves a little wierd
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and doesn't appear to like creating
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empty files.
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In the directory ftp.ci.com.au:pub/clayton you will also notice files
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named psim-NNNNNN.tar.gz. Those, more recent snapshots, may or may
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not work with gdb.
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0. A starting point
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$ ls -1
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gdb-4.15+psim-951016.diff.gz
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gdb-4.15+psim-951016.tar.gz
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gdb-4.15.tar.gz
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psim-test-951016.tar.gz
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1. Unpack gdb
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$ gunzip < gdb-4.15.tar.gz | tar xf -
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2. Change to the gdb directory, apply the psim patches and unpack
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the psim files.
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$ cd gdb-4.15
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$ gunzip < ../gdb-4.15+psim-951016.diff.gz | more
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$ gunzip < ../gdb-4.15+psim-951016.diff.gz | patch -p1
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$ gunzip < ../gdb-4.15+psim-951016.tar.gz | tar tvf -
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$ gunzip < ../gdb-4.15+psim-951016.tar.gz | tar xvf -
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3. Configure gdb
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$ more gdb/README
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then something like (I assume SH):
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$ CC=gcc ./configure --target=powerpc-unknown-eabisim
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eabisim is needed as by default (because PSIM needs GCC) the
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simulator is not built.
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4. Build
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$ make CC=gcc
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alternativly, if you are short on disk space or just want the
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simulator built:
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$ ( cd libiberty && make CC=gcc )
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$ ( cd bfd && make CC=gcc )
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$ ( cd sim/ppc && make CC=gcc )
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5. Install
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$ make CC=gcc install
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or just
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$ cp gdb/gdb ~/bin/powerpc-unknown-eabisim-gdb
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$ cp sim/ppc/run ~/bin/powerpc-unknown-eabisim-run
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USING THE SIMULATOR:
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(I assume that you've unpacked the psim-test archive).
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1. As a standalone program
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Print out the users environment:
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$ powerpc-unknown-eabisim-run envp
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Print out the arguments:
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$ powerpc-unknown-eabisim-run argv a b c
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Check that sbrk works:
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$ powerpc-unknown-eabisim-run break
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2. Example of running GDB:
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The main thing to note is that before you can run the simulator
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you must enable it. The example below illustrates this:
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$ powerpc-unknown-eabisim-gdb envp
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(gdb) target sim
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(gdb) load
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(gdb) break main
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(gdb) run
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.
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.
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BUGS AND PROBLEMS:
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There is a mailing list (subscribe through majordomo@ci.com.au) (that
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is almost never used) at:
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powerpc-psim@ci.com.au
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If I get the ftp archive updated I post a note to that news group. In
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addition your welcome to send bugs or problems either to me or to that
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e-mail list.
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KNOWN PROBLEMS:
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See the ChangeLog file looking for lines taged with the word FIXME.
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COREFILE.C: The implementation of corefile.c (defined by corefile.h) isn't the
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best. It is intended to be functionaly correct rather than fast.
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HTAB (page) code for OEA model untested. Some of the vm code
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instructions unimplemented.
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Flush instruction cache instructions do nothing. Perhaphs they should
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(if there is an instruction cache) flush it.
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Lacks PowerOpen (a.k.a. XCOFF a.k.a. AIX) and NT startups. The
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PowerOpen worked until I added the ELF one.
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OpenBoot and PR*P interfaces missing. Open boot could be implemented
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by putting special instructions at the address of the OpenBoot
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callback functions. Those instructions could than emulate OpenBoot
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behavour.
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Missing VEA system calls.
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Missing or commented out instructions.
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64bit target untested.
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64bit host broken. For instance use of scanf "%x", &long long.
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Event code for pending events from within signal handlers not
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finished/tested.
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Better and more devices.
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PORTABILITY (Notes taken from Michael Meissner): Heavy use of the ##
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operator - fix using the clasic X/**/Y hack; Use of the signed
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keyword. In particular, signed char has no analogue in classic C
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(though most implementations of classic C use signed chars); Use of
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long long which restricts the target compiler to be GCC.
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THANKS:
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Thanks go to the following who each helped in some way.
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Allen Briggs, Bett Koch, David Edelsohn, Gordon Irlam,
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Michael Meissner, Bob Mercier, Richard Perini,
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Richard Stallman, Mitchele Walker
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----------------------------------------------------------------
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Random notes on performance:
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$ cd test
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time ../psim count `expr 10000000 / 2`
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time ../psim volatile-count `expr 10000000 / 7`
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Where 2 and 7 are the number of instructions in the main loop.
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611/729 - baseline
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Tests:
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CFLAGS= -c -O2 -m486 -fomit-frame-pointer
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o different first/second level table/switch combinations
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0 - use a table
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1 - use a simple switch
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2 - use an expanded switch
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i486DX4/100 - AMD
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1/108/140 - switch=0/0/0,expand=2,inline=2,nia=1,cache=1
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1/114/140 - switch=0/0/0,expand=2,inline=2,nia=1,cache=1
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1/137/149 - switch=0/0,expand=2,inline=1,nia=1,cache=1
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1/144/155 - switch=2/1,expand=2,inline=1,nia=1,cache=1
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1/153/159 - switch=2/1,expand=0,inline=1,nia=1,cache=1
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1/185/189 - switch=0/0,expand=0,inline=1,nia=1
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i486DX2/66
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1/572/695 - switch=1/1,expand=0,inline=0
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1/579/729 - switch=0/0,expand=0,inline=0
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1/570/682 - switch=2/2,expand=0,inline=0
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1/431/492 - switch=0/0,expand=0,inline=1,nia=0
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1/271/292 - switch=2/1,expand=0,inline=1,nia=0
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1/270/316 - switch=2/2,expand=0,inline=1,nia=0
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1/271/281 - switch=1/1,expand=0,inline=1,nia=1
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1/267/274 - switch=2/1,expand=0,inline=1,nia=1
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