ce11586c0b
* sh-opc.h: Move fsca and fsrra instructions from sh4a to sh4. Also correct mistake in the comment.
123 lines
3.7 KiB
Text
123 lines
3.7 KiB
Text
2004-02-26 Andrew Stubbs <andrew.stubbs@superh.com>
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* sh-opc.h: Move fsca and fsrra instructions from sh4a to sh4.
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Also correct mistake in the comment.
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2004-02-26 Andrew Stubbs <andrew.stubbs@superh.com>
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* sh-dis.c (print_insn_sh): Add REG_N_D nibble type to
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ensure that double registers have even numbers.
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Add REG_N_B01 for nn01 (binary 01) nibble to ensure
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that reserved instruction 0xfffd does not decode the same
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as 0xfdfd (ftrv).
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* sh-opc.h: Add REG_N_D nibble type and use it whereever
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REG_N refers to a double register.
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Add REG_N_B01 nibble type and use it instead of REG_NM
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in ftrv.
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Adjust the bit patterns in a few comments.
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2004-02-25 Aldy Hernandez <aldyh@redhat.com>
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* ppc-opc.c (powerpc_opcodes): Change mask for dcbt and dcbtst.
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2004-02-20 Aldy Hernandez <aldyh@redhat.com>
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* ppc-opc.c (powerpc_opcodes): Move mfmcsrr0 before mfdc_dat.
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2004-02-20 Aldy Hernandez <aldyh@redhat.com>
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* ppc-opc.c (powerpc_opcodes): Add m*ivor35.
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2004-02-20 Aldy Hernandez <aldyh@redhat.com>
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* ppc-opc.c (powerpc_opcodes): Add mfivor32, mfivor33, mfivor34,
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mtivor32, mtivor33, mtivor34.
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2004-02-19 Aldy Hernandez <aldyh@redhat.com>
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* ppc-opc.c (powerpc_opcodes): Add mfmcar.
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2004-02-10 Petko Manolov <petkan@nucleusys.com>
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* arm-opc.h Maverick accumulator register opcode fixes.
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2004-02-13 Ben Elliston <bje@wasabisystems.com>
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* m32r-dis.c: Regenerate.
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2004-01-27 Michael Snyder <msnyder@redhat.com>
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* sh-opc.h (sh_table): "fsrra", not "fssra".
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2004-01-23 Andrew Over <andrew.over@cs.anu.edu.au>
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* sparc-opc.c (fdtox, fstox, fqtox, fxtod, fxtos, fxtoq): Tighten
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contraints.
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2004-01-19 Andrew Over <andrew.over@cs.anu.edu.au>
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* sparc-opc.c (sparc_opcodes) <f[dsq]tox, fxto[dsq]>: Fix args.
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2004-01-19 Alan Modra <amodra@bigpond.net.au>
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* i386-dis.c (OP_E): Print scale factor on intel mode sib when not
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1. Don't print scale factor on AT&T mode when index missing.
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2004-01-16 Alexandre Oliva <aoliva@redhat.com>
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* m10300-opc.c (mov): 8- and 24-bit immediates are zero-extended
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when loaded into XR registers.
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2004-01-14 Richard Sandiford <rsandifo@redhat.com>
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* frv-desc.h: Regenerate.
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* frv-desc.c: Regenerate.
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* frv-opc.c: Regenerate.
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2004-01-13 Michael Snyder <msnyder@redhat.com>
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* sh-dis.c (print_insn_sh): Allocate 4 bytes for insn.
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2004-01-09 Paul Brook <paul@codesourcery.com>
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* arm-opc.h (arm_opcodes): Move generic mcrr after known
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specific opcodes.
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2004-01-07 Daniel Jacobowitz <drow@mvista.com>
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* Makefile.am (libopcodes_la_DEPENDENCIES)
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(libopcodes_la_LIBADD): Revert 2003-05-17 change. Add explanatory
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comment about the problem.
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* Makefile.in: Regenerate.
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2004-01-06 Alexandre Oliva <aoliva@redhat.com>
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2003-12-19 Alexandre Oliva <aoliva@redhat.com>
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* frv-asm.c (parse_ulo16, parse_uhi16, parse_d12): Fix some
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cut&paste errors in shifting/truncating numerical operands.
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2003-08-04 Alexandre Oliva <aoliva@redhat.com>
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* frv-asm.c (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
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(parse_uslo16): Likewise.
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(parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
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(parse_d12): Parse gotoff12 and gotofffuncdesc12.
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(parse_s12): Likewise.
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2003-08-04 Alexandre Oliva <aoliva@redhat.com>
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* frv-asm.c (parse_ulo16): Parse gotlo and gotfuncdesclo.
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(parse_uslo16): Likewise.
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(parse_uhi16): Parse gothi and gotfuncdeschi.
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(parse_d12): Parse got12 and gotfuncdesc12.
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(parse_s12): Likewise.
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2004-01-02 Albert Bartoszko <albar@nt.kegel.com.pl>
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* msp430-dis.c (msp430_doubleoperand): Check for an 'add'
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instruction which looks similar to an 'rla' instruction.
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For older changes see ChangeLog-0203
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Local Variables:
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mode: change-log
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left-margin: 8
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fill-column: 74
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version-control: never
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End:
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