f57d151a99
* gdbarch.sh (NUM_REGS): Replace by gdbarch_num_regs. * i386-tdep.c (i386_dbx_reg_to_regnum) (i386_svr4_reg_to_regnum): Likewise. * inf-ptrace.c (inf_ptrace_fetch_registers) (inf_ptrace_store_registers): Likewise. * corelow.c (get_core_registers): Likewise. * i386-linux-nat.c (supply_gregset, fill_gregset) (i386_linux_fetch_inferior_registers) (i386_linux_store_inferior_registers): Likewise. * remote.c (init_remote_state,packet_reg_from_regnum) (packet_reg_from_pnum,process_g_packet,remote_fetch_registers) (remote_prepare_to_store,store_registers_using_G) (remote_store_registers,remote_arch_state): Likewise. * tracepoint.c (encode_actions): Likewise. * mi/mi-main.c (mi_cmd_data_list_register_names) (mi_cmd_data_list_changed_registers,mi_cmd_data_list_register_values) (mi_cmd_data_write_register_values): Likewise. * tui/tui-regs.c (tui_show_register_group) (tui_show_register_group): Likewise. * xtensa-tdep.h (FP_ALIAS): Likewise. * xtensa-tdep.c (xtensa_register_name,xtensa_register_type) (xtensa_reg_to_regnum,xtensa_pseudo_register_read) (xtensa_pseudo_register_write,xtensa_register_reggroup_p): Likewise. * win32-nat.c (do_win32_fetch_inferior_registers) (do_win32_store_inferior_registers,fetch_elf_core_registers * user-regs.h: Likewise (comment). * user-regs.c (user_reg, user_reg_map_name_to_regnum): Likewise. * trad-frame.c (trad_frame_alloc_saved_regs): Likewise. * target-descriptions.h: Likewise (comment). * target-descriptions.c (tdesc_use_registers): Likewise (comment). * target.c (debug_print_register): Likewise. * stack.c (frame_info): Likewise. * stabsread.c (define_symbol): Likewise. * sh64-tdep.c (sh64_do_pseudo_register,sh64_print_register) (sh64_media_print_registers_info) (sh64_compact_print_registers_info): Likewise. * rs6000-tdep.c (rs6000_register_sim_regno): Likewise. * rs6000-nat.c (fetch_register,store_register): Likewise. * remote-sim.c (one2one_register_sim_regno,gdbsim_fetch_register) (gdbsim_fetch_register,gdbsim_store_register): Likewise. * remote-mips.c (mips_fetch_registers,mips_store_registers): Likewise. * remote-m32r-sdi.c (m32r_fetch_registers) (m32r_store_registers): Likewise. * reggroups.c (default_register_reggroup_p): Likewise. * regcache.c (init_regcache_descr,register_size,regcache,regcache_save) (regcache_restore,regcache_dump): Likewise. * monitor.c (monitor_fetch_registers,monitor_store_registers): Likewise. * mips-tdep.c (mips_xfer_register,mips_register_name) (mips_register_reggroup_p,mips_pseudo_register_read) (mips_pseudo_register_write,mips_convert_register_p,mips_register_type) (mips_unwind_pc,mips_unwind_sp,mips_unwind_dummy_id,set_reg_offset) (mips16_scan_prologue,mips_insn16_frame_cache,reset_saved_regs) (mips32_scan_prologue,mips_insn32_frame_cache,read_next_frame_reg) (mips_n32n64_return_value,mips_o32_return_value,mips_o64_return_value) (print_gp_register_row,mips_print_registers_info) (mips_stab_reg_to_regnum,mips_dwarf_dwarf2_ecoff_reg_to_regnum) (mips_register_sim_regno): Likewise. * mips-linux-tdep.c (mips_linux_o32_sigframe_init) (mips_linux_n32n64_sigframe_init): Likewise. * mips-linux-nat.c (mips_linux_register_addr) (mips64_linux_register_addr): Likewise. * findvar.c (value_of_register): Likewise. * infcmd.c (default_print_registers_info,registers_info) (print_vector_info,print_float_info): Likewise. * mips64obsd-tdep.c (mips64obsd_sigframe_init): Likewise. * inf-child.c (inf_child_fetch_inferior_registers): Likewise. * m68k-tdep.c (m68k_dwarf_reg_to_regnum): Likewise. * m68hc11-tdep.c (m68hc11_frame_unwind_cache(: Likewise. * m32r-tdep.c (m32r_frame_unwind_cache): Likewise. * ia64-linux-nat.c (ia64_register_addr,ia64_cannot_fetch_register) (ia64_cannot_store_register,ia64_linux_fetch_registers) (ia64_linux_store_registers): Likewise. * hpux-thread.c (hpux_thread_fetch_registers) (hpux_thread_store_registers): Likewise. * h8300-tdep.c (E_PSEUDO_CCR_REGNUM,E_PSEUDO_EXR_REGNUM) (h8300_init_frame_cache,h8300_frame_cache,h8300_frame_prev_register) (h8300_register_type): Likewise. * dwarf2-frame.c (dwarf2_frame_cache) (dwarf2_frame_state_alloc_regs): Likewise. * cris-tdep.c (cris_register_size,cris_cannot_fetch_register) (cris_cannot_store_register,crisv32_cannot_fetch_register) (crisv32_cannot_store_register,cris_register_name): Likewise. * avr-tdep.c (avr_frame_unwind_cache): Likewise. * arch-utils.c (legacy_register_sim_regno) (legacy_virtual_frame_pointer): Likewise. * arm-tdep.c (arm_make_prologue_cache,arm_register_sim_regno):Likewise. * arm-tdep.h: Likewise (comment). * frv-tdep.c (frv_register_sim_regno): Likewise. * m68klinux-nat.c (old_fetch_inferior_registers) (old_store_inferior_registers): Likewise. * m32c-tdep.c (m32c_virtual_frame_pointer): Likewise. * irix5-nat.c (fetch_core_registers): Likewise. * hppa-tdep.c (hppa_frame_cache): Likewise. * hppa-linux-nat.c (hppa_linux_register_addr) (hppa_linux_fetch_inferior_registers) (hppa_linux_store_inferior_registers): Likewise. * hppa-hpux-nat.c (hppa_hpux_fetch_inferior_registers) (hppa_hpux_store_inferior_registers): Likewise. * amd64-nat.c (amd64_native_gregset_reg_offset) (amd64_supply_native_gregset,amd64_collect_native_gregset): Likewise. * dbug-rom.c (dbug_regname): Likewise. * m68hc11-tdep.c (m68hc11_frame_unwind_cache) (HARD_PAGE_REGNUM (comment)): Likewise. * gdbarch.sh (NUM_PSEUDO_REGS): Replace by gdbarch_num_pseudo_regs. * i386-tdep.c (i386_dbx_reg_to_regnum) (i386_svr4_reg_to_regnum): Likewise. * mi/mi-main.c (mi_cmd_data_list_register_names) (mi_cmd_data_list_changed_registers,mi_cmd_data_list_register_values) (mi_cmd_data_write_register_values): Likewise. * gdbarch.c, gdbarch.h: Regenerate. * tui/tui-regs.c (tui_show_register_group): Likewise. * xtensa-tdep.h (FP_ALIAS): Likewise. * user-regs.h: Likewise (comment). * user-regs.c (user_reg, user_reg_map_name_to_regnum): Likewise. * trad-frame.c (trad_frame_alloc_saved_regs): Likewise. * target-descriptions.h: Likewise (comment). * target.c (debug_print_register): Likewise. * stack.c (frame_info): Likewise. * stabsread.c (define_symbol): Likewise. * sh64-tdep.c (sh64_print_register,sh64_media_print_registers_info) (sh64_compact_print_registers_info): Likewise. * rs6000-tdep.c (rs6000_register_sim_regno): Likewise. * regcache.c (init_regcache_descr,register_size,regcache,regcache_save (regcache_restore,regcache_dump): Likewise. * mips-tdep.c (print_gp_register_row,mips_print_registers_info) (mips_dwarf_dwarf2_ecoff_reg_to_regnum) (mips_stab_reg_to_regnum): Likewise. * findvar.c (value_of_register): Likewise. * infcmd.c (default_print_registers_info,registers_info) (print_vector_info,print_float_info): Likewise. * m68k-tdep.c (m68k_dwarf_reg_to_regnum): Likewise. * h8300-tdep.c (h8300_register_type): Likewise. * dwarf2-frame.c (dwarf2_frame_cache): Likewise. * frame.h (SIZEOF_FRAME_SAVED_REGS): Likewise. * xtensa-tdep.c (xtensa_register_type,xtensa_reg_to_regnum) (xtensa_pseudo_register_read,xtensa_pseudo_register_write): Likewise. * parse.c: Remove comment. * gdbarch.c, gdbarch.h: Regenerate
163 lines
5 KiB
C
163 lines
5 KiB
C
/* Native-dependent code for AMD64.
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Copyright (C) 2003, 2004, 2007 Free Software Foundation, Inc.
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This file is part of GDB.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 51 Franklin Street, Fifth Floor,
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Boston, MA 02110-1301, USA. */
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#include "defs.h"
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#include "gdbarch.h"
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#include "regcache.h"
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#include "gdb_assert.h"
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#include "gdb_string.h"
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#include "i386-tdep.h"
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#include "amd64-tdep.h"
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/* The following bits of code help with implementing debugging 32-bit
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code natively on AMD64. The idea is to define two mappings between
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the register number as used by GDB and the register set used by the
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host to represent the general-purpose registers; one for 32-bit
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code and one for 64-bit code. The mappings are specified by the
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follwing variables and consist of an array of offsets within the
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register set indexed by register number, and the number of
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registers supported by the mapping. We don't need mappings for the
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floating-point and SSE registers, since the difference between
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64-bit and 32-bit variants are negligable. The difference in the
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number of SSE registers is already handled by the target code. */
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/* General-purpose register mapping for native 32-bit code. */
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int *amd64_native_gregset32_reg_offset;
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int amd64_native_gregset32_num_regs = I386_NUM_GREGS;
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/* General-purpose register mapping for native 64-bit code. */
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int *amd64_native_gregset64_reg_offset;
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int amd64_native_gregset64_num_regs = AMD64_NUM_GREGS;
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/* Return the offset of REGNUM within the appropriate native
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general-purpose register set. */
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static int
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amd64_native_gregset_reg_offset (int regnum)
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{
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int *reg_offset = amd64_native_gregset64_reg_offset;
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int num_regs = amd64_native_gregset64_num_regs;
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gdb_assert (regnum >= 0);
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if (gdbarch_ptr_bit (current_gdbarch) == 32)
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{
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reg_offset = amd64_native_gregset32_reg_offset;
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num_regs = amd64_native_gregset32_num_regs;
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}
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if (num_regs > gdbarch_num_regs (current_gdbarch))
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num_regs = gdbarch_num_regs (current_gdbarch);
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if (regnum < num_regs && regnum < gdbarch_num_regs (current_gdbarch))
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return reg_offset[regnum];
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return -1;
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}
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/* Return whether the native general-purpose register set supplies
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register REGNUM. */
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int
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amd64_native_gregset_supplies_p (int regnum)
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{
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return (amd64_native_gregset_reg_offset (regnum) != -1);
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}
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/* Supply register REGNUM, whose contents are stored in GREGS, to
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REGCACHE. If REGNUM is -1, supply all appropriate registers. */
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void
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amd64_supply_native_gregset (struct regcache *regcache,
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const void *gregs, int regnum)
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{
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const char *regs = gregs;
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struct gdbarch *gdbarch = get_regcache_arch (regcache);
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int num_regs = amd64_native_gregset64_num_regs;
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int i;
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if (gdbarch_ptr_bit (gdbarch) == 32)
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num_regs = amd64_native_gregset32_num_regs;
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if (num_regs > gdbarch_num_regs (current_gdbarch))
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num_regs = gdbarch_num_regs (current_gdbarch);
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for (i = 0; i < num_regs; i++)
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{
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if (regnum == -1 || regnum == i)
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{
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int offset = amd64_native_gregset_reg_offset (i);
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if (offset != -1)
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regcache_raw_supply (regcache, i, regs + offset);
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}
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}
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}
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/* Collect register REGNUM from REGCACHE and store its contents in
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GREGS. If REGNUM is -1, collect and store all appropriate
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registers. */
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void
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amd64_collect_native_gregset (const struct regcache *regcache,
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void *gregs, int regnum)
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{
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char *regs = gregs;
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struct gdbarch *gdbarch = get_regcache_arch (regcache);
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int num_regs = amd64_native_gregset64_num_regs;
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int i;
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if (gdbarch_ptr_bit (gdbarch) == 32)
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{
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num_regs = amd64_native_gregset32_num_regs;
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/* Make sure %eax, %ebx, %ecx, %edx, %esi, %edi, %ebp, %esp and
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%eip get zero-extended to 64 bits. */
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for (i = 0; i <= I386_EIP_REGNUM; i++)
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{
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if (regnum == -1 || regnum == i)
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memset (regs + amd64_native_gregset_reg_offset (i), 0, 8);
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}
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/* Ditto for %cs, %ss, %ds, %es, %fs, and %gs. */
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for (i = I386_CS_REGNUM; i <= I386_GS_REGNUM; i++)
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{
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if (regnum == -1 || regnum == i)
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memset (regs + amd64_native_gregset_reg_offset (i), 0, 8);
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}
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}
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if (num_regs > gdbarch_num_regs (current_gdbarch))
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num_regs = gdbarch_num_regs (current_gdbarch);
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for (i = 0; i < num_regs; i++)
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{
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if (regnum == -1 || regnum == i)
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{
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int offset = amd64_native_gregset_reg_offset (i);
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if (offset != -1)
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regcache_raw_collect (regcache, i, regs + offset);
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}
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}
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}
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