172 lines
4 KiB
C
172 lines
4 KiB
C
#define SIM_HAVE_FLATMEM 1
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#include "sim-basics.h"
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typedef address_word sim_cia;
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/* This simulator doesn't cache state */
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#define SIM_ENGINE_HALT_HOOK(sd,last_cpu,cia) while (0)
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#define SIM_ENGINE_RESTART_HOOK(sd,last_cpu,cia) while (0)
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#include "sim-base.h"
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typedef signed8 int8;
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typedef unsigned8 uint8;
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typedef signed16 int16;
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typedef unsigned16 uint16;
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typedef signed32 int32;
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typedef unsigned32 uint32;
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typedef unsigned32 reg_t;
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/* The current state of the processor; registers, memory, etc. */
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typedef struct _v850_regs {
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reg_t regs[32]; /* general-purpose registers */
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reg_t sregs[32]; /* system registers, including psw */
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reg_t pc;
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int dummy_mem; /* where invalid accesses go */
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int exception;
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int pending_nmi;
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} v850_regs;
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struct _sim_cpu
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{
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/* ... simulator specific members ... */
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v850_regs reg;
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/* ... base type ... */
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sim_cpu_base base;
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};
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struct sim_state {
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sim_cpu cpu[MAX_NR_PROCESSORS];
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#if (WITH_SMP)
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#define STATE_CPU(sd,n) (&(sd)->cpu[n])
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#else
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#define STATE_CPU(sd,n) (&(sd)->cpu[0])
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#endif
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SIM_ADDR rom_size;
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SIM_ADDR low_end;
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SIM_ADDR high_start;
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SIM_ADDR high_base;
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sim_state_base base;
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};
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/* For compatibility, until all functions converted to passing
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SIM_DESC as an argument */
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extern SIM_DESC simulator;
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#define V850_ROM_SIZE 0x8000
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#define V850_LOW_END 0x200000
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#define V850_HIGH_START 0xffe000
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#define DEBUG_TRACE 0x00000001
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#define DEBUG_VALUES 0x00000002
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extern int v850_debug;
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#define SIG_V850_EXIT -1 /* indication of a normal exit */
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extern uint32 OP[4];
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extern struct simops Simops[];
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#define State (STATE_CPU (simulator, 0)->reg)
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#define PC (State.pc)
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#define SP (State.regs[3])
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#define EP (State.regs[30])
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#define EIPC (State.sregs[0])
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#define EIPSW (State.sregs[1])
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#define FEPC (State.sregs[2])
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#define FEPSW (State.sregs[3])
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#define ECR (State.sregs[4])
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#define PSW (State.sregs[5])
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/* start-sanitize-v850e */
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#define CTPC (State.sregs[16])
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#define CTPSW (State.sregs[17])
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/* end-sanitize-v850e */
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#define DBPC (State.sregs[18])
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#define DBPSW (State.sregs[19])
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/* start-sanitize-v850e */
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#define CTBP (State.sregs[20])
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/* end-sanitize-v850e */
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#define PSW_NP 0x80
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#define PSW_EP 0x40
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#define PSW_ID 0x20
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#define PSW_SAT 0x10
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#define PSW_CY 0x8
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#define PSW_OV 0x4
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#define PSW_S 0x2
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#define PSW_Z 0x1
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#define SEXT3(x) ((((x)&0x7)^(~0x3))+0x4)
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/* sign-extend a 4-bit number */
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#define SEXT4(x) ((((x)&0xf)^(~0x7))+0x8)
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/* sign-extend a 5-bit number */
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#define SEXT5(x) ((((x)&0x1f)^(~0xf))+0x10)
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/* sign-extend an 8-bit number */
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#define SEXT8(x) ((((x)&0xff)^(~0x7f))+0x80)
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/* sign-extend a 9-bit number */
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#define SEXT9(x) ((((x)&0x1ff)^(~0xff))+0x100)
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/* sign-extend a 16-bit number */
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#define SEXT16(x) ((((x)&0xffff)^(~0x7fff))+0x8000)
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/* sign-extend a 22-bit number */
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#define SEXT22(x) ((((x)&0x3fffff)^(~0x1fffff))+0x200000)
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/* sign-extend a 32-bit number */
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#define SEXT32(x) ((((x)&0xffffffffLL)^(~0x7fffffffLL))+0x80000000LL)
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/* sign extend a 40 bit number */
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#define SEXT40(x) ((((x)&0xffffffffffLL)^(~0x7fffffffffLL))+0x8000000000LL)
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/* sign extend a 44 bit number */
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#define SEXT44(x) ((((x)&0xfffffffffffLL)^(~0x7ffffffffffLL))+0x80000000000LL)
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/* sign extend a 60 bit number */
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#define SEXT60(x) ((((x)&0xfffffffffffffffLL)^(~0x7ffffffffffffffLL))+0x800000000000000LL)
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/* No sign extension */
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#define NOP(x) (x)
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#if 0
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#define MAX32 0x7fffffffLL
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#define MIN32 0xff80000000LL
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#define MASK32 0xffffffffLL
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#define MASK40 0xffffffffffLL
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#endif
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#define INC_ADDR(x,i) x = ((State.MD && x == MOD_E) ? MOD_S : (x)+(i))
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#define RLW(x) load_mem (x, 4)
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#ifdef _WIN32
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#ifndef SIGTRAP
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#define SIGTRAP 5
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#endif
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#ifndef SIGQUIT
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#define SIGQUIT 3
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#endif
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#endif
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/* Function declarations. */
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uint32 get_word PARAMS ((uint8 *));
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uint16 get_half PARAMS ((uint8 *));
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uint8 get_byte PARAMS ((uint8 *));
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void put_word PARAMS ((uint8 *, uint32));
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void put_half PARAMS ((uint8 *, uint16));
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void put_byte PARAMS ((uint8 *, uint8));
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extern uint32 load_mem PARAMS ((SIM_ADDR addr, int len));
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extern void store_mem PARAMS ((SIM_ADDR addr, int len, uint32 data));
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extern uint8 *map PARAMS ((SIM_ADDR addr));
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