14b57c7c6a
VLE is an encoding, not a particular processor architecture, so it
isn't really proper to select insns based on PPC_OPCODE_VLE. For
example
{"evaddw", VX (4, 512), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}},
{"vaddubs", VX (4, 512), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}},
shows two insns that have the same encoding, both available with VLE.
Enabling both with VLE means we can't disassemble the second variant
even if -Maltivec is given rather than -Mspe. Also, we don't check
user assembly against the processor type as well as we could.
Another problem is that when using the VLE encoding, insns from the
main ppc opcode table are not available, except those using opcode 4
and 31. Correcting this revealed two errors in the ld testsuite,
use of "nop" and "rfmci" when -mvle.
This patch fixes those problems in the opcode table, and removes
PPCNONE. I find a plain 0 distracts less from other values.
In addition, I've implemented code to recognize some machine values
from the apuinfo note present in ppc32 objects. It's not a complete
disambiguation since we're lacking info to detect newer chips, but
what we have should help with disassembly.
include/
* elf/ppc.h (APUINFO_SECTION_NAME, APUINFO_LABEL, PPC_APUINFO_ISEL,
PPC_APUINFO_PMR, PPC_APUINFO_RFMCI, PPC_APUINFO_CACHELCK,
PPC_APUINFO_SPE, PPC_APUINFO_EFS, PPC_APUINFO_BRLOCK,
PPC_APUINFO_VLE: Define.
opcodes/
* ppc-dis.c (ppc_opts): Delete extraneous parentheses. Default
cpu for "vle" to e500.
* ppc-opc.c (ALLOW8_SPRG): Remove PPC_OPCODE_VLE.
(NO371, PPCSPE, PPCISEL, PPCEFS, MULHW, DCBT_EO): Likewise.
(PPCNONE): Delete, substitute throughout.
(powerpc_opcodes): Remove PPCVLE from "flags". Add to "deprecated"
except for major opcode 4 and 31.
(vle_opcodes <se_rfmci>): Add PPCRFMCI to flags.
bfd/
* cpu-powerpc.c (powerpc_compatible): Allow bfd_mach_ppc_vle entry
to match other 32-bit archs.
* elf32-ppc.c (_bfd_elf_ppc_set_arch): New function.
(ppc_elf_object_p): Call it.
(ppc_elf_special_sections): Use APUINFO_SECTION_NAME. Fix
overlong line.
(APUINFO_SECTION_NAME, APUINFO_LABEL): Don't define here.
* elf64-ppc.c (ppc64_elf_object_p): Call _bfd_elf_ppc_set_arch.
* bfd-in.h (_bfd_elf_ppc_at_tls_transform,
_bfd_elf_ppc_at_tprel_transform): Move to..
* elf-bfd.h: ..here.
(_bfd_elf_ppc_set_arch): Declare.
* bfd-in2.h: Regenerate.
gas/
* config/tc-ppc.c (PPC_APUINFO_ISEL, PPC_APUINFO_PMR,
PPC_APUINFO_RFMCI, PPC_APUINFO_CACHELCK, PPC_APUINFO_SPE,
PPC_APUINFO_EFS, PPC_APUINFO_BRLOCK, PPC_APUINFO_VLE): Don't define.
(ppc_setup_opcodes): Check vle disables powerpc_opcodes overridden
by vle_opcodes, and that vle flag doesn't enable opcodes. Don't
add vle_opcodes twice.
(ppc_cleanup): Use APUINFO_SECTION_NAME and APUINFO_LABEL.
ld/
* testsuite/ld-powerpc/apuinfo1.s: Delete nop.
* testsuite/ld-powerpc/apuinfo-vle2.s: New.
* testsuite/ld-powerpc/powerpc.exp: Use apuinfo-vle2.s.
422 lines
9.7 KiB
C
422 lines
9.7 KiB
C
/* BFD PowerPC CPU definition
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Copyright (C) 1994-2016 Free Software Foundation, Inc.
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Contributed by Ian Lance Taylor, Cygnus Support.
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This file is part of BFD, the Binary File Descriptor library.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
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MA 02110-1301, USA. */
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#include "sysdep.h"
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#include "bfd.h"
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#include "libbfd.h"
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/* The common PowerPC architecture is compatible with the RS/6000. */
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static const bfd_arch_info_type *
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powerpc_compatible (const bfd_arch_info_type *a,
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const bfd_arch_info_type *b)
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{
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BFD_ASSERT (a->arch == bfd_arch_powerpc);
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switch (b->arch)
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{
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default:
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return NULL;
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case bfd_arch_powerpc:
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if (a->mach == bfd_mach_ppc_vle && b->bits_per_word == 32)
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return a;
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if (b->mach == bfd_mach_ppc_vle && a->bits_per_word == 32)
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return b;
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return bfd_default_compatible (a, b);
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case bfd_arch_rs6000:
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if (b->mach == bfd_mach_rs6k)
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return a;
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return NULL;
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}
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/*NOTREACHED*/
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}
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const bfd_arch_info_type bfd_powerpc_archs[] =
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{
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#if BFD_DEFAULT_TARGET_SIZE == 64
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/* Default arch must come first. */
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{
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64, /* 64 bits in a word */
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64, /* 64 bits in an address */
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8, /* 8 bits in a byte */
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bfd_arch_powerpc,
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bfd_mach_ppc64,
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"powerpc",
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"powerpc:common64",
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3,
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TRUE, /* default for 64 bit target */
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powerpc_compatible,
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bfd_default_scan,
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bfd_arch_default_fill,
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&bfd_powerpc_archs[1]
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},
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/* elf32-ppc:ppc_elf_object_p relies on the default 32 bit arch
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being immediately after the 64 bit default. */
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{
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32, /* 32 bits in a word */
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32, /* 32 bits in an address */
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8, /* 8 bits in a byte */
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bfd_arch_powerpc,
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bfd_mach_ppc, /* for the POWER/PowerPC common architecture */
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"powerpc",
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"powerpc:common",
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3,
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FALSE,
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powerpc_compatible,
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bfd_default_scan,
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bfd_arch_default_fill,
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&bfd_powerpc_archs[2],
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},
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#else
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/* Default arch must come first. */
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{
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32, /* 32 bits in a word */
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32, /* 32 bits in an address */
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8, /* 8 bits in a byte */
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bfd_arch_powerpc,
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bfd_mach_ppc, /* for the POWER/PowerPC common architecture */
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"powerpc",
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"powerpc:common",
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3,
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TRUE, /* default for 32 bit target */
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powerpc_compatible,
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bfd_default_scan,
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bfd_arch_default_fill,
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&bfd_powerpc_archs[1],
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},
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/* elf64-ppc:ppc64_elf_object_p relies on the default 64 bit arch
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being immediately after the 32 bit default. */
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{
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64, /* 64 bits in a word */
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64, /* 64 bits in an address */
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8, /* 8 bits in a byte */
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bfd_arch_powerpc,
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bfd_mach_ppc64,
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"powerpc",
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"powerpc:common64",
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3,
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FALSE,
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powerpc_compatible,
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bfd_default_scan,
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bfd_arch_default_fill,
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&bfd_powerpc_archs[2]
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},
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#endif
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{
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32, /* 32 bits in a word */
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32, /* 32 bits in an address */
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8, /* 8 bits in a byte */
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bfd_arch_powerpc,
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bfd_mach_ppc_603,
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"powerpc",
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"powerpc:603",
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3,
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FALSE, /* not the default */
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powerpc_compatible,
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bfd_default_scan,
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bfd_arch_default_fill,
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&bfd_powerpc_archs[3]
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},
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{
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32, /* 32 bits in a word */
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32, /* 32 bits in an address */
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8, /* 8 bits in a byte */
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bfd_arch_powerpc,
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bfd_mach_ppc_ec603e,
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"powerpc",
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"powerpc:EC603e",
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3,
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FALSE, /* not the default */
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powerpc_compatible,
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bfd_default_scan,
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bfd_arch_default_fill,
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&bfd_powerpc_archs[4]
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},
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{
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32, /* 32 bits in a word */
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32, /* 32 bits in an address */
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8, /* 8 bits in a byte */
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bfd_arch_powerpc,
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bfd_mach_ppc_604,
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"powerpc",
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"powerpc:604",
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3,
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FALSE, /* not the default */
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powerpc_compatible,
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bfd_default_scan,
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bfd_arch_default_fill,
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&bfd_powerpc_archs[5]
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},
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{
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32, /* 32 bits in a word */
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32, /* 32 bits in an address */
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8, /* 8 bits in a byte */
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bfd_arch_powerpc,
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bfd_mach_ppc_403,
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"powerpc",
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"powerpc:403",
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3,
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FALSE, /* not the default */
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powerpc_compatible,
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bfd_default_scan,
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bfd_arch_default_fill,
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&bfd_powerpc_archs[6]
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},
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{
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32, /* 32 bits in a word */
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32, /* 32 bits in an address */
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8, /* 8 bits in a byte */
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bfd_arch_powerpc,
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bfd_mach_ppc_601,
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"powerpc",
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"powerpc:601",
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3,
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FALSE, /* not the default */
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powerpc_compatible,
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bfd_default_scan,
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bfd_arch_default_fill,
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&bfd_powerpc_archs[7]
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},
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{
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64, /* 64 bits in a word */
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64, /* 64 bits in an address */
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8, /* 8 bits in a byte */
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bfd_arch_powerpc,
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bfd_mach_ppc_620,
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"powerpc",
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"powerpc:620",
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3,
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FALSE, /* not the default */
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powerpc_compatible,
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bfd_default_scan,
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bfd_arch_default_fill,
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&bfd_powerpc_archs[8]
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},
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{
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64, /* 64 bits in a word */
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64, /* 64 bits in an address */
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8, /* 8 bits in a byte */
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bfd_arch_powerpc,
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bfd_mach_ppc_630,
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"powerpc",
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"powerpc:630",
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3,
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FALSE, /* not the default */
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powerpc_compatible,
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bfd_default_scan,
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bfd_arch_default_fill,
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&bfd_powerpc_archs[9]
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},
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{
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64, /* 64 bits in a word */
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64, /* 64 bits in an address */
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8, /* 8 bits in a byte */
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bfd_arch_powerpc,
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bfd_mach_ppc_a35,
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"powerpc",
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"powerpc:a35",
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3,
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FALSE, /* not the default */
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powerpc_compatible,
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bfd_default_scan,
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bfd_arch_default_fill,
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&bfd_powerpc_archs[10]
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},
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{
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64, /* 64 bits in a word */
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64, /* 64 bits in an address */
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8, /* 8 bits in a byte */
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bfd_arch_powerpc,
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bfd_mach_ppc_rs64ii,
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"powerpc",
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"powerpc:rs64ii",
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3,
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FALSE, /* not the default */
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powerpc_compatible,
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bfd_default_scan,
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bfd_arch_default_fill,
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&bfd_powerpc_archs[11]
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},
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{
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64, /* 64 bits in a word */
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64, /* 64 bits in an address */
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8, /* 8 bits in a byte */
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bfd_arch_powerpc,
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bfd_mach_ppc_rs64iii,
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"powerpc",
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"powerpc:rs64iii",
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3,
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FALSE, /* not the default */
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powerpc_compatible,
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bfd_default_scan,
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bfd_arch_default_fill,
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&bfd_powerpc_archs[12]
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},
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{
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32, /* 32 bits in a word */
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32, /* 32 bits in an address */
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8, /* 8 bits in a byte */
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bfd_arch_powerpc,
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bfd_mach_ppc_7400,
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"powerpc",
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"powerpc:7400",
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3,
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FALSE, /* not the default */
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powerpc_compatible,
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bfd_default_scan,
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bfd_arch_default_fill,
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&bfd_powerpc_archs[13]
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},
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{
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32, /* 32 bits in a word */
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32, /* 32 bits in an address */
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8, /* 8 bits in a byte */
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bfd_arch_powerpc,
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bfd_mach_ppc_e500,
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"powerpc",
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"powerpc:e500",
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3,
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FALSE,
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powerpc_compatible,
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bfd_default_scan,
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bfd_arch_default_fill,
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&bfd_powerpc_archs[14]
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},
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{
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32, /* 32 bits in a word */
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32, /* 32 bits in an address */
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8, /* 8 bits in a byte */
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bfd_arch_powerpc,
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bfd_mach_ppc_e500mc,
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"powerpc",
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"powerpc:e500mc",
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3,
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FALSE, /* not the default */
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powerpc_compatible,
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bfd_default_scan,
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bfd_arch_default_fill,
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&bfd_powerpc_archs[15]
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},
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{
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64, /* 64 bits in a word */
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64, /* 64 bits in an address */
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8, /* 8 bits in a byte */
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bfd_arch_powerpc,
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bfd_mach_ppc_e500mc64,
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"powerpc",
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"powerpc:e500mc64",
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3,
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FALSE, /* not the default */
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powerpc_compatible,
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bfd_default_scan,
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bfd_arch_default_fill,
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&bfd_powerpc_archs[16]
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},
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{
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32, /* 32 bits in a word */
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32, /* 32 bits in an address */
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8, /* 8 bits in a byte */
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bfd_arch_powerpc,
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bfd_mach_ppc_860,
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"powerpc",
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"powerpc:MPC8XX",
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3,
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FALSE, /* not the default */
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powerpc_compatible,
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bfd_default_scan,
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bfd_arch_default_fill,
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&bfd_powerpc_archs[17]
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},
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{
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32, /* 32 bits in a word */
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32, /* 32 bits in an address */
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8, /* 8 bits in a byte */
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bfd_arch_powerpc,
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bfd_mach_ppc_750,
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"powerpc",
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"powerpc:750",
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3,
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FALSE, /* not the default */
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powerpc_compatible,
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bfd_default_scan,
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bfd_arch_default_fill,
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&bfd_powerpc_archs[18]
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},
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{
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32, /* 32 bits in a word */
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32, /* 32 bits in an address */
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8, /* 8 bits in a byte */
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bfd_arch_powerpc,
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bfd_mach_ppc_titan,
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"powerpc",
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"powerpc:titan",
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3,
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FALSE, /* not the default */
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powerpc_compatible,
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bfd_default_scan,
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bfd_arch_default_fill,
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&bfd_powerpc_archs[19]
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},
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{
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16, /* 16 or 32 bits in a word */
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32, /* 32 bits in an address */
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8, /* 8 bits in a byte */
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bfd_arch_powerpc,
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bfd_mach_ppc_vle,
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"powerpc",
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"powerpc:vle",
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3,
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FALSE, /* not the default */
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powerpc_compatible,
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bfd_default_scan,
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bfd_arch_default_fill,
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&bfd_powerpc_archs[20]
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},
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{
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64, /* 64 bits in a word */
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64, /* 64 bits in an address */
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8, /* 8 bits in a byte */
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bfd_arch_powerpc,
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bfd_mach_ppc_e5500,
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"powerpc",
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"powerpc:e5500",
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3,
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FALSE, /* not the default */
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powerpc_compatible,
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bfd_default_scan,
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bfd_arch_default_fill,
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&bfd_powerpc_archs[21]
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},
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{
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64, /* 64 bits in a word */
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64, /* 64 bits in an address */
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8, /* 8 bits in a byte */
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bfd_arch_powerpc,
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bfd_mach_ppc_e6500,
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"powerpc",
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"powerpc:e6500",
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3,
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FALSE, /* not the default */
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powerpc_compatible,
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bfd_default_scan,
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bfd_arch_default_fill,
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0
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}
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};
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