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old-cross-binutils/ld/testsuite/ld-powerpc
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Alan Modra e5654c0f84 Fallout from "Reorder more powerpc64 sections for -z relro" 
Commit 23283c1b changed the layout of some bss style sections on
powerpc64, but neglected to add a page gap before the third PT_LOAD
segment created by this reording.  Without a page gap we get two
PT_LOAD headers that overlap by one page in memory.  That shouldn't be
allowed because the dynamic loader will load garbage from the first
page of the last segment over the last page of the previous segment.

bfd/
	* elf.c (_bfd_elf_map_sections_to_segments): Do not make a new
	segment for loaded sections after nonloaded sections if the
	sections are on the same page.
ld/testsuite/
	* ld-powerpc/elfv2so.d: Update
2015-07-28 18:42:43 +09:30
..
aix-abs-branch-1.dd
aix-abs-branch-1.ex
aix-abs-branch-1.im
aix-abs-branch-1.nd
aix-abs-branch-1.s
aix-abs-reloc-1.ex
aix-abs-reloc-1.im
aix-abs-reloc-1.nd
aix-abs-reloc-1.od
aix-abs-reloc-1.s
aix-core-sec-1.ex
aix-core-sec-1.hd XCOFF/AIX: Remove SEC_ALLOC flags for unmapped sections. 2013-05-10 13:08:24 +00:00
aix-core-sec-1.s
aix-core-sec-2.ex
aix-core-sec-2.hd XCOFF/AIX: Remove SEC_ALLOC flags for unmapped sections. 2013-05-10 13:08:24 +00:00
aix-core-sec-2.s
aix-core-sec-3.ex
aix-core-sec-3.hd XCOFF/AIX: Remove SEC_ALLOC flags for unmapped sections. 2013-05-10 13:08:24 +00:00
aix-core-sec-3.s
aix-export-1-all.dd
aix-export-1-full.dd
aix-export-1a.s
aix-export-1b.s
aix-export-2.nd
aix-export-2.s
aix-gc-1-32.dd
aix-gc-1-64.dd
aix-gc-1.ex
aix-gc-1.nd
aix-gc-1.s
aix-glink-1-32.d
aix-glink-1-32.dd
aix-glink-1-64.d
aix-glink-1-64.dd
aix-glink-1.ex
aix-glink-1.s
aix-glink-2-32.dd
aix-glink-2-64.dd
aix-glink-2a.ex
aix-glink-2a.s
aix-glink-2b.s
aix-glink-2c.ex
aix-glink-2c.s
aix-glink-2d.s
aix-glink-3-32.d
aix-glink-3-64.d
aix-glink-3.dd
aix-glink-3.s
aix-glink-3a.s
aix-glink-3b.s
aix-lineno-1.s
aix-lineno-1.txt
aix-lineno-1a.dd
aix-lineno-1a.nd
aix-lineno-1b.dd
aix-lineno-1b.nd
aix-no-dup-syms-1-dso.dnd
aix-no-dup-syms-1-dso.drd
aix-no-dup-syms-1-dso.nd
aix-no-dup-syms-1-dso.rd
aix-no-dup-syms-1-rel.nd
aix-no-dup-syms-1-rel.rd
aix-no-dup-syms-1.ex
aix-no-dup-syms-1.im
aix-no-dup-syms-1a.s
aix-no-dup-syms-1b.s
aix-ref-1-32.od
aix-ref-1-64.od
aix-ref-1.s
aix-rel-1.od
aix-rel-1.s
aix-toc-1-32.dd
aix-toc-1-64.dd
aix-toc-1.ex
aix-toc-1a.s
aix-toc-1b.s
aix-weak-1-dso.dnd
aix-weak-1-dso.hd
aix-weak-1-dso.nd
aix-weak-1-gcdso.dnd
aix-weak-1-gcdso.hd
aix-weak-1-gcdso.nd
aix-weak-1-rel.hd
aix-weak-1-rel.nd
aix-weak-1.ex
aix-weak-1a.s
aix-weak-1b.s
aix-weak-2a.ex
aix-weak-2a.nd
aix-weak-2a.s
aix-weak-2b.nd
aix-weak-2b.s
aix-weak-2c.ex
aix-weak-2c.nd
aix-weak-2c.od
aix-weak-2c.s
aix-weak-3-32.d
aix-weak-3-32.dd
aix-weak-3-64.d
aix-weak-3-64.dd
aix-weak-3a.ex
aix-weak-3a.s
aix-weak-3b.ex
aix-weak-3b.s
aix52.exp ChangeLog rotatation and copyright year update 2015-01-02 00:53:45 +10:30
ambiguousv1.d Reorder more powerpc64 sections for -z relro 2015-01-20 19:52:42 +10:30
ambiguousv1b.d Align .TOC. for PowerPC64 2015-04-23 09:49:19 +09:30
ambiguousv2.d Reorder more powerpc64 sections for -z relro 2015-01-20 19:52:42 +10:30
ambiguousv2b.d Reorder more powerpc64 sections for -z relro 2015-01-20 19:52:42 +10:30
apuinfo-nul.rd
apuinfo-nul.s
apuinfo-nul1.s
apuinfo-vle.rd Power/GAS: Don't set VLE annotation for non-VLE processors/instructions 2014-08-22 16:52:20 +01:00
apuinfo-vle.s Power/GAS: Don't set VLE annotation for non-VLE processors/instructions 2014-08-22 16:52:20 +01:00
apuinfo.rd Power/GAS: Don't set VLE annotation for non-VLE processors/instructions 2014-08-22 16:52:20 +01:00
apuinfo1.s
apuinfo2.s
attr-gnu-4-00.d
attr-gnu-4-0.s
attr-gnu-4-01.d
attr-gnu-4-1.s
attr-gnu-4-02.d
attr-gnu-4-2.s
attr-gnu-4-03.d
attr-gnu-4-3.s
attr-gnu-4-4.s
attr-gnu-4-10.d
attr-gnu-4-11.d
attr-gnu-4-12.d
attr-gnu-4-13.d
attr-gnu-4-14.d
attr-gnu-4-20.d
attr-gnu-4-21.d
attr-gnu-4-22.d
attr-gnu-4-23.d
attr-gnu-4-24.d
attr-gnu-4-31.d
attr-gnu-4-32.d
attr-gnu-4-33.d
attr-gnu-4-34.d
attr-gnu-4-41.d
attr-gnu-8-1.s
attr-gnu-8-2.s
attr-gnu-8-3.s
attr-gnu-8-11.d
attr-gnu-8-23.d
attr-gnu-8-31.d
attr-gnu-12-1.s
attr-gnu-12-2.s
attr-gnu-12-11.d
attr-gnu-12-21.d
defsym.d Align .TOC. for PowerPC64 2015-04-23 09:49:19 +09:30
defsym.s Copy st_other for linker script symbol assignments 2014-07-08 19:42:03 +09:30
elfv2-2a.s Support R_PPC64_ADDR64_LOCAL 2014-03-05 19:57:39 +10:30
elfv2-2b.s Support R_PPC64_ADDR64_LOCAL 2014-03-05 19:57:39 +10:30
elfv2-2exe.d Align .TOC. for PowerPC64 2015-04-23 09:49:19 +09:30
elfv2-2so.d Support R_PPC64_ADDR64_LOCAL 2014-03-05 19:57:39 +10:30
elfv2.s Add PowerPC64 ELFv2 tests. 2013-10-30 13:44:10 +10:30
elfv2exe.d Align .TOC. for PowerPC64 2015-04-23 09:49:19 +09:30
elfv2so.d Fallout from "Reorder more powerpc64 sections for -z relro" 2015-07-28 18:42:43 +09:30
export-class.exp ChangeLog rotatation and copyright year update 2015-01-02 00:53:45 +10:30
funref.s Referencing a function's address on PowerPC64 ELFv2 2014-03-27 00:49:38 +10:30
funref2.s Taking an undefined function's address in an executable 2014-07-02 18:16:14 +09:30
funv1.s Referencing a function's address on PowerPC64 ELFv2 2014-03-27 00:49:38 +10:30
funv2.s Referencing a function's address on PowerPC64 ELFv2 2014-03-27 00:49:38 +10:30
oldtlslib.s
plt1.d include/opcode/ 2012-11-23 03:28:13 +00:00
plt1.s
powerpc-32-export-class.rd
powerpc-32-export-class.xd
powerpc-64-export-class.rd
powerpc-64-export-class.xd * ld-powerpc/export-class.exp (supports_ppc64): Delete. 2013-05-21 01:37:41 +00:00
powerpc.exp Fix an opd->append index in elf64-ppc.c 2015-07-05 19:57:07 +01:00
ppc476-shared.d ppc476 linker workaround shared lib fixes again 2015-06-16 17:42:29 +09:30
ppc476-shared.lnk ppc476 linker workaround shared lib fixes 2015-06-05 20:12:11 +09:30
ppc476-shared.s ppc476 linker workaround shared lib fixes again 2015-06-16 17:42:29 +09:30
ppc476-shared2.d ppc476 linker workaround shared lib fixes again 2015-06-16 17:42:29 +09:30
relax.d
relax.s
relaxr.d
relbrlt.d Align .TOC. for PowerPC64 2015-04-23 09:49:19 +09:30
relbrlt.s
reloc.d
reloc.s
sdabase.d Use a symbol flag bit to mark linker defined symbols 2014-12-23 23:36:50 +10:30
sdabase.s Use a symbol flag bit to mark linker defined symbols 2014-12-23 23:36:50 +10:30
sdabase.t Use a symbol flag bit to mark linker defined symbols 2014-12-23 23:36:50 +10:30
sdabase2.d Use a symbol flag bit to mark linker defined symbols 2014-12-23 23:36:50 +10:30
sdabase2.t Use a symbol flag bit to mark linker defined symbols 2014-12-23 23:36:50 +10:30
sdadyn.d
sdadyn.s
sdalib.s
startv1.s Referencing a function's address on PowerPC64 ELFv2 2014-03-27 00:49:38 +10:30
startv2.s Referencing a function's address on PowerPC64 ELFv2 2014-03-27 00:49:38 +10:30
symtocbase-1.s
symtocbase-2.s
symtocbase.d * ld-powerpc/powerpc.exp: Substitute for le in options_regsub(ld). 2013-08-22 07:34:28 +00:00
tls.d Change plt stubs to have destination in r12. 2013-10-30 13:35:47 +10:30
tls.g Align .TOC. for PowerPC64 2015-04-23 09:49:19 +09:30
tls.s Change plt stubs to have destination in r12. 2013-10-30 13:35:47 +10:30
tls.t * ld-powerpc/powerpc.exp: Substitute for le in options_regsub(ld). 2013-08-22 07:34:28 +00:00
tls32.d Fix ppc32 synthetic symbols when __tls_get_addr_opt stub is generated 2015-03-11 18:04:25 +10:30
tls32.g Fix ppc32 synthetic symbols when __tls_get_addr_opt stub is generated 2015-03-11 18:04:25 +10:30
tls32.s Fix ppc32 synthetic symbols when __tls_get_addr_opt stub is generated 2015-03-11 18:04:25 +10:30
tls32.t Fix ppc32 synthetic symbols when __tls_get_addr_opt stub is generated 2015-03-11 18:04:25 +10:30
tlsexe.d Align .TOC. for PowerPC64 2015-04-23 09:49:19 +09:30
tlsexe.g Align .TOC. for PowerPC64 2015-04-23 09:49:19 +09:30
tlsexe.r Align .TOC. for PowerPC64 2015-04-23 09:49:19 +09:30
tlsexe.t
tlsexe32.d Fix ppc32 synthetic symbols when __tls_get_addr_opt stub is generated 2015-03-11 18:04:25 +10:30
tlsexe32.g Fix ppc32 synthetic symbols when __tls_get_addr_opt stub is generated 2015-03-11 18:04:25 +10:30
tlsexe32.r Fix ppc32 synthetic symbols when __tls_get_addr_opt stub is generated 2015-03-11 18:04:25 +10:30
tlsexe32.t
tlsexetoc.d Align .TOC. for PowerPC64 2015-04-23 09:49:19 +09:30
tlsexetoc.g Align .TOC. for PowerPC64 2015-04-23 09:49:19 +09:30
tlsexetoc.r Align .TOC. for PowerPC64 2015-04-23 09:49:19 +09:30
tlsexetoc.t
tlsld.d Correct PowerPC64 local-dynamic TLS linker optimization 2015-01-29 13:13:02 +10:30
tlsld.s Correct PowerPC64 local-dynamic TLS linker optimization 2015-01-29 13:13:02 +10:30
tlsld32.d Correct PowerPC64 local-dynamic TLS linker optimization 2015-01-29 13:13:02 +10:30
tlsld32.s Correct PowerPC64 local-dynamic TLS linker optimization 2015-01-29 13:13:02 +10:30
tlslib.s
tlslib32.s
tlsmark.d
tlsmark.s
tlsmark32.d
tlsmark32.s
tlsopt1.d include/opcode/ 2012-11-23 03:28:13 +00:00
tlsopt1.s
tlsopt1_32.d include/opcode/ 2012-11-23 03:28:13 +00:00
tlsopt1_32.s
tlsopt2.d include/opcode/ 2012-11-23 03:28:13 +00:00
tlsopt2.s
tlsopt2_32.d include/opcode/ 2012-11-23 03:28:13 +00:00
tlsopt2_32.s
tlsopt3.d
tlsopt3.s
tlsopt3_32.d
tlsopt3_32.s
tlsopt4.d include/opcode/ 2012-11-23 03:28:13 +00:00
tlsopt4.s
tlsopt4_32.d include/opcode/ 2012-11-23 03:28:13 +00:00
tlsopt4_32.s
tlsso.d Align .TOC. for PowerPC64 2015-04-23 09:49:19 +09:30
tlsso.g Align .TOC. for PowerPC64 2015-04-23 09:49:19 +09:30
tlsso.r Align .TOC. for PowerPC64 2015-04-23 09:49:19 +09:30
tlsso.t
tlsso32.d Fix ppc32 synthetic symbols when __tls_get_addr_opt stub is generated 2015-03-11 18:04:25 +10:30
tlsso32.g Fix ppc32 synthetic symbols when __tls_get_addr_opt stub is generated 2015-03-11 18:04:25 +10:30
tlsso32.r Fix ppc32 synthetic symbols when __tls_get_addr_opt stub is generated 2015-03-11 18:04:25 +10:30
tlsso32.t
tlstoc.d Change plt stubs to have destination in r12. 2013-10-30 13:35:47 +10:30
tlstoc.g Align .TOC. for PowerPC64 2015-04-23 09:49:19 +09:30
tlstoc.s Change plt stubs to have destination in r12. 2013-10-30 13:35:47 +10:30
tlstoc.t * ld-powerpc/powerpc.exp: Substitute for le in options_regsub(ld). 2013-08-22 07:34:28 +00:00
tlstocso.d Align .TOC. for PowerPC64 2015-04-23 09:49:19 +09:30
tlstocso.g Align .TOC. for PowerPC64 2015-04-23 09:49:19 +09:30
tlstocso.r Align .TOC. for PowerPC64 2015-04-23 09:49:19 +09:30
tlstocso.t * ld-powerpc/powerpc.exp: Substitute for le in options_regsub(ld). 2013-08-22 07:34:28 +00:00
tocnovar.d Non-alloc sections don't belong in PT_LOAD segments 2015-04-25 09:15:49 +09:30
tocnovar.s PowerPC64 changes for xlc 2015-01-28 18:30:54 +10:30
tocopt.d Align .TOC. for PowerPC64 2015-04-23 09:49:19 +09:30
tocopt.out
tocopt.s
tocopt2.d Align .TOC. for PowerPC64 2015-04-23 09:49:19 +09:30
tocopt2.out
tocopt2.s
tocopt3.d Align .TOC. for PowerPC64 2015-04-23 09:49:19 +09:30
tocopt3.s
tocopt4.d Align .TOC. for PowerPC64 2015-04-23 09:49:19 +09:30
tocopt4a.s
tocopt4b.s
tocopt5.d Align .TOC. for PowerPC64 2015-04-23 09:49:19 +09:30
tocopt5.s
tocopt6-inc.s Fix an opd->append index in elf64-ppc.c 2015-07-05 19:57:07 +01:00
tocopt6.d Fix an opd->append index in elf64-ppc.c 2015-07-05 19:57:07 +01:00
tocopt6a.s Fix an opd->append index in elf64-ppc.c 2015-07-05 19:57:07 +01:00
tocopt6b.s Fix an opd->append index in elf64-ppc.c 2015-07-05 19:57:07 +01:00
tocopt6c.s Fix an opd->append index in elf64-ppc.c 2015-07-05 19:57:07 +01:00
tocvar.d PowerPC64 changes for xlc 2015-01-28 18:30:54 +10:30
tocvar.s PowerPC64 changes for xlc 2015-01-28 18:30:54 +10:30
vle-multiseg-1.d
vle-multiseg-1.ld Make assignments to dot keep an empty output section. 2014-01-22 11:58:29 +10:30
vle-multiseg-2.d
vle-multiseg-2.ld Make assignments to dot keep an empty output section. 2014-01-22 11:58:29 +10:30
vle-multiseg-3.d
vle-multiseg-3.ld Make assignments to dot keep an empty output section. 2014-01-22 11:58:29 +10:30
vle-multiseg-4.d
vle-multiseg-4.ld Make assignments to dot keep an empty output section. 2014-01-22 11:58:29 +10:30
vle-multiseg-5.d
vle-multiseg-5.ld
vle-multiseg-6.d
vle-multiseg-6.ld Make assignments to dot keep an empty output section. 2014-01-22 11:58:29 +10:30
vle-multiseg-6a.s
vle-multiseg-6b.s
vle-multiseg-6c.s
vle-multiseg-6d.s
vle-multiseg.s
vle-reloc-1.d
vle-reloc-1.s
vle-reloc-2.d
vle-reloc-2.s
vle-reloc-3.d Correct ld-powerpc/vle-reloc-2 test 2014-03-15 00:12:56 +10:30
vle-reloc-3.s
vle-reloc-def-1.s
vle-reloc-def-2.s
vle-reloc-def-3.s
vle.ld Fix overflow handling of VLE_SDA21 2014-03-14 15:01:53 +10:30
vxworks-relax-2.rd Sort relocs output by ld -r 2014-12-04 17:37:58 +10:30
vxworks-relax-2.s
vxworks-relax.rd Sort relocs output by ld -r 2014-12-04 17:37:58 +10:30
vxworks-relax.s
vxworks1-lib.dd
vxworks1-lib.nd
vxworks1-lib.rd
vxworks1-lib.s
vxworks1-lib.sd
vxworks1-lib.td
vxworks1-static.d
vxworks1.dd
vxworks1.ld
vxworks1.rd
vxworks1.s
vxworks2-static.sd
vxworks2.s
vxworks2.sd