690f47bf98
* lib/ld-lib.exp (default_ld_compile): Add a -I option for the source directory. * ld-mips-elf/compressed-plt-1.ld, ld-mips-elf/compressed-plt-1.s, ld-mips-elf/compressed-plt-1-dyn.s, ld-mips-elf/compressed-plt-1a.s, ld-mips-elf/compressed-plt-1b.s, ld-mips-elf/compressed-plt-1c.s, ld-mips-elf/compressed-plt-1d.s, ld-mips-elf/compressed-plt-1e.s, ld-mips-elf/compressed-plt-1-o32-se.rd, ld-mips-elf/compressed-plt-1-o32-se.od, ld-mips-elf/compressed-plt-1-o32-mips16-only.rd, ld-mips-elf/compressed-plt-1-o32-mips16-only.od, ld-mips-elf/compressed-plt-1-o32-umips-only.rd, ld-mips-elf/compressed-plt-1-o32-umips-only.od, ld-mips-elf/compressed-plt-1-o32-mips16.rd, ld-mips-elf/compressed-plt-1-o32-mips16.od, ld-mips-elf/compressed-plt-1-o32-mips16-got.rd, ld-mips-elf/compressed-plt-1-o32-mips16-got.od, ld-mips-elf/compressed-plt-1-o32-mips16-word.rd, ld-mips-elf/compressed-plt-1-o32-mips16-word.od, ld-mips-elf/compressed-plt-1-o32-umips.rd, ld-mips-elf/compressed-plt-1-o32-umips.od, ld-mips-elf/compressed-plt-1-o32-umips-got.rd, ld-mips-elf/compressed-plt-1-o32-umips-got.od, ld-mips-elf/compressed-plt-1-o32-umips-word.rd, ld-mips-elf/compressed-plt-1-o32-umips-word.od, ld-mips-elf/compressed-plt-1-n32-mips16.rd, ld-mips-elf/compressed-plt-1-n32-mips16.od, ld-mips-elf/compressed-plt-1-n32-umips.rd, ld-mips-elf/compressed-plt-1-n32-umips.od: New tests. * ld-mips-elf/mips-elf.exp: Run them.
110 lines
3 KiB
Text
110 lines
3 KiB
Text
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.* file format .*
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Disassembly of section \.plt:
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# Only _dc (direct call from compressed code) functions should have a
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# MIPS16 PLT. Note that indirect calls do not influence the choice,
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# so f_ic and f_lo_ic have MIPS rather than MIPS16 PLTs.
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10100000 <_PROCEDURE_LINKAGE_TABLE_>:
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.*: 3c1c1020 lui \$28,0x1020
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.*: 8f990000 lw \$25,0\(\$28\)
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.*: 279c0000 addiu \$28,\$28,0
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.*: 031cc023 subu \$24,\$24,\$28
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.*: 03e07821 move \$15,\$31
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.*: 0018c082 srl \$24,\$24,0x2
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.*: 0320f809 jalr \$25
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.*: 2718fffe addiu \$24,\$24,-2
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10100020 <f_lo_ic@plt>:
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.*: 3c0f1020 lui \$15,0x1020
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.*: 8df90008 lw \$25,8\(\$15\)
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.*: 03200008 jr \$25
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.*: 25f80008 addiu \$24,\$15,8
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10100030 <f_lo@plt>:
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.*: 3c0f1020 lui \$15,0x1020
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.*: 8df9001c lw \$25,28\(\$15\)
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.*: 03200008 jr \$25
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.*: 25f8001c addiu \$24,\$15,28
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10100040 <f_lo_dc@mips16plt>:
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.*: b203 lw \$2,1010004c <f_lo_dc@mips16plt\+0xc>
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.*: 9a60 lw \$3,0\(\$2\)
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.*: 651a move \$24,\$2
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.*: eb00 jr \$3
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.*: 653b move \$25,\$3
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.*: 6500 nop
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.*: .... .... \.word 0x1020000c
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10100050 <f_dc@mips16plt>:
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.*: b203 lw \$2,1010005c <f_dc@mips16plt\+0xc>
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.*: 9a60 lw \$3,0\(\$2\)
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.*: 651a move \$24,\$2
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.*: eb00 jr \$3
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.*: 653b move \$25,\$3
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.*: 6500 nop
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.*: .... .... \.word 0x10200010
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10100060 <f_ic_dc@mips16plt>:
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.*: b203 lw \$2,1010006c <f_ic_dc@mips16plt\+0xc>
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.*: 9a60 lw \$3,0\(\$2\)
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.*: 651a move \$24,\$2
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.*: eb00 jr \$3
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.*: 653b move \$25,\$3
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.*: 6500 nop
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.*: .... .... \.word 0x10200014
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10100070 <f_lo_ic_dc@mips16plt>:
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.*: b203 lw \$2,1010007c <f_lo_ic_dc@mips16plt\+0xc>
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.*: 9a60 lw \$3,0\(\$2\)
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.*: 651a move \$24,\$2
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.*: eb00 jr \$3
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.*: 653b move \$25,\$3
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.*: 6500 nop
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.*: .... .... \.word 0x10200018
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Disassembly of section \.MIPS\.stubs:
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10101000 <_MIPS_STUBS_>:
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# Lazy-binding stub for f_ic.
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.*: 8f998010 lw \$25,-32752\(\$28\)
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.*: 03e07821 move \$15,\$31
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.*: 0320f809 jalr \$25
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.*: 24180009 li \$24,9
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\.\.\.
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Disassembly of section \.text\.a:
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10102000 <testc>:
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.*: .... .... jal [0-9a-f]+ <f_dc@mips16plt>
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.*: 6500 nop
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.*: f030 9b44 lw \$2,-32732\(\$3\)
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# ^ global GOT entry for f_ic
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.*: .... .... jal [0-9a-f]+ <f_ic_dc@mips16plt>
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.*: 6500 nop
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.*: f010 9b58 lw \$2,-32744\(\$3\)
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# ^ local GOT entry for f_ic_dc@mips16plt
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.*: .... .... jal [0-9a-f]+ <f_lo_dc@mips16plt>
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.*: 6500 nop
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.*: f010 9b5c lw \$2,-32740\(\$3\)
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# ^ local GOT entry for f_lo_ic@plt
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.*: .... .... jal [0-9a-f]+ <f_lo_ic_dc@mips16plt>
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.*: 6500 nop
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.*: f030 9b40 lw \$2,-32736\(\$3\)
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# ^ local GOT entry for f_lo_ic_dc@mips16plt
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.*: e820 jr \$31
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Disassembly of section \.text\.c:
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10103000 <testlo>:
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.*: 24020030 li \$2,48
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# ^ low 16 bits of f_lo@plt
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.*: 24020041 li \$2,65
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# ^ low 16 bits of f_lo_dc@mips16plt
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.*: 24020020 li \$2,32
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# ^ low 16 bits of f_lo_ic@plt
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.*: 24020071 li \$2,113
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# ^ low 16 bits of f_lo_ic_dc@mips16plt
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