1324a0d9b5
On mips-irix, the debugger has trouble stepping over the following
line of code:
S: Shape'Class := R; <<<<---- STOP here
Here is what happens:
(gdb) n
warning: GDB can't find the start of the function at 0x7fff2bd8.
GDB is unable to find the start of the function at 0x7fff2bd8
and thus can't determine the size of that function's stack frame.
This means that GDB may be unable to access that stack frame, or
the frames below it.
This problem is most likely caused by an invalid program counter or
stack pointer.
However, if you think GDB should simply search farther back
from 0x7fff2bd8 for code which looks like the beginning of a
function, you can increase the range of the search using the `set
heuristic-fence-post' command.
0x7fff2bd8 in ?? ()
The program does in fact jump to this code location, which is a trampoline
located on the stack (there is an implicit call to a routine internally
generated by the Ada expander). As it is on the stack, GDB is naturally
unable to find the bounds of the current function, or any debugging
information, and is thus unable to continue.
This patch adds support for this sort of trampoline.
gdb/ChangeLog:
* mips-irix-tdep.c (mips_irix_n32_stack_tramp_frame_init): New
function.
(mips_irix_n32_stack_tramp_frame): New static global.
(mips_irix_init_abi): Add mips_irix_n32_stack_tramp_frame to
list of unwinder.
291 lines
11 KiB
C
291 lines
11 KiB
C
/* Target-dependent code for the MIPS architecture running on IRIX,
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for GDB, the GNU Debugger.
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Copyright (C) 2002, 2007, 2008, 2009, 2010 Free Software Foundation, Inc.
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This file is part of GDB.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>. */
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#include "defs.h"
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#include "osabi.h"
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#include "gdb_string.h"
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#include "solib.h"
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#include "solib-irix.h"
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#include "elf-bfd.h"
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#include "mips-tdep.h"
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#include "trad-frame.h"
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#include "tramp-frame.h"
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static void
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mips_irix_elf_osabi_sniff_abi_tag_sections (bfd *abfd, asection *sect,
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void *obj)
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{
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enum gdb_osabi *os_ident_ptr = obj;
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const char *name;
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unsigned int sectsize;
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name = bfd_get_section_name (abfd, sect);
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sectsize = bfd_section_size (abfd, sect);
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if (strncmp (name, ".MIPS.", 6) == 0 && sectsize > 0)
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{
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/* The presence of a section named with a ".MIPS." prefix is
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indicative of an IRIX binary. */
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*os_ident_ptr = GDB_OSABI_IRIX;
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}
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}
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static enum gdb_osabi
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mips_irix_elf_osabi_sniffer (bfd *abfd)
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{
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unsigned int elfosabi;
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enum gdb_osabi osabi = GDB_OSABI_UNKNOWN;
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/* If the generic sniffer gets a hit, return and let other sniffers
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get a crack at it. */
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bfd_map_over_sections (abfd,
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generic_elf_osabi_sniff_abi_tag_sections,
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&osabi);
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if (osabi != GDB_OSABI_UNKNOWN)
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return GDB_OSABI_UNKNOWN;
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elfosabi = elf_elfheader (abfd)->e_ident[EI_OSABI];
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if (elfosabi == ELFOSABI_NONE)
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{
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/* When elfosabi is ELFOSABI_NONE (0), then the ELF structures in the
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file are conforming to the base specification for that machine
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(there are no OS-specific extensions). In order to determine the
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real OS in use we must look for OS notes that have been added.
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For IRIX, we simply look for sections named with .MIPS. as
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prefixes. */
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bfd_map_over_sections (abfd,
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mips_irix_elf_osabi_sniff_abi_tag_sections,
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&osabi);
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}
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return osabi;
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}
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/* Unwinding past the signal handler on mips-irix.
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Note: The following has only been tested with N32, but can probably
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be made to work with a small number of adjustments.
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On mips-irix, the sigcontext_t structure is stored at the base
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of the frame established by the _sigtramp function. The definition
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of this structure can be found in <sys/signal.h> (comments have been
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C++'ified to avoid a collision with the C-style comment delimiters
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used by this comment):
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typedef struct sigcontext {
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__uint32_t sc_regmask; // regs to restore in sigcleanup
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__uint32_t sc_status; // cp0 status register
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__uint64_t sc_pc; // pc at time of signal
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// General purpose registers
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__uint64_t sc_regs[32]; // processor regs 0 to 31
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// Floating point coprocessor state
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__uint64_t sc_fpregs[32]; // fp regs 0 to 31
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__uint32_t sc_ownedfp; // fp has been used
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__uint32_t sc_fpc_csr; // fpu control and status reg
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__uint32_t sc_fpc_eir; // fpu exception instruction reg
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// implementation/revision
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__uint32_t sc_ssflags; // signal stack state to restore
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__uint64_t sc_mdhi; // Multiplier hi and low regs
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__uint64_t sc_mdlo;
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// System coprocessor registers at time of signal
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__uint64_t sc_cause; // cp0 cause register
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__uint64_t sc_badvaddr; // cp0 bad virtual address
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__uint64_t sc_triggersave; // state of graphics trigger (SGI)
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sigset_t sc_sigset; // signal mask to restore
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__uint64_t sc_fp_rounded_result; // for Ieee 754 support
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__uint64_t sc_pad[31];
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} sigcontext_t;
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The following macros provide the offset of some of the fields
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used to retrieve the value of the registers before the signal
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was raised. */
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/* The size of the sigtramp frame. The sigtramp frame base can then
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be computed by adding this size to the SP. */
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#define SIGTRAMP_FRAME_SIZE 48
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/* The offset in sigcontext_t where the PC is saved. */
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#define SIGCONTEXT_PC_OFF 8
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/* The offset in sigcontext_t where the GP registers are saved. */
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#define SIGCONTEXT_REGS_OFF (SIGCONTEXT_PC_OFF + 8)
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/* The offset in sigcontext_t where the FP regsiters are saved. */
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#define SIGCONTEXT_FPREGS_OFF (SIGCONTEXT_REGS_OFF + 32 * 8)
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/* The offset in sigcontext_t where the FP CSR register is saved. */
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#define SIGCONTEXT_FPCSR_OFF (SIGCONTEXT_FPREGS_OFF + 32 * 8 + 4)
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/* The offset in sigcontext_t where the multiplier hi register is saved. */
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#define SIGCONTEXT_HI_OFF (SIGCONTEXT_FPCSR_OFF + 2 * 4)
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/* The offset in sigcontext_t where the multiplier lo register is saved. */
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#define SIGCONTEXT_LO_OFF (SIGCONTEXT_HI_OFF + 4)
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/* Implement the "init" routine in struct tramp_frame for the N32 ABI
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on mips-irix. */
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static void
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mips_irix_n32_tramp_frame_init (const struct tramp_frame *self,
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struct frame_info *this_frame,
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struct trad_frame_cache *this_cache,
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CORE_ADDR func)
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{
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struct gdbarch *gdbarch = get_frame_arch (this_frame);
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const int num_regs = gdbarch_num_regs (gdbarch);
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int sp_cooked_regno = num_regs + MIPS_SP_REGNUM;
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const CORE_ADDR sp = get_frame_register_signed (this_frame, sp_cooked_regno);
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const CORE_ADDR sigcontext_base = sp + 48;
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const struct mips_regnum *regs = mips_regnum (gdbarch);
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int ireg;
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trad_frame_set_reg_addr (this_cache, regs->pc + gdbarch_num_regs (gdbarch),
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sigcontext_base + SIGCONTEXT_PC_OFF);
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for (ireg = 1; ireg < 32; ireg++)
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trad_frame_set_reg_addr (this_cache, ireg + MIPS_ZERO_REGNUM + num_regs,
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sigcontext_base + SIGCONTEXT_REGS_OFF + ireg * 8);
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for (ireg = 0; ireg < 32; ireg++)
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trad_frame_set_reg_addr (this_cache, ireg + regs->fp0 + num_regs,
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sigcontext_base + SIGCONTEXT_FPREGS_OFF
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+ ireg * 8);
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trad_frame_set_reg_addr (this_cache, regs->fp_control_status + num_regs,
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sigcontext_base + SIGCONTEXT_FPCSR_OFF);
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trad_frame_set_reg_addr (this_cache, regs->hi + num_regs,
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sigcontext_base + SIGCONTEXT_HI_OFF);
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trad_frame_set_reg_addr (this_cache, regs->lo + num_regs,
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sigcontext_base + SIGCONTEXT_LO_OFF);
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trad_frame_set_id (this_cache, frame_id_build (sigcontext_base, func));
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}
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/* The tramp_frame structure describing sigtramp frames on mips-irix N32.
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Note that the list of instructions below is pretty much a pure dump
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of function _sigtramp on mips-irix. A few instructions are actually
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not tested (mask set to 0), because a portion of these instructions
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contain an address which changes due to relocation. We could use
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a smarter mask that checks the instrutction code alone, but given
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the number of instructions already being checked, this seemed
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unnecessary. */
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static const struct tramp_frame mips_irix_n32_tramp_frame =
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{
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SIGTRAMP_FRAME,
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4,
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{
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{ 0x3c0c8000, -1 }, /* lui t0,0x8000 */
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{ 0x27bdffd0, -1 }, /* addiu sp,sp,-48 */
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{ 0x008c6024, -1 }, /* and t0,a0,t0 */
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{ 0xffa40018, -1 }, /* sd a0,24(sp) */
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{ 0x00000000, 0 }, /* beqz t0,0xfaefcb8 <_sigtramp+40> */
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{ 0xffa60028, -1 }, /* sd a2,40(sp) */
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{ 0x01806027, -1 }, /* nor t0,t0,zero */
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{ 0xffa00020, -1 }, /* sd zero,32(sp) */
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{ 0x00000000, 0 }, /* b 0xfaefcbc <_sigtramp+44> */
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{ 0x008c2024, -1 }, /* and a0,a0,t0 */
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{ 0xffa60020, -1 }, /* sd a2,32(sp) */
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{ 0x03e0c025, -1 }, /* move t8,ra */
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{ 0x00000000, 0 }, /* bal 0xfaefcc8 <_sigtramp+56> */
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{ 0x00000000, -1 }, /* nop */
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{ 0x3c0c0007, -1 }, /* lui t0,0x7 */
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{ 0x00e0c825, -1 }, /* move t9,a3 */
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{ 0x658c80fc, -1 }, /* daddiu t0,t0,-32516 */
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{ 0x019f602d, -1 }, /* daddu t0,t0,ra */
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{ 0x0300f825, -1 }, /* move ra,t8 */
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{ 0x8d8c9880, -1 }, /* lw t0,-26496(t0) */
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{ 0x8d8c0000, -1 }, /* lw t0,0(t0) */
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{ 0x8d8d0000, -1 }, /* lw t1,0(t0) */
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{ 0xffac0008, -1 }, /* sd t0,8(sp) */
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{ 0x0320f809, -1 }, /* jalr t9 */
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{ 0xffad0010, -1 }, /* sd t1,16(sp) */
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{ 0xdfad0010, -1 }, /* ld t1,16(sp) */
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{ 0xdfac0008, -1 }, /* ld t0,8(sp) */
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{ 0xad8d0000, -1 }, /* sw t1,0(t0) */
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{ 0xdfa40020, -1 }, /* ld a0,32(sp) */
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{ 0xdfa50028, -1 }, /* ld a1,40(sp) */
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{ 0xdfa60018, -1 }, /* ld a2,24(sp) */
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{ 0x24020440, -1 }, /* li v0,1088 */
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{ 0x0000000c, -1 }, /* syscall */
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{ TRAMP_SENTINEL_INSN, -1 }
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},
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mips_irix_n32_tramp_frame_init
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};
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/* Implement the "init" routine in struct tramp_frame for the stack-based
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trampolines used on mips-irix. */
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static void
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mips_irix_n32_stack_tramp_frame_init (const struct tramp_frame *self,
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struct frame_info *this_frame,
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struct trad_frame_cache *this_cache,
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CORE_ADDR func)
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{
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struct gdbarch *gdbarch = get_frame_arch (this_frame);
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const int num_regs = gdbarch_num_regs (gdbarch);
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int sp_cooked_regno = num_regs + MIPS_SP_REGNUM;
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const CORE_ADDR sp = get_frame_register_signed (this_frame, sp_cooked_regno);
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/* The previous frame's PC is stored in RA. */
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trad_frame_set_reg_realreg (this_cache, gdbarch_pc_regnum (gdbarch),
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num_regs + MIPS_RA_REGNUM);
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trad_frame_set_id (this_cache, frame_id_build (sp, func));
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}
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/* A tramp_frame structure describing the stack-based trampoline
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used on mips-irix. These trampolines are created on the stack
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before being called. */
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static const struct tramp_frame mips_irix_n32_stack_tramp_frame =
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{
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SIGTRAMP_FRAME,
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4,
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{
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{ 0x8f210000, 0xffff0000 }, /* lw at, N(t9) */
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{ 0x8f2f0000, 0xffff0000 }, /* lw t3, M(t9) */
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{ 0x00200008, 0xffffffff }, /* jr at */
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{ 0x0020c82d, 0xffffffff }, /* move t9, at */
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{ TRAMP_SENTINEL_INSN, -1 }
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},
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mips_irix_n32_stack_tramp_frame_init
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};
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static void
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mips_irix_init_abi (struct gdbarch_info info,
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struct gdbarch *gdbarch)
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{
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set_solib_ops (gdbarch, &irix_so_ops);
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tramp_frame_prepend_unwinder (gdbarch, &mips_irix_n32_stack_tramp_frame);
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tramp_frame_prepend_unwinder (gdbarch, &mips_irix_n32_tramp_frame);
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}
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/* Provide a prototype to silence -Wmissing-prototypes. */
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extern initialize_file_ftype _initialize_mips_irix_tdep;
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void
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_initialize_mips_irix_tdep (void)
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{
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/* Register an ELF OS ABI sniffer for IRIX binaries. */
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gdbarch_register_osabi_sniffer (bfd_arch_mips,
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bfd_target_elf_flavour,
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mips_irix_elf_osabi_sniffer);
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gdbarch_register_osabi (bfd_arch_mips, 0, GDB_OSABI_IRIX,
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mips_irix_init_abi);
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}
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