aebf9be708
PR ld/19455 * elf32-arm.c (elf32_arm_create_dynamic_sections): Set the ELF class of the linker stub bfd. (elf32_arm_check_relocs): Skip check for pic format after processing a vxWorks R_ARM_ABS12 reloc. * elflink.c (bfd_elf_final_link): Check for ELFCLASSNONE when reporting a class mismatch. * testsuite/ld-arm/vxworks1-lib.dd: Update for current disassmebler output. * testsuite/ld-arm/vxworks1-lib.rd: Likewise. * testsuite/ld-arm/vxworks1.dd: Likewise. * testsuite/ld-arm/vxworks1.rd: Likewise. * testsuite/ld-arm/vxworks1.ld: Set the output format.
37 lines
1.2 KiB
Text
37 lines
1.2 KiB
Text
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.*: file format .*
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Disassembly of section \.plt:
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00080800 <_PROCEDURE_LINKAGE_TABLE_>:
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80800: e52dc008 str ip, \[sp, #-8\]!
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80804: e59fc000 ldr ip, \[pc] ; 8080c <.*>
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80808: e59cf008 ldr pc, \[ip, #8\]
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8080c: 00081400 .word 0x00081400
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8080c: R_ARM_ABS32 _GLOBAL_OFFSET_TABLE_
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80810: e59fc000 ldr ip, \[pc] ; 80818 <.*>
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80814: e59cf000 ldr pc, \[ip\]
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80818: 0008140c .word 0x0008140c
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80818: R_ARM_ABS32 _GLOBAL_OFFSET_TABLE_\+0xc
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8081c: e59fc000 ldr ip, \[pc] ; 80824 <.*>
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80820: eafffff6 b 80800 <.*>
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80824: 00000000 .word 0x00000000
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80828: e59fc000 ldr ip, \[pc] ; 80830 <.*>
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8082c: e59cf000 ldr pc, \[ip\]
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80830: 00081410 .word 0x00081410
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80830: R_ARM_ABS32 _GLOBAL_OFFSET_TABLE_\+0x10
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80834: e59fc000 ldr ip, \[pc] ; 8083c <.*>
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80838: eafffff0 b 80800 <.*>
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8083c: 0000000c .word 0x0000000c
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Disassembly of section \.text:
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00080c00 <_start>:
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80c00: ebffff08 bl 80828 <.*>
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80c00: R_ARM_PC24 \.plt\+0x20
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80c04: eb000000 bl 80c0c <sexternal>
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80c04: R_ARM_PC24 sexternal-0x8
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80c08: eaffff00 b 80810 <.*>
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80c08: R_ARM_PC24 \.plt\+0x8
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00080c0c <sexternal>:
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80c0c: e1a0f00e mov pc, lr
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