221 lines
8 KiB
C
221 lines
8 KiB
C
/* Opcode table for the TXVU.
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Copyright 1998 Free Software Foundation, Inc.
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This file is part of GAS, the GNU Assembler, GDB, the GNU debugger, and
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the GNU Binutils.
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GAS/GDB is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2, or (at your option)
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any later version.
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GAS/GDB is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with GAS or GDB; see the file COPYING. If not, write to
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the Free Software Foundation, 59 Temple Place - Suite 330,
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Boston, MA 02111-1307, USA. */
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/* Type to denote a TXVU instruction (at least a 32 bit unsigned int). */
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typedef unsigned int TXVU_INSN;
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/* Maximum number of operands an instruction can have. */
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#define TXVU_MAX_OPERANDS 8
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struct txvu_opcode {
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char *mnemonic;
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/* The value stored is 128 + operand number.
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This allows ASCII chars to go here as well. */
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unsigned char syntax[TXVU_MAX_OPERANDS];
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TXVU_INSN mask, value; /* recognize insn if (op&mask)==value */
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int flags; /* various flag bits */
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/* Values for `flags'. */
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/* This insn is a conditional branch. */
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#define TXVU_OPCODE_COND_BRANCH 1
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/* These values are used to optimize assembly and disassembly. Each insn is
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on a list of related insns (same first letter for assembly, same insn code
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for disassembly). */
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/* FIXME: May wish to move this to separate table. */
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struct txvu_opcode *next_asm; /* Next instruction to try during assembly. */
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struct txvu_opcode *next_dis; /* Next instruction to try during disassembly. */
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/* Macros to create the hash values for the lists. */
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#define TXVU_HASH_UPPER_OPCODE(string) \
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((string)[0] >= 'a' && (string)[0] <= 'z' ? (string)[0] - 'a' : 26)
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#define TXVU_HASH_LOWER_OPCODE(string) \
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((string)[0] >= 'a' && (string)[0] <= 'z' ? (string)[0] - 'a' : 26)
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#define TXVU_HASH_UPPER_ICODE(insn) \
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((insn) & 0x3f)
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#define TXVU_HASH_LOWER_ICODE(insn) \
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((insn) & 0x3f)
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/* Macros to access `next_asm', `next_dis' so users needn't care about the
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underlying mechanism. */
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#define TXVU_OPCODE_NEXT_ASM(op) ((op)->next_asm)
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#define TXVU_OPCODE_NEXT_DIS(op) ((op)->next_dis)
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};
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/* The operand table. */
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struct txvu_operand {
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/* The number of bits in the operand (may be unused for a modifier). */
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unsigned char bits;
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/* How far the operand is left shifted in the instruction, or
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the modifier's flag bit (may be unused for a modifier). */
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unsigned char shift;
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/* Various flag bits. */
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int flags;
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/* Values for `flags'. */
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/* This operand is a suffix to the opcode. */
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#define TXVU_OPERAND_SUFFIX 1
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/* This operand is a relative branch displacement. The disassembler
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prints these symbolically if possible. */
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#define TXVU_OPERAND_RELATIVE_BRANCH 2
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/* This operand is an absolute branch address. The disassembler
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prints these symbolically if possible. */
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#define TXVU_OPERAND_ABSOLUTE_BRANCH 4
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/* This operand is an address. The disassembler
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prints these symbolically if possible. */
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#define TXVU_OPERAND_ADDRESS 8
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/* This operand is a long immediate value. */
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#define TXVU_OPERAND_LIMM 0x10
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/* This operand takes signed values. */
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#define TXVU_OPERAND_SIGNED 0x20
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/* This operand takes signed values, but also accepts a full positive
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range of values. That is, if bits is 16, it takes any value from
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-0x8000 to 0xffff. */
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#define TXVU_OPERAND_SIGNOPT 0x40
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/* This operand should be regarded as a negative number for the
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purposes of overflow checking (i.e., the normal most negative
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number is disallowed and one more than the normal most positive
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number is allowed). This flag will only be set for a signed
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operand. */
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#define TXVU_OPERAND_NEGATIVE 0x80
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/* This operand doesn't really exist. The program uses these operands
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in special ways. */
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#define TXVU_OPERAND_FAKE 0x100
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/* Modifier values. */
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/* A dot is required before a suffix. Eg: .le */
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#define TXVU_MOD_DOT 0x1000
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/* A normal register is allowed (not used, but here for completeness). */
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#define TXVU_MOD_REG 0x2000
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/* An auxiliary register name is expected. */
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#define TXVU_MOD_AUXREG 0x4000
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/* Sum of all TXVU_MOD_XXX bits. */
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#define TXVU_MOD_BITS 0x7000
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/* Non-zero if the operand type is really a modifier. */
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#define TXVU_MOD_P(X) ((X) & TXVU_MOD_BITS)
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/* Parse function. This is used by the assembler.
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If the operand cannot be parsed an error message is stored in ERRMSG,
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otherwise NULL is stored. */
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long (*parse) PARAMS ((char **str, const char **errmsg));
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/* Insertion function. This is used by the assembler. To insert an
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operand value into an instruction, check this field.
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If it is NULL, execute
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i |= (p & ((1 << o->bits) - 1)) << o->shift;
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(I is the instruction which we are filling in, O is a pointer to
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this structure, and OP is the opcode value; this assumes twos
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complement arithmetic).
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If this field is not NULL, then simply call it with the
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instruction and the operand value. It will return the new value
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of the instruction. If the ERRMSG argument is not NULL, then if
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the operand value is illegal, *ERRMSG will be set to a warning
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string (the operand will be inserted in any case). If the
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operand value is legal, *ERRMSG will be unchanged.
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REG is non-NULL when inserting a register value. */
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TXVU_INSN (*insert) PARAMS ((TXVU_INSN insn,
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const struct txvu_operand *operand, int mods,
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long value, const char **errmsg));
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/* Extraction function. This is used by the disassembler. To
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extract this operand type from an instruction, check this field.
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If it is NULL, compute
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op = ((i) >> o->shift) & ((1 << o->bits) - 1);
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if ((o->flags & TXVU_OPERAND_SIGNED) != 0
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&& (op & (1 << (o->bits - 1))) != 0)
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op -= 1 << o->bits;
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(I is the instruction, O is a pointer to this structure, and OP
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is the result; this assumes twos complement arithmetic).
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If this field is not NULL, then simply call it with the
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instruction value. It will return the value of the operand. If
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the INVALID argument is not NULL, *INVALID will be set to
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non-zero if this operand type can not actually be extracted from
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this operand (i.e., the instruction does not match). If the
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operand is valid, *INVALID will not be changed.
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INSN is a pointer to one or two `TXVU_INSN's. The first element is
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the insn, the second is an immediate constant if present.
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FIXME: just thrown in here for now.
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*/
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long (*extract) PARAMS ((TXVU_INSN insn,
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const struct txvu_operand *operand,
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int mods, int *pinvalid));
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/* Print function. This is used by the disassembler. */
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void (*print) PARAMS ((disassemble_info *info, TXVU_INSN insn,
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long value));
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};
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/* Given an operand entry, return the table index. */
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#define TXVU_OPERAND_INDEX(op) ((op) - 128)
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/* Positions and masks of various fields. */
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#define TXVU_SHIFT_DEST 21
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#define TXVU_SHIFT_FTREG 16
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#define TXVU_SHIFT_FSREG 11
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#define TXVU_SHIFT_FDREG 6
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#define TXVU_MASK_VFREG 31
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#define TXVU_DEST_X 8
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#define TXVU_DEST_Y 4
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#define TXVU_DEST_Z 2
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#define TXVU_DEST_W 1
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#define TXVU_BC_X 0
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#define TXVU_BC_Y 1
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#define TXVU_BC_Z 2
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#define TXVU_BC_W 3
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extern const struct txvu_operand txvu_operands[];
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extern const int txvu_operand_count;
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extern /*const*/ struct txvu_opcode txvu_opcodes[];
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extern const int txvu_opcodes_count;
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/* Utility fns in txvu-opc.c. */
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void txvu_opcode_init_tables PARAMS ((int));
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void txvu_opcode_init_parse PARAMS ((void));
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void txvu_opcode_init_print PARAMS ((void));
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const struct txvu_opcode *txvu_upper_opcode_lookup_asm PARAMS ((const char *));
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const struct txvu_opcode *txvu_lower_opcode_lookup_asm PARAMS ((const char *));
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const struct txvu_opcode *txvu_upper_opcode_lookup_dis PARAMS ((unsigned int));
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const struct txvu_opcode *txvu_lower_opcode_lookup_dis PARAMS ((unsigned int));
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