034685f9ce
The CIA_{GET,SET} macros serve the same function as CPU_PC_{GET,SET}
except the latter adds a layer of indirection via the sim state. This
lets models set up different functions at runtime and doesn't reach so
directly into the arch-specific cpu state.
It also doesn't make sense to have two sets of macros that do exactly
the same thing, so lets standardize on the one that gets us more.
90 lines
2.2 KiB
C
90 lines
2.2 KiB
C
/* Main header for the m32r. */
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#ifndef SIM_MAIN_H
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#define SIM_MAIN_H
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#define USING_SIM_BASE_H /* FIXME: quick hack */
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struct _sim_cpu; /* FIXME: should be in sim-basics.h */
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typedef struct _sim_cpu SIM_CPU;
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#include "symcat.h"
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#include "sim-basics.h"
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#include "cgen-types.h"
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#include "m32r-desc.h"
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#include "m32r-opc.h"
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#include "arch.h"
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/* These must be defined before sim-base.h. */
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typedef USI sim_cia;
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#define SIM_ENGINE_HALT_HOOK(sd, cpu, cia) \
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do { \
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if (cpu) /* null if ctrl-c */ \
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sim_pc_set ((cpu), (cia)); \
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} while (0)
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#define SIM_ENGINE_RESTART_HOOK(sd, cpu, cia) \
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do { \
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sim_pc_set ((cpu), (cia)); \
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} while (0)
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#include "sim-base.h"
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#include "cgen-sim.h"
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#include "m32r-sim.h"
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#include "opcode/cgen.h"
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/* The _sim_cpu struct. */
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struct _sim_cpu {
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/* sim/common cpu base. */
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sim_cpu_base base;
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/* Static parts of cgen. */
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CGEN_CPU cgen_cpu;
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M32R_MISC_PROFILE m32r_misc_profile;
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#define CPU_M32R_MISC_PROFILE(cpu) (& (cpu)->m32r_misc_profile)
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/* CPU specific parts go here.
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Note that in files that don't need to access these pieces WANT_CPU_FOO
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won't be defined and thus these parts won't appear. This is ok in the
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sense that things work. It is a source of bugs though.
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One has to of course be careful to not take the size of this
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struct and no structure members accessed in non-cpu specific files can
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go after here. Oh for a better language. */
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#if defined (WANT_CPU_M32RBF)
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M32RBF_CPU_DATA cpu_data;
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#endif
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#if defined (WANT_CPU_M32RXF)
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M32RXF_CPU_DATA cpu_data;
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#elif defined (WANT_CPU_M32R2F)
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M32R2F_CPU_DATA cpu_data;
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#endif
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};
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/* The sim_state struct. */
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struct sim_state {
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sim_cpu *cpu[MAX_NR_PROCESSORS];
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CGEN_STATE cgen_state;
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sim_state_base base;
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};
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/* Misc. */
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/* Catch address exceptions. */
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extern SIM_CORE_SIGNAL_FN m32r_core_signal;
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#define SIM_CORE_SIGNAL(SD,CPU,CIA,MAP,NR_BYTES,ADDR,TRANSFER,ERROR) \
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m32r_core_signal ((SD), (CPU), (CIA), (MAP), (NR_BYTES), (ADDR), \
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(TRANSFER), (ERROR))
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/* Default memory size. */
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#ifdef M32R_LINUX
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#define M32R_DEFAULT_MEM_SIZE 0x2000000 /* 32M */
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#else
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#define M32R_DEFAULT_MEM_SIZE 0x800000 /* 8M */
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#endif
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#endif /* SIM_MAIN_H */
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