7cc46491b1
* ppc-tdep.h: Remove ppc_spr constants. (struct gdbarch_tdep): Remove regs, ppc_sr0_regnum, and ppc_builtin_type_vec128 members. (PPC_R0_REGNUM, PPC_F0_REGNUM, PPC_PC_REGNUM, PPC_MSR_REGNUM) (PPC_CR_REGNUM, PPC_LR_REGNUM, PPC_CTR_REGNUM, PPC_XER_REGNUM) (PPC_FPSCR_REGNUM, PPC_MQ_REGNUM, PPC_SPE_UPPER_GP0_REGNUM) (PPC_SPE_ACC_REGNUM, PPC_SPE_FSCR_REGNUM, PPC_VR0_REGNUM) (PPC_VSCR_REGNUM, PPC_VRSAVE_REGNUM, PPC_NUM_REGS): New constants. * rs6000-tdep.c: Include preparsed descriptions. (init_sim_regno_table): Do not iterate over pseudo registers. Look up segment registers by name. Use sim_spr_register_name for SPRs. (rs6000_register_sim_regno): Call init_sim_regno_table here. (rs6000_builtin_type_vec128): Delete. (rs6000_register_name): Only handle SPE pseudo registers and upper halves. Call tdesc_register_name for everything else. (rs6000_register_type): Delete. Replace with... (rs6000_pseudo_register_type): ...this new function. Only handle SPE pseudo registers. (rs6000_register_reggroup_p): Delete. Replace with... (rs6000_pseudo_register_reggroup_p): ...this new function. Only handle SPE pseudo registers. (rs6000_convert_register_p): Use ppc_fp0_regnum instead of "struct reg". (rs6000_register_to_value, rs6000_value_to_register): Remove check of reg->fpr. (e500_register_reggroup_p): Delete. (STR, R, R4, R8, R16, F, P8, R32, R64, R0, A4, S, S4, SN4, S64) (COMMON_UISA_REGS, PPC_UISA_SPRS, PPC_UISA_NOFP_SPRS) (PPC_SEGMENT_REGS, PPC_OEA_SPRS, PPC_ALTIVEC_REGS, PPC_SPE_GP_REGS) (PPC_SPE_UPPER_GP_REGS, PPC_EV_PSEUDO_REGS): Delete macros. (registers_powerpc, registers_403, registers_403GC, registers_505) (registers_860, registers_601, registers_602, registers_603) (registers_604, registers_750, registers_7400, registers_e500): Delete variables. (struct variant): Delete nregs, npregs, num_tot_regs, and regs. Add tdesc. (tot_num_registers, num_registers, num_pseudo_registers): Delete. (variants): Delete outdated comment. Use standard target descriptions instead of "struct reg" arrays. (init_variants): Delete. (rs6000_gdbarch_init): Do not guess word size from the BFD architecture if we have a target description. Select a variant before creating a new architecture. Use the variant's target description if the target did not define a register layout. Validate target-supplied registers. Reject mismatches. Use fixed register numbers and new constants instead of magic numbers. Call set_gdbarch_ps_regnum. Call tdesc_use_registers. (_initialize_rs6000_tdep): Initialize the preparsed target descriptions. * target-descriptions.c (tdesc_predefined_types): Add int128 and uint128. (tdesc_find_register_early): New function. (tdesc_numbered_register): Use it. (tdesc_register_size): New function. (tdesc_use_registers): Take a target_desc argument. Do not use gdbarch_target_desc. * target-descriptions.h (tdesc_use_registers): Update prototype and comment. (tdesc_register_size): New prototype. * Makefile.in (powerpc_32_c, powerpc_403_c, powerpc_403gc_c) (powerpc_505_c, powerpc_601_c, powerpc_602_c, powerpc_603_c) (powerpc_604_c, powerpc_64_c, powerpc_7400_c, powerpc_750_c) (powerpc_860_c, powerpc_e500_c, rs6000_c): New macros. (rs6000-tdep.o): Update. * arm-tdep.c (arm_gdbarch_init): Update call to tdesc_use_registers. * m68k-tdep.c (m68k_gdbarch_init): Likewise. * mips-tdep.c (mips_gdbarch_init): Likewise. * gdb.texinfo (Predefined Target Types): Add int128 and uint128. (Standard Target Features): Add PowerPC features. * gdb.xml/tdesc-regs.exp: Add PowerPC support. * sim-ppc.h (sim_spr_register_name): New prototype. * gdb-sim.c (regnum2spr): Rename to... (sim_spr_register_name): ... this. Make global.
119 lines
3.6 KiB
Text
119 lines
3.6 KiB
Text
# Copyright 2007 Free Software Foundation, Inc.
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# This program is free software; you can redistribute it and/or modify
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# it under the terms of the GNU General Public License as published by
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# the Free Software Foundation; either version 3 of the License, or
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# (at your option) any later version.
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#
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# This program is distributed in the hope that it will be useful,
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# but WITHOUT ANY WARRANTY; without even the implied warranty of
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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# GNU General Public License for more details.
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#
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# You should have received a copy of the GNU General Public License
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# along with this program. If not, see <http://www.gnu.org/licenses/>.
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if {[gdb_skip_xml_test]} {
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unsupported "tdesc-regs.exp"
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return -1
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}
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gdb_start
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# To test adding registers, we need a core set of registers for this
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# architecture, or the description will be rejected.
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set core-regs ""
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set regdir ""
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switch -glob -- [istarget] {
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"*arm-*-*" {
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set core-regs {arm-core.xml}
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}
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"xscale-*-*" {
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set core-regs {arm-core.xml}
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}
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"mips*-*-*" {
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set core-regs {mips-cpu.xml mips-cp0.xml mips-fpu.xml}
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}
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"powerpc*-*-*" {
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set regdir "rs6000/"
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set core-regs {power-core.xml}
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}
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}
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# If no core registers were specified, assume this target does not
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# support target-defined registers. Verify that we get a warning if
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# we try to use them. This not only tests the warning, but also
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# reminds maintainers to add test support when they add the feature.
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if {[string equal ${core-regs} ""]} {
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gdb_test "set tdesc file $srcdir/$subdir/single-reg.xml" \
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"warning: Target-supplied registers are not supported.*" \
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"set tdesc file single-reg.xml"
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unsupported "register tests"
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return 0
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}
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# Otherwise, we support both XML and target defined registers.
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# Make sure we reject a description missing standard registers,
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# like the PC.
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gdb_test "set tdesc file $srcdir/$subdir/single-reg.xml" \
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"warning: Architecture rejected target-supplied description" \
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"set tdesc file single-reg.xml"
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# Copy the core registers into the objdir if necessary, so that they
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# will be found by <xi:include>.
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foreach src ${core-regs} {
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file delete "$src"
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file copy "$srcdir/../features/$regdir$src" "$src"
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}
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# Similarly, we need to copy files under test into the objdir.
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proc load_description { file errmsg } {
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global srcdir
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global subdir
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global gdb_prompt
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global core-regs
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file delete "regs.xml"
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set ifd [open "$srcdir/$subdir/$file" r]
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set ofd [open "regs.xml" w]
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while {[gets $ifd line] >= 0} {
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if {[regexp {<xi:include href="core-regs.xml"/>} $line]} {
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foreach src ${core-regs} {
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puts $ofd " <xi:include href=\"$src\"/>"
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}
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} else {
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puts $ofd $line
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}
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}
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close $ifd
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close $ofd
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# Anchor the test output, so that error messages are detected.
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set cmd "set tdesc filename regs.xml"
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set msg "set tdesc filename $file"
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set cmd_regex [string_to_regexp $cmd]
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gdb_test_multiple $cmd $msg {
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-re "^$cmd_regex\r\n$errmsg$gdb_prompt $" {
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pass $msg
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}
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}
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}
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load_description "extra-regs.xml" ""
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gdb_test "ptype \$extrareg" "type = (int|long|long long)"
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gdb_test "ptype \$uintreg" "type = uint32_t"
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gdb_test "ptype \$vecreg" "type = int8_t \\\[4\\\]"
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gdb_test "ptype \$unionreg" \
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"type = union {\r\n *v4int8 v4;\r\n *v2int16 v2;\r\n}"
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gdb_test "ptype \$unionreg.v4" "type = int8_t \\\[4\\\]"
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load_description "core-only.xml" ""
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# The extra register from the previous description should be gone.
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gdb_test "ptype \$extrareg" "type = void"
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foreach src ${core-regs} {
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file delete "$src"
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}
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file delete "regs.xml"
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